IntelMP.py revision 5702:bf84e2fa05f7 
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54# Authors: Gabe Black
55
56from m5.params import *
57from m5.SimObject import SimObject
58
59class X86IntelMPFloatingPointer(SimObject):
60    type = 'X86IntelMPFloatingPointer'
61    cxx_class = 'X86ISA::IntelMP::FloatingPointer'
62
63    # The minor revision of the spec to support. The major version is assumed
64    # to be 1 in accordance with the spec.
65    spec_rev = Param.UInt8(4, 'minor revision of the MP spec supported')
66    # If no default configuration is used, set this to 0.
67    default_config = Param.UInt8(0, 'which default configuration to use')
68    imcr_present = Param.Bool(True,
69            'whether the IMCR register is present in the APIC')
70
71class X86IntelMPConfigTable(SimObject):
72    type = 'X86IntelMPConfigTable'
73    cxx_class = 'X86ISA::IntelMP::ConfigTable'
74
75    spec_rev = Param.UInt8(4, 'minor revision of the MP spec supported')
76    oem_id = Param.String("", 'system manufacturer')
77    product_id = Param.String("", 'product family')
78    oem_table_addr = Param.UInt32(0,
79            'pointer to the optional oem configuration table')
80    oem_table_size = Param.UInt16(0, 'size of the oem configuration table')
81    local_apic = Param.UInt32(0xFEE00000, 'address of the local APIC')
82
83    base_entries = VectorParam.X86IntelMPBaseConfigEntry([],
84            'base configuration table entries')
85
86    ext_entries = VectorParam.X86IntelMPExtConfigEntry([],
87            'extended configuration table entries')
88
89class X86IntelMPBaseConfigEntry(SimObject):
90    type = 'X86IntelMPBaseConfigEntry'
91    cxx_class = 'X86ISA::IntelMP::BaseConfigEntry'
92    abstract = True
93
94class X86IntelMPExtConfigEntry(SimObject):
95    type = 'X86IntelMPExtConfigEntry'
96    cxx_class = 'X86ISA::IntelMP::ExtConfigEntry'
97    abstract = True
98
99class X86IntelMPProcessor(X86IntelMPBaseConfigEntry):
100    type = 'X86IntelMPProcessor'
101    cxx_class = 'X86ISA::IntelMP::Processor'
102
103    local_apic_id = Param.UInt8(0, 'local APIC id')
104    local_apic_version = Param.UInt8(0,
105            'bits 0-7 of the local APIC version register')
106    enable = Param.Bool(True, 'if this processor is usable')
107    bootstrap = Param.Bool(False, 'if this is the bootstrap processor')
108
109    stepping = Param.UInt8(0)
110    model = Param.UInt8(0)
111    family = Param.UInt8(0)
112
113    feature_flags = Param.UInt32(0, 'flags returned by the CPUID instruction')
114
115class X86IntelMPBus(X86IntelMPBaseConfigEntry):
116    type = 'X86IntelMPBus'
117    cxx_class = 'X86ISA::IntelMP::Bus'
118
119    bus_id = Param.UInt8(0, 'bus id assigned by the bios')
120    bus_type = Param.String("", 'string that identify the bus type')
121    # Legal values for bus_type are:
122    #
123    # "CBUS", "CBUSII", "EISA", "FUTURE", "INTERN", "ISA", "MBI", "MBII",
124    # "MCA", "MPI", "MPSA", "NUBUS", "PCI", "PCMCIA", "TC", "VL", "VME",
125    # "XPRESS"
126
127class X86IntelMPIOAPIC(X86IntelMPBaseConfigEntry):
128    type = 'X86IntelMPIOAPIC'
129    cxx_class = 'X86ISA::IntelMP::IOAPIC'
130
131    id = Param.UInt8(0, 'id of this APIC')
132    version = Param.UInt8(0, 'bits 0-7 of the version register')
133
134    enable = Param.Bool(True, 'if this APIC is usable')
135
136    address = Param.UInt32(0xfec00000, 'address of this APIC')
137
138class X86IntelMPInterruptType(Enum):
139    map = {'INT' : 0,
140           'NMI' : 1,
141           'SMI' : 2,
142           'ExtInt' : 3
143    }
144
145class X86IntelMPPolarity(Enum):
146    map = {'ConformPolarity' : 0,
147           'ActiveHigh' : 1,
148           'ActiveLow' : 3
149    }
150
151class X86IntelMPTriggerMode(Enum):
152    map = {'ConformTrigger' : 0,
153           'EdgeTrigger' : 1,
154           'LevelTrigger' : 3
155    }
156
157class X86IntelMPIOIntAssignment(X86IntelMPBaseConfigEntry):
158    type = 'X86IntelMPIOIntAssignment'
159    cxx_class = 'X86ISA::IntelMP::IOIntAssignment'
160
161    interrupt_type = Param.X86IntelMPInterruptType('INT', 'type of interrupt')
162
163    polarity = Param.X86IntelMPPolarity('ConformPolarity', 'polarity')
164    trigger = Param.X86IntelMPTriggerMode('ConformTrigger', 'trigger mode')
165
166    source_bus_id = Param.UInt8(0,
167            'id of the bus from which the interrupt signal comes')
168    source_bus_irq = Param.UInt8(0,
169            'which interrupt signal from the source bus')
170
171    dest_io_apic_id = Param.UInt8(0,
172            'id of the IO APIC the interrupt is going to')
173    dest_io_apic_intin = Param.UInt8(0,
174            'the INTIN pin on the IO APIC the interrupt is connected to')
175
176class X86IntelMPLocalIntAssignment(X86IntelMPBaseConfigEntry):
177    type = 'X86IntelMPLocalIntAssignment'
178    cxx_class = 'X86ISA::IntelMP::LocalIntAssignment'
179
180    interrupt_type = Param.X86IntelMPInterruptType('INT', 'type of interrupt')
181
182    polarity = Param.X86IntelMPPolarity('ConformPolarity', 'polarity')
183    trigger = Param.X86IntelMPTriggerMode('ConformTrigger', 'trigger mode')
184
185    source_bus_id = Param.UInt8(0,
186            'id of the bus from which the interrupt signal comes')
187    source_bus_irq = Param.UInt8(0,
188            'which interrupt signal from the source bus')
189
190    dest_local_apic_id = Param.UInt8(0,
191            'id of the local APIC the interrupt is going to')
192    dest_local_apic_intin = Param.UInt8(0,
193            'the INTIN pin on the local APIC the interrupt is connected to')
194
195class X86IntelMPAddressType(Enum):
196    map = {"IOAddress" : 0,
197           "MemoryAddress" : 1,
198           "PrefetchAddress" : 2
199    }
200
201class X86IntelMPAddrSpaceMapping(X86IntelMPExtConfigEntry):
202    type = 'X86IntelMPAddrSpaceMapping'
203    cxx_class = 'X86ISA::IntelMP::AddrSpaceMapping'
204
205    bus_id = Param.UInt8(0, 'id of the bus the address space is mapped to')
206    address_type = Param.X86IntelMPAddressType('IOAddress',
207            'address type used to access bus')
208    address = Param.Addr(0, 'starting address of the mapping')
209    length = Param.UInt64(0, 'length of mapping in bytes')
210
211class X86IntelMPBusHierarchy(X86IntelMPExtConfigEntry):
212    type = 'X86IntelMPBusHierarchy'
213    cxx_class = 'X86ISA::IntelMP::BusHierarchy'
214
215    bus_id = Param.UInt8(0, 'id of the bus being described')
216    subtractive_decode = Param.Bool(False,
217            'whether this bus contains all addresses not used by its children')
218    parent_bus = Param.UInt8(0, 'bus id of this busses parent')
219
220class X86IntelMPRangeList(Enum):
221    map = {"ISACompatible" : 0,
222           "VGACompatible" : 1
223    }
224
225class X86IntelMPCompatAddrSpaceMod(X86IntelMPExtConfigEntry):
226    type = 'X86IntelMPCompatAddrSpaceMod'
227    cxx_class = 'X86ISA::IntelMP::CompatAddrSpaceMod'
228
229    bus_id = Param.UInt8(0, 'id of the bus being described')
230    add = Param.Bool(False,
231            'if the range should be added to the original mapping')
232    range_list = Param.X86IntelMPRangeList('ISACompatible',
233            'which predefined range of addresses to use')
234