vtophys.cc revision 8852:c744483edfcf
1/* 2 * Copyright (c) 2002-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Ali Saidi 29 */ 30 31#include <string> 32 33#include "arch/sparc/tlb.hh" 34#include "arch/sparc/vtophys.hh" 35#include "base/chunk_generator.hh" 36#include "base/compiler.hh" 37#include "base/trace.hh" 38#include "cpu/thread_context.hh" 39#include "debug/VtoPhys.hh" 40#include "mem/port_proxy.hh" 41 42using namespace std; 43 44namespace SparcISA { 45 46Addr 47vtophys(Addr vaddr) 48{ 49 // In SPARC it's almost always impossible to turn a VA->PA w/o a 50 // context The only times we can kinda do it are if we have a 51 // SegKPM mapping and can find the real address in the tlb or we 52 // have a physical adddress already (beacuse we are looking at the 53 // hypervisor) Either case is rare, so we'll just panic. 54 55 panic("vtophys() without context on SPARC largly worthless\n"); 56 M5_DUMMY_RETURN; 57} 58 59Addr 60vtophys(ThreadContext *tc, Addr addr) 61{ 62 // Here we have many options and are really implementing something like 63 // a fill handler to find the address since there isn't a multilevel 64 // table for us to walk around. 65 // 66 // 1. We are currently hyperpriv, return the address unmodified 67 // 2. The mmu is off return(ra->pa) 68 // 3. We are currently priv, use ctx0* tsbs to find the page 69 // 4. We are not priv, use ctxN0* tsbs to find the page 70 // For all accesses we check the tlbs first since it's possible that 71 // long standing pages (e.g. locked kernel mappings) won't be in the tsb 72 uint64_t tlbdata = tc->readMiscRegNoEffect(MISCREG_TLB_DATA); 73 74 bool hpriv = bits(tlbdata,0,0); 75 // bool priv = bits(tlbdata,2,2); 76 bool addr_mask = bits(tlbdata,3,3); 77 bool data_real = !bits(tlbdata,5,5); 78 bool inst_real = !bits(tlbdata,4,4); 79 bool ctx_zero = bits(tlbdata,18,16) > 0; 80 int part_id = bits(tlbdata,15,8); 81 int pri_context = bits(tlbdata,47,32); 82 // int sec_context = bits(tlbdata,63,48); 83 84 PortProxy &mem = tc->getPhysProxy(); 85 TLB* itb = tc->getITBPtr(); 86 TLB* dtb = tc->getDTBPtr(); 87 TlbEntry* tbe; 88 PageTableEntry pte; 89 Addr tsbs[4]; 90 Addr va_tag; 91 TteTag ttetag; 92 93 if (hpriv) 94 return addr; 95 96 if (addr_mask) 97 addr = addr & VAddrAMask; 98 99 tbe = dtb->lookup(addr, part_id, data_real, ctx_zero ? 0 : pri_context , 100 false); 101 if (tbe) 102 goto foundtbe; 103 104 tbe = itb->lookup(addr, part_id, inst_real, ctx_zero ? 0 : pri_context, 105 false); 106 if (tbe) 107 goto foundtbe; 108 109 // We didn't find it in the tlbs, so lets look at the TSBs 110 dtb->GetTsbPtr(tc, addr, ctx_zero ? 0 : pri_context, tsbs); 111 va_tag = bits(addr, 63, 22); 112 for (int x = 0; x < 4; x++) { 113 ttetag = betoh(mem.read<uint64_t>(tsbs[x])); 114 if (ttetag.valid() && ttetag.va() == va_tag) { 115 uint64_t entry = mem.read<uint64_t>(tsbs[x]) + sizeof(uint64_t); 116 // I think it's sun4v at least! 117 pte.populate(betoh(entry), PageTableEntry::sun4v); 118 DPRINTF(VtoPhys, "Virtual(%#x)->Physical(%#x) found in TTE\n", 119 addr, pte.translate(addr)); 120 goto foundpte; 121 } 122 } 123 panic("couldn't translate %#x\n", addr); 124 125 foundtbe: 126 pte = tbe->pte; 127 DPRINTF(VtoPhys, "Virtual(%#x)->Physical(%#x) found in TLB\n", addr, 128 pte.translate(addr)); 129 foundpte: 130 return pte.translate(addr); 131} 132 133} // namespace SparcISA 134