types.hh revision 7720
111731Sjason@lowepower.com/* 211731Sjason@lowepower.com * Copyright (c) 2003-2005 The Regents of The University of Michigan 311731Sjason@lowepower.com * All rights reserved. 411731Sjason@lowepower.com * 511731Sjason@lowepower.com * Redistribution and use in source and binary forms, with or without 611731Sjason@lowepower.com * modification, are permitted provided that the following conditions are 711731Sjason@lowepower.com * met: redistributions of source code must retain the above copyright 811731Sjason@lowepower.com * notice, this list of conditions and the following disclaimer; 911731Sjason@lowepower.com * redistributions in binary form must reproduce the above copyright 1011731Sjason@lowepower.com * notice, this list of conditions and the following disclaimer in the 1111731Sjason@lowepower.com * documentation and/or other materials provided with the distribution; 1211731Sjason@lowepower.com * neither the name of the copyright holders nor the names of its 1311731Sjason@lowepower.com * contributors may be used to endorse or promote products derived from 1411731Sjason@lowepower.com * this software without specific prior written permission. 1511731Sjason@lowepower.com * 1611731Sjason@lowepower.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1711731Sjason@lowepower.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1811731Sjason@lowepower.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 1911731Sjason@lowepower.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2011731Sjason@lowepower.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2111731Sjason@lowepower.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2211731Sjason@lowepower.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2311731Sjason@lowepower.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2411731Sjason@lowepower.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2511731Sjason@lowepower.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2611731Sjason@lowepower.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2711731Sjason@lowepower.com * 2811731Sjason@lowepower.com * Authors: Gabe Black 2911731Sjason@lowepower.com */ 3011731Sjason@lowepower.com 3111731Sjason@lowepower.com#ifndef __ARCH_SPARC_TYPES_HH__ 3211731Sjason@lowepower.com#define __ARCH_SPARC_TYPES_HH__ 3311731Sjason@lowepower.com 3411731Sjason@lowepower.com#include "base/bigint.hh" 3511731Sjason@lowepower.com#include "base/types.hh" 3611731Sjason@lowepower.com#include "arch/generic/types.hh" 3711731Sjason@lowepower.com 3811731Sjason@lowepower.comnamespace SparcISA 3911731Sjason@lowepower.com{ 4011731Sjason@lowepower.com typedef uint32_t MachInst; 4111731Sjason@lowepower.com typedef uint64_t ExtMachInst; 4211731Sjason@lowepower.com 4311731Sjason@lowepower.com typedef GenericISA::DelaySlotUPCState<MachInst> PCState; 4411731Sjason@lowepower.com 4511731Sjason@lowepower.com typedef Twin64_t LargestRead; 4611731Sjason@lowepower.com 4711731Sjason@lowepower.com struct CoreSpecific { 4811731Sjason@lowepower.com int core_type; 4911731Sjason@lowepower.com }; 5011731Sjason@lowepower.com} 5111731Sjason@lowepower.com 5211731Sjason@lowepower.com#endif 5311731Sjason@lowepower.com