tlb.hh revision 3806
12650Ssaidi@eecs.umich.edu/*
22650Ssaidi@eecs.umich.edu * Copyright (c) 2006 The Regents of The University of Michigan
32650Ssaidi@eecs.umich.edu * All rights reserved.
42650Ssaidi@eecs.umich.edu *
52650Ssaidi@eecs.umich.edu * Redistribution and use in source and binary forms, with or without
62650Ssaidi@eecs.umich.edu * modification, are permitted provided that the following conditions are
72650Ssaidi@eecs.umich.edu * met: redistributions of source code must retain the above copyright
82650Ssaidi@eecs.umich.edu * notice, this list of conditions and the following disclaimer;
92650Ssaidi@eecs.umich.edu * redistributions in binary form must reproduce the above copyright
102650Ssaidi@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the
112650Ssaidi@eecs.umich.edu * documentation and/or other materials provided with the distribution;
122650Ssaidi@eecs.umich.edu * neither the name of the copyright holders nor the names of its
132650Ssaidi@eecs.umich.edu * contributors may be used to endorse or promote products derived from
142650Ssaidi@eecs.umich.edu * this software without specific prior written permission.
152650Ssaidi@eecs.umich.edu *
162650Ssaidi@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
172650Ssaidi@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
182650Ssaidi@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
192650Ssaidi@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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252650Ssaidi@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
262650Ssaidi@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272650Ssaidi@eecs.umich.edu *
282650Ssaidi@eecs.umich.edu * Authors: Ali Saidi
292650Ssaidi@eecs.umich.edu */
302650Ssaidi@eecs.umich.edu
312650Ssaidi@eecs.umich.edu#ifndef __ARCH_SPARC_TLB_HH__
322650Ssaidi@eecs.umich.edu#define __ARCH_SPARC_TLB_HH__
332650Ssaidi@eecs.umich.edu
343804Ssaidi@eecs.umich.edu#include "arch/sparc/tlb_map.hh"
353602Sgblack@eecs.umich.edu#include "base/misc.hh"
363569Sgblack@eecs.umich.edu#include "mem/request.hh"
373468Sgblack@eecs.umich.edu#include "sim/faults.hh"
383569Sgblack@eecs.umich.edu#include "sim/sim_object.hh"
393468Sgblack@eecs.umich.edu
403468Sgblack@eecs.umich.educlass ThreadContext;
413806Ssaidi@eecs.umich.educlass Packet;
423468Sgblack@eecs.umich.edu
433468Sgblack@eecs.umich.edunamespace SparcISA
443468Sgblack@eecs.umich.edu{
453603Ssaidi@eecs.umich.edu
463804Ssaidi@eecs.umich.educlass TLB : public SimObject
473804Ssaidi@eecs.umich.edu{
483804Ssaidi@eecs.umich.edu  protected:
493804Ssaidi@eecs.umich.edu    TlbMap lookupTable;;
503804Ssaidi@eecs.umich.edu    typedef TlbMap::iterator MapIter;
513804Ssaidi@eecs.umich.edu
523804Ssaidi@eecs.umich.edu    TlbEntry *tlb;
533804Ssaidi@eecs.umich.edu
543804Ssaidi@eecs.umich.edu    int size;
553804Ssaidi@eecs.umich.edu    int usedEntries;
563804Ssaidi@eecs.umich.edu
573804Ssaidi@eecs.umich.edu    enum FaultTypes {
583804Ssaidi@eecs.umich.edu        OtherFault = 0,
593804Ssaidi@eecs.umich.edu        PrivViolation = 0x1,
603804Ssaidi@eecs.umich.edu        SideEffect = 0x2,
613804Ssaidi@eecs.umich.edu        AtomicToIo = 0x4,
623804Ssaidi@eecs.umich.edu        IllegalAsi = 0x8,
633804Ssaidi@eecs.umich.edu        LoadFromNfo = 0x10,
643804Ssaidi@eecs.umich.edu        VaOutOfRange = 0x20,
653804Ssaidi@eecs.umich.edu        VaOutOfRangeJmp = 0x40
663468Sgblack@eecs.umich.edu    };
673468Sgblack@eecs.umich.edu
683804Ssaidi@eecs.umich.edu    enum ContextType {
693804Ssaidi@eecs.umich.edu        Primary = 0,
703804Ssaidi@eecs.umich.edu        Secondary = 1,
713804Ssaidi@eecs.umich.edu        Nucleus = 2
723468Sgblack@eecs.umich.edu    };
733468Sgblack@eecs.umich.edu
743804Ssaidi@eecs.umich.edu
753804Ssaidi@eecs.umich.edu    /** lookup an entry in the TLB based on the partition id, and real bit if
763804Ssaidi@eecs.umich.edu     * real is true or the partition id, and context id if real is false.
773804Ssaidi@eecs.umich.edu     * @param va the virtual address not shifted (e.g. bottom 13 bits are 0)
783804Ssaidi@eecs.umich.edu     * @param paritition_id partition this entry is for
793804Ssaidi@eecs.umich.edu     * @param real is this a real->phys or virt->phys translation
803804Ssaidi@eecs.umich.edu     * @param context_id if this is virt->phys what context
813804Ssaidi@eecs.umich.edu     * @return A pointer to a tlb entry
823804Ssaidi@eecs.umich.edu     */
833804Ssaidi@eecs.umich.edu    TlbEntry *lookup(Addr va, int partition_id, bool real, int context_id = 0);
843804Ssaidi@eecs.umich.edu
853804Ssaidi@eecs.umich.edu    /** Insert a PTE into the TLB. */
863804Ssaidi@eecs.umich.edu    void insert(Addr vpn, int partition_id, int context_id, bool real,
873804Ssaidi@eecs.umich.edu            const PageTableEntry& PTE);
883804Ssaidi@eecs.umich.edu
893804Ssaidi@eecs.umich.edu    /** Given an entry id, read that tlb entries' tag. */
903804Ssaidi@eecs.umich.edu    uint64_t TagRead(int entry);
913804Ssaidi@eecs.umich.edu
923804Ssaidi@eecs.umich.edu    /** Give an entry id, read that tlb entries' tte */
933804Ssaidi@eecs.umich.edu    uint64_t TteRead(int entry);
943804Ssaidi@eecs.umich.edu
953804Ssaidi@eecs.umich.edu    /** Remove all entries from the TLB */
963804Ssaidi@eecs.umich.edu    void invalidateAll();
973804Ssaidi@eecs.umich.edu
983804Ssaidi@eecs.umich.edu    /** Remove all non-locked entries from the tlb that match partition id. */
993804Ssaidi@eecs.umich.edu    void demapAll(int partition_id);
1003804Ssaidi@eecs.umich.edu
1013804Ssaidi@eecs.umich.edu    /** Remove all entries that match a given context/partition id. */
1023804Ssaidi@eecs.umich.edu    void demapContext(int partition_id, int context_id);
1033804Ssaidi@eecs.umich.edu
1043804Ssaidi@eecs.umich.edu    /** Remve all entries that match a certain partition id, (contextid), and
1053804Ssaidi@eecs.umich.edu     * va). */
1063804Ssaidi@eecs.umich.edu    void demapPage(Addr va, int partition_id, bool real, int context_id);
1073804Ssaidi@eecs.umich.edu
1083804Ssaidi@eecs.umich.edu    /** Checks if the virtual address provided is a valid one. */
1093804Ssaidi@eecs.umich.edu    bool validVirtualAddress(Addr va, bool am);
1103804Ssaidi@eecs.umich.edu
1113804Ssaidi@eecs.umich.edu    void writeSfsr(ThreadContext *tc, int reg, bool write, ContextType ct,
1123804Ssaidi@eecs.umich.edu            bool se, FaultTypes ft, int asi);
1133804Ssaidi@eecs.umich.edu
1143804Ssaidi@eecs.umich.edu    void TLB::clearUsedBits();
1153804Ssaidi@eecs.umich.edu
1163804Ssaidi@eecs.umich.edu
1173804Ssaidi@eecs.umich.edu  public:
1183804Ssaidi@eecs.umich.edu    TLB(const std::string &name, int size);
1193804Ssaidi@eecs.umich.edu
1203804Ssaidi@eecs.umich.edu    // Checkpointing
1213804Ssaidi@eecs.umich.edu    virtual void serialize(std::ostream &os);
1223804Ssaidi@eecs.umich.edu    virtual void unserialize(Checkpoint *cp, const std::string &section);
1233804Ssaidi@eecs.umich.edu};
1243804Ssaidi@eecs.umich.edu
1253804Ssaidi@eecs.umich.educlass ITB : public TLB
1263804Ssaidi@eecs.umich.edu{
1273804Ssaidi@eecs.umich.edu  public:
1283804Ssaidi@eecs.umich.edu    ITB(const std::string &name, int size) : TLB(name, size)
1293468Sgblack@eecs.umich.edu    {
1303804Ssaidi@eecs.umich.edu    }
1313569Sgblack@eecs.umich.edu
1323804Ssaidi@eecs.umich.edu    Fault translate(RequestPtr &req, ThreadContext *tc);
1333804Ssaidi@eecs.umich.edu  private:
1343804Ssaidi@eecs.umich.edu    void writeSfsr(ThreadContext *tc, bool write, ContextType ct,
1353804Ssaidi@eecs.umich.edu            bool se, FaultTypes ft, int asi);
1363804Ssaidi@eecs.umich.edu};
1373804Ssaidi@eecs.umich.edu
1383804Ssaidi@eecs.umich.educlass DTB : public TLB
1393804Ssaidi@eecs.umich.edu{
1403804Ssaidi@eecs.umich.edu  public:
1413804Ssaidi@eecs.umich.edu    DTB(const std::string &name, int size) : TLB(name, size)
1423804Ssaidi@eecs.umich.edu    {
1433804Ssaidi@eecs.umich.edu    }
1443804Ssaidi@eecs.umich.edu
1453804Ssaidi@eecs.umich.edu    Fault translate(RequestPtr &req, ThreadContext *tc, bool write);
1463806Ssaidi@eecs.umich.edu    Tick doMmuRegRead(ThreadContext *tc, Packet *pkt);
1473806Ssaidi@eecs.umich.edu    Tick doMmuRegWrite(ThreadContext *tc, Packet *pkt);
1483804Ssaidi@eecs.umich.edu
1493804Ssaidi@eecs.umich.edu  private:
1503804Ssaidi@eecs.umich.edu    void writeSfr(ThreadContext *tc, Addr a, bool write, ContextType ct,
1513804Ssaidi@eecs.umich.edu            bool se, FaultTypes ft, int asi);
1523804Ssaidi@eecs.umich.edu
1533804Ssaidi@eecs.umich.edu};
1543804Ssaidi@eecs.umich.edu
1553468Sgblack@eecs.umich.edu}
1562650Ssaidi@eecs.umich.edu
1572650Ssaidi@eecs.umich.edu#endif // __ARCH_SPARC_TLB_HH__
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