process.cc revision 7532
1/* 2 * Copyright (c) 2003-2004 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 */ 31 32#include "arch/sparc/asi.hh" 33#include "arch/sparc/handlers.hh" 34#include "arch/sparc/isa_traits.hh" 35#include "arch/sparc/registers.hh" 36#include "arch/sparc/process.hh" 37#include "arch/sparc/types.hh" 38#include "base/loader/object_file.hh" 39#include "base/loader/elf_object.hh" 40#include "base/misc.hh" 41#include "cpu/thread_context.hh" 42#include "mem/page_table.hh" 43#include "sim/process_impl.hh" 44#include "mem/translating_port.hh" 45#include "sim/system.hh" 46 47using namespace std; 48using namespace SparcISA; 49 50static const int FirstArgumentReg = 8; 51 52 53SparcLiveProcess::SparcLiveProcess(LiveProcessParams * params, 54 ObjectFile *objFile, Addr _StackBias) 55 : LiveProcess(params, objFile), StackBias(_StackBias) 56{ 57 58 // XXX all the below need to be updated for SPARC - Ali 59 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 60 brk_point = roundUp(brk_point, VMPageSize); 61 62 // Set pointer for next thread stack. Reserve 8M for main stack. 63 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 64 65 //Initialize these to 0s 66 fillStart = 0; 67 spillStart = 0; 68} 69 70void SparcLiveProcess::handleTrap(int trapNum, ThreadContext *tc) 71{ 72 switch(trapNum) 73 { 74 case 0x01: //Software breakpoint 75 warn("Software breakpoint encountered at pc %#x.\n", tc->readPC()); 76 break; 77 case 0x02: //Division by zero 78 warn("Software signaled a division by zero at pc %#x.\n", 79 tc->readPC()); 80 break; 81 case 0x03: //Flush window trap 82 flushWindows(tc); 83 break; 84 case 0x04: //Clean windows 85 warn("Ignoring process request for clean register " 86 "windows at pc %#x.\n", tc->readPC()); 87 break; 88 case 0x05: //Range check 89 warn("Software signaled a range check at pc %#x.\n", 90 tc->readPC()); 91 break; 92 case 0x06: //Fix alignment 93 warn("Ignoring process request for os assisted unaligned accesses " 94 "at pc %#x.\n", tc->readPC()); 95 break; 96 case 0x07: //Integer overflow 97 warn("Software signaled an integer overflow at pc %#x.\n", 98 tc->readPC()); 99 break; 100 case 0x32: //Get integer condition codes 101 warn("Ignoring process request to get the integer condition codes " 102 "at pc %#x.\n", tc->readPC()); 103 break; 104 case 0x33: //Set integer condition codes 105 warn("Ignoring process request to set the integer condition codes " 106 "at pc %#x.\n", tc->readPC()); 107 break; 108 default: 109 panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum); 110 } 111} 112 113void 114SparcLiveProcess::initState() 115{ 116 LiveProcess::initState(); 117 118 ThreadContext *tc = system->getThreadContext(contextIds[0]); 119 //From the SPARC ABI 120 121 //Setup default FP state 122 tc->setMiscRegNoEffect(MISCREG_FSR, 0); 123 124 tc->setMiscRegNoEffect(MISCREG_TICK, 0); 125 126 /* 127 * Register window management registers 128 */ 129 130 //No windows contain info from other programs 131 //tc->setMiscRegNoEffect(MISCREG_OTHERWIN, 0); 132 tc->setIntReg(NumIntArchRegs + 6, 0); 133 //There are no windows to pop 134 //tc->setMiscRegNoEffect(MISCREG_CANRESTORE, 0); 135 tc->setIntReg(NumIntArchRegs + 4, 0); 136 //All windows are available to save into 137 //tc->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2); 138 tc->setIntReg(NumIntArchRegs + 3, NWindows - 2); 139 //All windows are "clean" 140 //tc->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows); 141 tc->setIntReg(NumIntArchRegs + 5, NWindows); 142 //Start with register window 0 143 tc->setMiscReg(MISCREG_CWP, 0); 144 //Always use spill and fill traps 0 145 //tc->setMiscRegNoEffect(MISCREG_WSTATE, 0); 146 tc->setIntReg(NumIntArchRegs + 7, 0); 147 //Set the trap level to 0 148 tc->setMiscRegNoEffect(MISCREG_TL, 0); 149 //Set the ASI register to something fixed 150 tc->setMiscRegNoEffect(MISCREG_ASI, ASI_PRIMARY); 151 152 /* 153 * T1 specific registers 154 */ 155 //Turn on the icache, dcache, dtb translation, and itb translation. 156 tc->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL, 15); 157} 158 159void 160Sparc32LiveProcess::initState() 161{ 162 SparcLiveProcess::initState(); 163 164 ThreadContext *tc = system->getThreadContext(contextIds[0]); 165 //The process runs in user mode with 32 bit addresses 166 tc->setMiscReg(MISCREG_PSTATE, 0x0a); 167 168 argsInit(32 / 8, VMPageSize); 169} 170 171void 172Sparc64LiveProcess::initState() 173{ 174 SparcLiveProcess::initState(); 175 176 ThreadContext *tc = system->getThreadContext(contextIds[0]); 177 //The process runs in user mode 178 tc->setMiscReg(MISCREG_PSTATE, 0x02); 179 180 argsInit(sizeof(IntReg), VMPageSize); 181} 182 183template<class IntType> 184void 185SparcLiveProcess::argsInit(int pageSize) 186{ 187 int intSize = sizeof(IntType); 188 189 typedef AuxVector<IntType> auxv_t; 190 191 std::vector<auxv_t> auxv; 192 193 string filename; 194 if(argv.size() < 1) 195 filename = ""; 196 else 197 filename = argv[0]; 198 199 //Even for a 32 bit process, the ABI says we still need to 200 //maintain double word alignment of the stack pointer. 201 uint64_t align = 16; 202 203 // load object file into target memory 204 objFile->loadSections(initVirtMem); 205 206 enum hardwareCaps 207 { 208 M5_HWCAP_SPARC_FLUSH = 1, 209 M5_HWCAP_SPARC_STBAR = 2, 210 M5_HWCAP_SPARC_SWAP = 4, 211 M5_HWCAP_SPARC_MULDIV = 8, 212 M5_HWCAP_SPARC_V9 = 16, 213 //This one should technically only be set 214 //if there is a cheetah or cheetah_plus tlb, 215 //but we'll use it all the time 216 M5_HWCAP_SPARC_ULTRA3 = 32 217 }; 218 219 const int64_t hwcap = 220 M5_HWCAP_SPARC_FLUSH | 221 M5_HWCAP_SPARC_STBAR | 222 M5_HWCAP_SPARC_SWAP | 223 M5_HWCAP_SPARC_MULDIV | 224 M5_HWCAP_SPARC_V9 | 225 M5_HWCAP_SPARC_ULTRA3; 226 227 //Setup the auxilliary vectors. These will already have endian conversion. 228 //Auxilliary vectors are loaded only for elf formatted executables. 229 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 230 if(elfObject) 231 { 232 //Bits which describe the system hardware capabilities 233 auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap)); 234 //The system page size 235 auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::VMPageSize)); 236 //Defined to be 100 in the kernel source. 237 //Frequency at which times() increments 238 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 239 // For statically linked executables, this is the virtual address of the 240 // program header tables if they appear in the executable image 241 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 242 // This is the size of a program header entry from the elf file. 243 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 244 // This is the number of program headers from the original elf file. 245 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 246 //This is the address of the elf "interpreter", It should be set 247 //to 0 for regular executables. It should be something else 248 //(not sure what) for dynamic libraries. 249 auxv.push_back(auxv_t(M5_AT_BASE, 0)); 250 //This is hardwired to 0 in the elf loading code in the kernel 251 auxv.push_back(auxv_t(M5_AT_FLAGS, 0)); 252 //The entry point to the program 253 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 254 //Different user and group IDs 255 auxv.push_back(auxv_t(M5_AT_UID, uid())); 256 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 257 auxv.push_back(auxv_t(M5_AT_GID, gid())); 258 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 259 //Whether to enable "secure mode" in the executable 260 auxv.push_back(auxv_t(M5_AT_SECURE, 0)); 261 } 262 263 //Figure out how big the initial stack needs to be 264 265 // The unaccounted for 8 byte 0 at the top of the stack 266 int sentry_size = 8; 267 268 //This is the name of the file which is present on the initial stack 269 //It's purpose is to let the user space linker examine the original file. 270 int file_name_size = filename.size() + 1; 271 272 int env_data_size = 0; 273 for (int i = 0; i < envp.size(); ++i) { 274 env_data_size += envp[i].size() + 1; 275 } 276 int arg_data_size = 0; 277 for (int i = 0; i < argv.size(); ++i) { 278 arg_data_size += argv[i].size() + 1; 279 } 280 281 //The info_block. 282 int base_info_block_size = 283 sentry_size + file_name_size + env_data_size + arg_data_size; 284 285 int info_block_size = roundUp(base_info_block_size, align); 286 287 int info_block_padding = info_block_size - base_info_block_size; 288 289 //Each auxilliary vector is two words 290 int aux_array_size = intSize * 2 * (auxv.size() + 1); 291 292 int envp_array_size = intSize * (envp.size() + 1); 293 int argv_array_size = intSize * (argv.size() + 1); 294 295 int argc_size = intSize; 296 int window_save_size = intSize * 16; 297 298 //Figure out the size of the contents of the actual initial frame 299 int frame_size = 300 aux_array_size + 301 envp_array_size + 302 argv_array_size + 303 argc_size + 304 window_save_size; 305 306 //There needs to be padding after the auxiliary vector data so that the 307 //very bottom of the stack is aligned properly. 308 int aligned_partial_size = roundUp(frame_size, align); 309 int aux_padding = aligned_partial_size - frame_size; 310 311 int space_needed = 312 info_block_size + 313 aux_padding + 314 frame_size; 315 316 stack_min = stack_base - space_needed; 317 stack_min = roundDown(stack_min, align); 318 stack_size = stack_base - stack_min; 319 320 // Allocate space for the stack 321 pTable->allocate(roundDown(stack_min, pageSize), 322 roundUp(stack_size, pageSize)); 323 324 // map out initial stack contents 325 IntType sentry_base = stack_base - sentry_size; 326 IntType file_name_base = sentry_base - file_name_size; 327 IntType env_data_base = file_name_base - env_data_size; 328 IntType arg_data_base = env_data_base - arg_data_size; 329 IntType auxv_array_base = arg_data_base - 330 info_block_padding - aux_array_size - aux_padding; 331 IntType envp_array_base = auxv_array_base - envp_array_size; 332 IntType argv_array_base = envp_array_base - argv_array_size; 333 IntType argc_base = argv_array_base - argc_size; 334#if TRACING_ON 335 IntType window_save_base = argc_base - window_save_size; 336#endif 337 338 DPRINTF(Stack, "The addresses of items on the initial stack:\n"); 339 DPRINTF(Stack, "%#x - sentry NULL\n", sentry_base); 340 DPRINTF(Stack, "filename = %s\n", filename); 341 DPRINTF(Stack, "%#x - file name\n", file_name_base); 342 DPRINTF(Stack, "%#x - env data\n", env_data_base); 343 DPRINTF(Stack, "%#x - arg data\n", arg_data_base); 344 DPRINTF(Stack, "%#x - auxv array\n", auxv_array_base); 345 DPRINTF(Stack, "%#x - envp array\n", envp_array_base); 346 DPRINTF(Stack, "%#x - argv array\n", argv_array_base); 347 DPRINTF(Stack, "%#x - argc \n", argc_base); 348 DPRINTF(Stack, "%#x - window save\n", window_save_base); 349 DPRINTF(Stack, "%#x - stack min\n", stack_min); 350 351 assert(window_save_base == stack_min); 352 353 // write contents to stack 354 355 // figure out argc 356 IntType argc = argv.size(); 357 IntType guestArgc = SparcISA::htog(argc); 358 359 //Write out the sentry void * 360 uint64_t sentry_NULL = 0; 361 initVirtMem->writeBlob(sentry_base, 362 (uint8_t*)&sentry_NULL, sentry_size); 363 364 //Write the file name 365 initVirtMem->writeString(file_name_base, filename.c_str()); 366 367 //Copy the aux stuff 368 for(int x = 0; x < auxv.size(); x++) 369 { 370 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 371 (uint8_t*)&(auxv[x].a_type), intSize); 372 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 373 (uint8_t*)&(auxv[x].a_val), intSize); 374 } 375 376 //Write out the terminating zeroed auxilliary vector 377 const IntType zero = 0; 378 initVirtMem->writeBlob(auxv_array_base + intSize * 2 * auxv.size(), 379 (uint8_t*)&zero, intSize); 380 initVirtMem->writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1), 381 (uint8_t*)&zero, intSize); 382 383 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 384 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 385 386 initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize); 387 388 //Set up space for the trap handlers into the processes address space. 389 //Since the stack grows down and there is reserved address space abov 390 //it, we can put stuff above it and stay out of the way. 391 fillStart = stack_base; 392 spillStart = fillStart + sizeof(MachInst) * numFillInsts; 393 394 ThreadContext *tc = system->getThreadContext(contextIds[0]); 395 //Set up the thread context to start running the process 396 //assert(NumArgumentRegs >= 2); 397 //tc->setIntReg(ArgumentReg[0], argc); 398 //tc->setIntReg(ArgumentReg[1], argv_array_base); 399 tc->setIntReg(StackPointerReg, stack_min - StackBias); 400 401 // %g1 is a pointer to a function that should be run at exit. Since we 402 // don't have anything like that, it should be set to 0. 403 tc->setIntReg(1, 0); 404 405 Addr prog_entry = objFile->entryPoint(); 406 tc->setPC(prog_entry); 407 tc->setNextPC(prog_entry + sizeof(MachInst)); 408 tc->setNextNPC(prog_entry + (2 * sizeof(MachInst))); 409 410 //Align the "stack_min" to a page boundary. 411 stack_min = roundDown(stack_min, pageSize); 412 413// num_processes++; 414} 415 416void 417Sparc64LiveProcess::argsInit(int intSize, int pageSize) 418{ 419 SparcLiveProcess::argsInit<uint64_t>(pageSize); 420 421 // Stuff the trap handlers into the process address space 422 initVirtMem->writeBlob(fillStart, 423 (uint8_t*)fillHandler64, sizeof(MachInst) * numFillInsts); 424 initVirtMem->writeBlob(spillStart, 425 (uint8_t*)spillHandler64, sizeof(MachInst) * numSpillInsts); 426} 427 428void 429Sparc32LiveProcess::argsInit(int intSize, int pageSize) 430{ 431 SparcLiveProcess::argsInit<uint32_t>(pageSize); 432 433 // Stuff the trap handlers into the process address space 434 initVirtMem->writeBlob(fillStart, 435 (uint8_t*)fillHandler32, sizeof(MachInst) * numFillInsts); 436 initVirtMem->writeBlob(spillStart, 437 (uint8_t*)spillHandler32, sizeof(MachInst) * numSpillInsts); 438} 439 440void Sparc32LiveProcess::flushWindows(ThreadContext *tc) 441{ 442 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3); 443 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4); 444 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6); 445 MiscReg CWP = tc->readMiscReg(MISCREG_CWP); 446 MiscReg origCWP = CWP; 447 CWP = (CWP + Cansave + 2) % NWindows; 448 while(NWindows - 2 - Cansave != 0) 449 { 450 if (Otherwin) { 451 panic("Otherwin non-zero.\n"); 452 } else { 453 tc->setMiscReg(MISCREG_CWP, CWP); 454 //Do the stores 455 IntReg sp = tc->readIntReg(StackPointerReg); 456 for (int index = 16; index < 32; index++) { 457 uint32_t regVal = tc->readIntReg(index); 458 regVal = htog(regVal); 459 if (!tc->getMemPort()->tryWriteBlob( 460 sp + (index - 16) * 4, (uint8_t *)®Val, 4)) { 461 warn("Failed to save register to the stack when " 462 "flushing windows.\n"); 463 } 464 } 465 Canrestore--; 466 Cansave++; 467 CWP = (CWP + 1) % NWindows; 468 } 469 } 470 tc->setIntReg(NumIntArchRegs + 3, Cansave); 471 tc->setIntReg(NumIntArchRegs + 4, Canrestore); 472 tc->setMiscReg(MISCREG_CWP, origCWP); 473} 474 475void Sparc64LiveProcess::flushWindows(ThreadContext *tc) 476{ 477 IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3); 478 IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4); 479 IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6); 480 MiscReg CWP = tc->readMiscReg(MISCREG_CWP); 481 MiscReg origCWP = CWP; 482 CWP = (CWP + Cansave + 2) % NWindows; 483 while(NWindows - 2 - Cansave != 0) 484 { 485 if (Otherwin) { 486 panic("Otherwin non-zero.\n"); 487 } else { 488 tc->setMiscReg(MISCREG_CWP, CWP); 489 //Do the stores 490 IntReg sp = tc->readIntReg(StackPointerReg); 491 for (int index = 16; index < 32; index++) { 492 IntReg regVal = tc->readIntReg(index); 493 regVal = htog(regVal); 494 if (!tc->getMemPort()->tryWriteBlob( 495 sp + 2047 + (index - 16) * 8, (uint8_t *)®Val, 8)) { 496 warn("Failed to save register to the stack when " 497 "flushing windows.\n"); 498 } 499 } 500 Canrestore--; 501 Cansave++; 502 CWP = (CWP + 1) % NWindows; 503 } 504 } 505 tc->setIntReg(NumIntArchRegs + 3, Cansave); 506 tc->setIntReg(NumIntArchRegs + 4, Canrestore); 507 tc->setMiscReg(MISCREG_CWP, origCWP); 508} 509 510IntReg 511Sparc32LiveProcess::getSyscallArg(ThreadContext *tc, int &i) 512{ 513 assert(i < 6); 514 return bits(tc->readIntReg(FirstArgumentReg + i++), 31, 0); 515} 516 517void 518Sparc32LiveProcess::setSyscallArg(ThreadContext *tc, int i, IntReg val) 519{ 520 assert(i < 6); 521 tc->setIntReg(FirstArgumentReg + i, bits(val, 31, 0)); 522} 523 524IntReg 525Sparc64LiveProcess::getSyscallArg(ThreadContext *tc, int &i) 526{ 527 assert(i < 6); 528 return tc->readIntReg(FirstArgumentReg + i++); 529} 530 531void 532Sparc64LiveProcess::setSyscallArg(ThreadContext *tc, int i, IntReg val) 533{ 534 assert(i < 6); 535 tc->setIntReg(FirstArgumentReg + i, val); 536} 537 538void 539SparcLiveProcess::setSyscallReturn(ThreadContext *tc, 540 SyscallReturn return_value) 541{ 542 // check for error condition. SPARC syscall convention is to 543 // indicate success/failure in reg the carry bit of the ccr 544 // and put the return value itself in the standard return value reg (). 545 if (return_value.successful()) { 546 // no error, clear XCC.C 547 tc->setIntReg(NumIntArchRegs + 2, 548 tc->readIntReg(NumIntArchRegs + 2) & 0xEE); 549 //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) & 0xEE); 550 IntReg val = return_value.value(); 551 if (bits(tc->readMiscRegNoEffect( 552 SparcISA::MISCREG_PSTATE), 3, 3)) { 553 val = bits(val, 31, 0); 554 } 555 tc->setIntReg(ReturnValueReg, val); 556 } else { 557 // got an error, set XCC.C 558 tc->setIntReg(NumIntArchRegs + 2, 559 tc->readIntReg(NumIntArchRegs + 2) | 0x11); 560 //tc->setMiscRegNoEffect(MISCREG_CCR, tc->readMiscRegNoEffect(MISCREG_CCR) | 0x11); 561 IntReg val = -return_value.value(); 562 if (bits(tc->readMiscRegNoEffect( 563 SparcISA::MISCREG_PSTATE), 3, 3)) { 564 val = bits(val, 31, 0); 565 } 566 tc->setIntReg(ReturnValueReg, val); 567 } 568} 569