process.cc revision 5287:0ef7cfb67c97 
1/*
2 * Copyright (c) 2003-2004 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Ali Saidi
30 */
31
32#include "arch/sparc/asi.hh"
33#include "arch/sparc/handlers.hh"
34#include "arch/sparc/isa_traits.hh"
35#include "arch/sparc/process.hh"
36#include "arch/sparc/types.hh"
37#include "base/loader/object_file.hh"
38#include "base/loader/elf_object.hh"
39#include "base/misc.hh"
40#include "cpu/thread_context.hh"
41#include "mem/page_table.hh"
42#include "sim/process_impl.hh"
43#include "mem/translating_port.hh"
44#include "sim/system.hh"
45
46using namespace std;
47using namespace SparcISA;
48
49
50SparcLiveProcess::SparcLiveProcess(LiveProcessParams * params,
51        ObjectFile *objFile, Addr _StackBias)
52    : LiveProcess(params, objFile), StackBias(_StackBias)
53{
54
55    // XXX all the below need to be updated for SPARC - Ali
56    brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
57    brk_point = roundUp(brk_point, VMPageSize);
58
59    // Set pointer for next thread stack.  Reserve 8M for main stack.
60    next_thread_stack_base = stack_base - (8 * 1024 * 1024);
61
62    //Initialize these to 0s
63    fillStart = 0;
64    spillStart = 0;
65}
66
67void SparcLiveProcess::handleTrap(int trapNum, ThreadContext *tc)
68{
69    switch(trapNum)
70    {
71      case 0x01: //Software breakpoint
72        warn("Software breakpoint encountered at pc %#x.\n", tc->readPC());
73        break;
74      case 0x02: //Division by zero
75        warn("Software signaled a division by zero at pc %#x.\n",
76                tc->readPC());
77        break;
78      case 0x03: //Flush window trap
79        flushWindows(tc);
80        break;
81      case 0x04: //Clean windows
82        warn("Ignoring process request for clean register "
83                "windows at pc %#x.\n", tc->readPC());
84        break;
85      case 0x05: //Range check
86        warn("Software signaled a range check at pc %#x.\n",
87                tc->readPC());
88        break;
89      case 0x06: //Fix alignment
90        warn("Ignoring process request for os assisted unaligned accesses "
91                "at pc %#x.\n", tc->readPC());
92        break;
93      case 0x07: //Integer overflow
94        warn("Software signaled an integer overflow at pc %#x.\n",
95                tc->readPC());
96        break;
97      case 0x32: //Get integer condition codes
98        warn("Ignoring process request to get the integer condition codes "
99                "at pc %#x.\n", tc->readPC());
100        break;
101      case 0x33: //Set integer condition codes
102        warn("Ignoring process request to set the integer condition codes "
103                "at pc %#x.\n", tc->readPC());
104        break;
105      default:
106        panic("Unimplemented trap to operating system: trap number %#x.\n", trapNum);
107    }
108}
109
110void
111SparcLiveProcess::startup()
112{
113    Process::startup();
114
115    //From the SPARC ABI
116
117    //Setup default FP state
118    threadContexts[0]->setMiscRegNoEffect(MISCREG_FSR, 0);
119
120    threadContexts[0]->setMiscRegNoEffect(MISCREG_TICK, 0);
121
122    /*
123     * Register window management registers
124     */
125
126    //No windows contain info from other programs
127    //threadContexts[0]->setMiscRegNoEffect(MISCREG_OTHERWIN, 0);
128    threadContexts[0]->setIntReg(NumIntArchRegs + 6, 0);
129    //There are no windows to pop
130    //threadContexts[0]->setMiscRegNoEffect(MISCREG_CANRESTORE, 0);
131    threadContexts[0]->setIntReg(NumIntArchRegs + 4, 0);
132    //All windows are available to save into
133    //threadContexts[0]->setMiscRegNoEffect(MISCREG_CANSAVE, NWindows - 2);
134    threadContexts[0]->setIntReg(NumIntArchRegs + 3, NWindows - 2);
135    //All windows are "clean"
136    //threadContexts[0]->setMiscRegNoEffect(MISCREG_CLEANWIN, NWindows);
137    threadContexts[0]->setIntReg(NumIntArchRegs + 5, NWindows);
138    //Start with register window 0
139    threadContexts[0]->setMiscRegNoEffect(MISCREG_CWP, 0);
140    //Always use spill and fill traps 0
141    //threadContexts[0]->setMiscRegNoEffect(MISCREG_WSTATE, 0);
142    threadContexts[0]->setIntReg(NumIntArchRegs + 7, 0);
143    //Set the trap level to 0
144    threadContexts[0]->setMiscRegNoEffect(MISCREG_TL, 0);
145    //Set the ASI register to something fixed
146    threadContexts[0]->setMiscRegNoEffect(MISCREG_ASI, ASI_PRIMARY);
147
148    /*
149     * T1 specific registers
150     */
151    //Turn on the icache, dcache, dtb translation, and itb translation.
152    threadContexts[0]->setMiscRegNoEffect(MISCREG_MMU_LSU_CTRL, 15);
153}
154
155void
156Sparc32LiveProcess::startup()
157{
158    if (checkpointRestored)
159        return;
160
161    SparcLiveProcess::startup();
162
163    //The process runs in user mode with 32 bit addresses
164    threadContexts[0]->setMiscReg(MISCREG_PSTATE, 0x0a);
165
166    argsInit(32 / 8, VMPageSize);
167}
168
169void
170Sparc64LiveProcess::startup()
171{
172    if (checkpointRestored)
173        return;
174
175    SparcLiveProcess::startup();
176
177    //The process runs in user mode
178    threadContexts[0]->setMiscReg(MISCREG_PSTATE, 0x02);
179
180    argsInit(sizeof(IntReg), VMPageSize);
181}
182
183template<class IntType>
184void
185SparcLiveProcess::argsInit(int pageSize)
186{
187    int intSize = sizeof(IntType);
188
189    typedef M5_auxv_t<IntType> auxv_t;
190
191    std::vector<auxv_t> auxv;
192
193    string filename;
194    if(argv.size() < 1)
195        filename = "";
196    else
197        filename = argv[0];
198
199    //Even for a 32 bit process, the ABI says we still need to
200    //maintain double word alignment of the stack pointer.
201    uint64_t align = 16;
202
203    // load object file into target memory
204    objFile->loadSections(initVirtMem);
205
206    enum hardwareCaps
207    {
208        M5_HWCAP_SPARC_FLUSH = 1,
209        M5_HWCAP_SPARC_STBAR = 2,
210        M5_HWCAP_SPARC_SWAP = 4,
211        M5_HWCAP_SPARC_MULDIV = 8,
212        M5_HWCAP_SPARC_V9 = 16,
213        //This one should technically only be set
214        //if there is a cheetah or cheetah_plus tlb,
215        //but we'll use it all the time
216        M5_HWCAP_SPARC_ULTRA3 = 32
217    };
218
219    const int64_t hwcap =
220        M5_HWCAP_SPARC_FLUSH |
221        M5_HWCAP_SPARC_STBAR |
222        M5_HWCAP_SPARC_SWAP |
223        M5_HWCAP_SPARC_MULDIV |
224        M5_HWCAP_SPARC_V9 |
225        M5_HWCAP_SPARC_ULTRA3;
226
227    //Setup the auxilliary vectors. These will already have endian conversion.
228    //Auxilliary vectors are loaded only for elf formatted executables.
229    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
230    if(elfObject)
231    {
232        //Bits which describe the system hardware capabilities
233        auxv.push_back(auxv_t(M5_AT_HWCAP, hwcap));
234        //The system page size
235        auxv.push_back(auxv_t(M5_AT_PAGESZ, SparcISA::VMPageSize));
236        //Defined to be 100 in the kernel source.
237        //Frequency at which times() increments
238        auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
239        // For statically linked executables, this is the virtual address of the
240        // program header tables if they appear in the executable image
241        auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
242        // This is the size of a program header entry from the elf file.
243        auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
244        // This is the number of program headers from the original elf file.
245        auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
246        //This is the address of the elf "interpreter", It should be set
247        //to 0 for regular executables. It should be something else
248        //(not sure what) for dynamic libraries.
249        auxv.push_back(auxv_t(M5_AT_BASE, 0));
250        //This is hardwired to 0 in the elf loading code in the kernel
251        auxv.push_back(auxv_t(M5_AT_FLAGS, 0));
252        //The entry point to the program
253        auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
254        //Different user and group IDs
255        auxv.push_back(auxv_t(M5_AT_UID, uid()));
256        auxv.push_back(auxv_t(M5_AT_EUID, euid()));
257        auxv.push_back(auxv_t(M5_AT_GID, gid()));
258        auxv.push_back(auxv_t(M5_AT_EGID, egid()));
259        //Whether to enable "secure mode" in the executable
260        auxv.push_back(auxv_t(M5_AT_SECURE, 0));
261    }
262
263    //Figure out how big the initial stack needs to be
264
265    // The unaccounted for 8 byte 0 at the top of the stack
266    int sentry_size = 8;
267
268    //This is the name of the file which is present on the initial stack
269    //It's purpose is to let the user space linker examine the original file.
270    int file_name_size = filename.size() + 1;
271
272    int env_data_size = 0;
273    for (int i = 0; i < envp.size(); ++i) {
274        env_data_size += envp[i].size() + 1;
275    }
276    int arg_data_size = 0;
277    for (int i = 0; i < argv.size(); ++i) {
278        arg_data_size += argv[i].size() + 1;
279    }
280
281    //The info_block.
282    int base_info_block_size =
283        sentry_size + file_name_size + env_data_size + arg_data_size;
284
285    int info_block_size = roundUp(base_info_block_size, align);
286
287    int info_block_padding = info_block_size - base_info_block_size;
288
289    //Each auxilliary vector is two words
290    int aux_array_size = intSize * 2 * (auxv.size() + 1);
291
292    int envp_array_size = intSize * (envp.size() + 1);
293    int argv_array_size = intSize * (argv.size() + 1);
294
295    int argc_size = intSize;
296    int window_save_size = intSize * 16;
297
298    //Figure out the size of the contents of the actual initial frame
299    int frame_size =
300        aux_array_size +
301        envp_array_size +
302        argv_array_size +
303        argc_size +
304        window_save_size;
305
306    //There needs to be padding after the auxiliary vector data so that the
307    //very bottom of the stack is aligned properly.
308    int aligned_partial_size = roundUp(frame_size, align);
309    int aux_padding = aligned_partial_size - frame_size;
310
311    int space_needed =
312        info_block_size +
313        aux_padding +
314        frame_size;
315
316    stack_min = stack_base - space_needed;
317    stack_min = roundDown(stack_min, align);
318    stack_size = stack_base - stack_min;
319
320    // Allocate space for the stack
321    pTable->allocate(roundDown(stack_min, pageSize),
322                     roundUp(stack_size, pageSize));
323
324    // map out initial stack contents
325    IntType sentry_base = stack_base - sentry_size;
326    IntType file_name_base = sentry_base - file_name_size;
327    IntType env_data_base = file_name_base - env_data_size;
328    IntType arg_data_base = env_data_base - arg_data_size;
329    IntType auxv_array_base = arg_data_base -
330        info_block_padding - aux_array_size - aux_padding;
331    IntType envp_array_base = auxv_array_base - envp_array_size;
332    IntType argv_array_base = envp_array_base - argv_array_size;
333    IntType argc_base = argv_array_base - argc_size;
334#if TRACING_ON
335    IntType window_save_base = argc_base - window_save_size;
336#endif
337
338    DPRINTF(Sparc, "The addresses of items on the initial stack:\n");
339    DPRINTF(Sparc, "%#x - sentry NULL\n", sentry_base);
340    DPRINTF(Sparc, "filename = %s\n", filename);
341    DPRINTF(Sparc, "%#x - file name\n", file_name_base);
342    DPRINTF(Sparc, "%#x - env data\n", env_data_base);
343    DPRINTF(Sparc, "%#x - arg data\n", arg_data_base);
344    DPRINTF(Sparc, "%#x - auxv array\n", auxv_array_base);
345    DPRINTF(Sparc, "%#x - envp array\n", envp_array_base);
346    DPRINTF(Sparc, "%#x - argv array\n", argv_array_base);
347    DPRINTF(Sparc, "%#x - argc \n", argc_base);
348    DPRINTF(Sparc, "%#x - window save\n", window_save_base);
349    DPRINTF(Sparc, "%#x - stack min\n", stack_min);
350
351    assert(window_save_base == stack_min);
352
353    // write contents to stack
354
355    // figure out argc
356    IntType argc = argv.size();
357    IntType guestArgc = TheISA::htog(argc);
358
359    //Write out the sentry void *
360    uint64_t sentry_NULL = 0;
361    initVirtMem->writeBlob(sentry_base,
362            (uint8_t*)&sentry_NULL, sentry_size);
363
364    //Write the file name
365    initVirtMem->writeString(file_name_base, filename.c_str());
366
367    //Copy the aux stuff
368    for(int x = 0; x < auxv.size(); x++)
369    {
370        initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize,
371                (uint8_t*)&(auxv[x].a_type), intSize);
372        initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
373                (uint8_t*)&(auxv[x].a_val), intSize);
374    }
375
376    //Write out the terminating zeroed auxilliary vector
377    const IntType zero = 0;
378    initVirtMem->writeBlob(auxv_array_base + intSize * 2 * auxv.size(),
379            (uint8_t*)&zero, intSize);
380    initVirtMem->writeBlob(auxv_array_base + intSize * (2 * auxv.size() + 1),
381            (uint8_t*)&zero, intSize);
382
383    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
384    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
385
386    initVirtMem->writeBlob(argc_base, (uint8_t*)&guestArgc, intSize);
387
388    //Set up space for the trap handlers into the processes address space.
389    //Since the stack grows down and there is reserved address space abov
390    //it, we can put stuff above it and stay out of the way.
391    fillStart = stack_base;
392    spillStart = fillStart + sizeof(MachInst) * numFillInsts;
393
394    //Set up the thread context to start running the process
395    //assert(NumArgumentRegs >= 2);
396    //threadContexts[0]->setIntReg(ArgumentReg[0], argc);
397    //threadContexts[0]->setIntReg(ArgumentReg[1], argv_array_base);
398    threadContexts[0]->setIntReg(StackPointerReg, stack_min - StackBias);
399
400    // %g1 is a pointer to a function that should be run at exit. Since we
401    // don't have anything like that, it should be set to 0.
402    threadContexts[0]->setIntReg(1, 0);
403
404    Addr prog_entry = objFile->entryPoint();
405    threadContexts[0]->setPC(prog_entry);
406    threadContexts[0]->setNextPC(prog_entry + sizeof(MachInst));
407    threadContexts[0]->setNextNPC(prog_entry + (2 * sizeof(MachInst)));
408
409    //Align the "stack_min" to a page boundary.
410    stack_min = roundDown(stack_min, pageSize);
411
412//    num_processes++;
413}
414
415void
416Sparc64LiveProcess::argsInit(int intSize, int pageSize)
417{
418    SparcLiveProcess::argsInit<uint64_t>(pageSize);
419
420    // Stuff the trap handlers into the process address space
421    initVirtMem->writeBlob(fillStart,
422            (uint8_t*)fillHandler64, sizeof(MachInst) * numFillInsts);
423    initVirtMem->writeBlob(spillStart,
424            (uint8_t*)spillHandler64, sizeof(MachInst) *  numSpillInsts);
425}
426
427void
428Sparc32LiveProcess::argsInit(int intSize, int pageSize)
429{
430    SparcLiveProcess::argsInit<uint32_t>(pageSize);
431
432    // Stuff the trap handlers into the process address space
433    initVirtMem->writeBlob(fillStart,
434            (uint8_t*)fillHandler32, sizeof(MachInst) * numFillInsts);
435    initVirtMem->writeBlob(spillStart,
436            (uint8_t*)spillHandler32, sizeof(MachInst) *  numSpillInsts);
437}
438
439void Sparc32LiveProcess::flushWindows(ThreadContext *tc)
440{
441    IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
442    IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
443    IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
444    MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
445    MiscReg origCWP = CWP;
446    CWP = (CWP + Cansave + 2) % NWindows;
447    while(NWindows - 2 - Cansave != 0)
448    {
449        if (Otherwin) {
450            panic("Otherwin non-zero.\n");
451        } else {
452            tc->setMiscReg(MISCREG_CWP, CWP);
453            //Do the stores
454            IntReg sp = tc->readIntReg(StackPointerReg);
455            for (int index = 16; index < 32; index++) {
456                uint32_t regVal = tc->readIntReg(index);
457                regVal = htog(regVal);
458                if (!tc->getMemPort()->tryWriteBlob(
459                        sp + (index - 16) * 4, (uint8_t *)&regVal, 4)) {
460                    warn("Failed to save register to the stack when "
461                            "flushing windows.\n");
462                }
463            }
464            Canrestore--;
465            Cansave++;
466            CWP = (CWP + 1) % NWindows;
467        }
468    }
469    tc->setIntReg(NumIntArchRegs + 3, Cansave);
470    tc->setIntReg(NumIntArchRegs + 4, Canrestore);
471    tc->setMiscReg(MISCREG_CWP, origCWP);
472}
473
474void Sparc64LiveProcess::flushWindows(ThreadContext *tc)
475{
476    IntReg Cansave = tc->readIntReg(NumIntArchRegs + 3);
477    IntReg Canrestore = tc->readIntReg(NumIntArchRegs + 4);
478    IntReg Otherwin = tc->readIntReg(NumIntArchRegs + 6);
479    MiscReg CWP = tc->readMiscReg(MISCREG_CWP);
480    MiscReg origCWP = CWP;
481    CWP = (CWP + Cansave + 2) % NWindows;
482    while(NWindows - 2 - Cansave != 0)
483    {
484        if (Otherwin) {
485            panic("Otherwin non-zero.\n");
486        } else {
487            tc->setMiscReg(MISCREG_CWP, CWP);
488            //Do the stores
489            IntReg sp = tc->readIntReg(StackPointerReg);
490            for (int index = 16; index < 32; index++) {
491                IntReg regVal = tc->readIntReg(index);
492                regVal = htog(regVal);
493                if (!tc->getMemPort()->tryWriteBlob(
494                        sp + 2047 + (index - 16) * 8, (uint8_t *)&regVal, 8)) {
495                    warn("Failed to save register to the stack when "
496                            "flushing windows.\n");
497                }
498            }
499            Canrestore--;
500            Cansave++;
501            CWP = (CWP + 1) % NWindows;
502        }
503    }
504    tc->setIntReg(NumIntArchRegs + 3, Cansave);
505    tc->setIntReg(NumIntArchRegs + 4, Canrestore);
506    tc->setMiscReg(MISCREG_CWP, origCWP);
507}
508