isa_traits.hh revision 9329:3fe8438cbcfc
1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 */ 31 32#ifndef __ARCH_SPARC_ISA_TRAITS_HH__ 33#define __ARCH_SPARC_ISA_TRAITS_HH__ 34 35#include "arch/sparc/sparc_traits.hh" 36#include "arch/sparc/types.hh" 37#include "base/types.hh" 38#include "cpu/static_inst_fwd.hh" 39 40namespace BigEndianGuest {} 41 42namespace SparcISA 43{ 44const int MachineBytes = 8; 45 46// This makes sure the big endian versions of certain functions are used. 47using namespace BigEndianGuest; 48 49// SPARC has a delay slot 50#define ISA_HAS_DELAY_SLOT 1 51 52// SPARC NOP (sethi %(hi(0), g0) 53const MachInst NoopMachInst = 0x01000000; 54 55// 8K. This value is implmentation specific; and should probably 56// be somewhere else. 57const int LogVMPageSize = 13; 58const int VMPageSize = (1 << LogVMPageSize); 59 60// real address virtual mapping 61// sort of like alpha super page, but less frequently used 62const Addr SegKPMEnd = ULL(0xfffffffc00000000); 63const Addr SegKPMBase = ULL(0xfffffac000000000); 64 65// Why does both the previous set of constants and this one exist? 66const int PageShift = 13; 67const int PageBytes = 1ULL << PageShift; 68 69const int BranchPredAddrShiftAmt = 2; 70 71StaticInstPtr decodeInst(ExtMachInst); 72 73/////////// TLB Stuff //////////// 74const Addr StartVAddrHole = ULL(0x0000800000000000); 75const Addr EndVAddrHole = ULL(0xFFFF7FFFFFFFFFFF); 76const Addr VAddrAMask = ULL(0xFFFFFFFF); 77const Addr PAddrImplMask = ULL(0x000000FFFFFFFFFF); 78const Addr BytesInPageMask = ULL(0x1FFF); 79 80enum InterruptTypes 81{ 82 IT_TRAP_LEVEL_ZERO, 83 IT_HINTP, 84 IT_INT_VEC, 85 IT_CPU_MONDO, 86 IT_DEV_MONDO, 87 IT_RES_ERROR, 88 IT_SOFT_INT, 89 NumInterruptTypes 90}; 91 92// Memory accesses cannot be unaligned 93const bool HasUnalignedMemAcc = false; 94 95const bool CurThreadInfoImplemented = false; 96const int CurThreadInfoReg = -1; 97 98} 99 100#endif // __ARCH_SPARC_ISA_TRAITS_HH__ 101