isa_traits.hh revision 6974:4d4903a3e7c5
1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 */ 31 32#ifndef __ARCH_SPARC_ISA_TRAITS_HH__ 33#define __ARCH_SPARC_ISA_TRAITS_HH__ 34 35#include "arch/sparc/types.hh" 36#include "arch/sparc/sparc_traits.hh" 37#include "base/types.hh" 38#include "config/full_system.hh" 39 40class StaticInstPtr; 41 42namespace BigEndianGuest {} 43 44namespace SparcISA 45{ 46 const int MachineBytes = 8; 47 48 //This makes sure the big endian versions of certain functions are used. 49 using namespace BigEndianGuest; 50 51 // SPARC has a delay slot 52 #define ISA_HAS_DELAY_SLOT 1 53 54 // SPARC NOP (sethi %(hi(0), g0) 55 const MachInst NoopMachInst = 0x01000000; 56 57 //8K. This value is implmentation specific; and should probably 58 //be somewhere else. 59 const int LogVMPageSize = 13; 60 const int VMPageSize = (1 << LogVMPageSize); 61 62 // real address virtual mapping 63 // sort of like alpha super page, but less frequently used 64 const Addr SegKPMEnd = ULL(0xfffffffc00000000); 65 const Addr SegKPMBase = ULL(0xfffffac000000000); 66 67 //Why does both the previous set of constants and this one exist? 68 const int PageShift = 13; 69 const int PageBytes = 1ULL << PageShift; 70 71 const int BranchPredAddrShiftAmt = 2; 72 73 StaticInstPtr decodeInst(ExtMachInst); 74 75 /////////// TLB Stuff //////////// 76 const Addr StartVAddrHole = ULL(0x0000800000000000); 77 const Addr EndVAddrHole = ULL(0xFFFF7FFFFFFFFFFF); 78 const Addr VAddrAMask = ULL(0xFFFFFFFF); 79 const Addr PAddrImplMask = ULL(0x000000FFFFFFFFFF); 80 const Addr BytesInPageMask = ULL(0x1FFF); 81 82#if FULL_SYSTEM 83 // I don't know what it's for, so I don't 84 // know what SPARC's value should be 85 // For loading... XXX This maybe could be USegEnd?? --ali 86 const Addr LoadAddrMask = ULL(0xffffffffff); 87 88 enum InterruptTypes 89 { 90 IT_TRAP_LEVEL_ZERO, 91 IT_HINTP, 92 IT_INT_VEC, 93 IT_CPU_MONDO, 94 IT_DEV_MONDO, 95 IT_RES_ERROR, 96 IT_SOFT_INT, 97 NumInterruptTypes 98 }; 99 100#endif 101 102// Memory accesses cannot be unaligned 103const bool HasUnalignedMemAcc = false; 104} 105 106#endif // __ARCH_SPARC_ISA_TRAITS_HH__ 107