includes.isa revision 3385:b28a1fd5a5c7
1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright 9// notice, this list of conditions and the following disclaimer in the 10// documentation and/or other materials provided with the distribution; 11// neither the name of the copyright holders nor the names of its 12// contributors may be used to endorse or promote products derived from 13// this software without specific prior written permission. 14// 15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26// 27// Authors: Ali Saidi 28// Gabe Black 29// Steve Reinhardt 30 31//////////////////////////////////////////////////////////////////// 32// 33// Output include file directives. 34// 35 36output header {{ 37#include <sstream> 38#include <iostream> 39 40#include "cpu/static_inst.hh" 41#include "arch/sparc/faults.hh" 42#include "mem/request.hh" // some constructors use MemReq flags 43#include "mem/packet.hh" 44#include "arch/sparc/isa_traits.hh" 45#include "arch/sparc/regfile.hh" 46}}; 47 48output decoder {{ 49#include "base/cprintf.hh" 50#include "base/loader/symtab.hh" 51#include "cpu/thread_context.hh" // for Jump::branchTarget() 52 53#if defined(linux) 54#include <fenv.h> 55#endif 56 57using namespace SparcISA; 58}}; 59 60output exec {{ 61#if defined(linux) 62#include <fenv.h> 63#endif 64 65#include "arch/sparc/asi.hh" 66#include "cpu/base.hh" 67#include "cpu/exetrace.hh" 68#include "sim/sim_exit.hh" 69 70using namespace SparcISA; 71}}; 72 73