priv.isa revision 2632
1// Copyright (c) 2006 The Regents of The University of Michigan 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are 6// met: redistributions of source code must retain the above copyright 7// notice, this list of conditions and the following disclaimer; 8// redistributions in binary form must reproduce the above copyright 9// notice, this list of conditions and the following disclaimer in the 10// documentation and/or other materials provided with the distribution; 11// neither the name of the copyright holders nor the names of its 12// contributors may be used to endorse or promote products derived from 13// this software without specific prior written permission. 14// 15// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 18// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 19// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 21// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26// 27// Authors: Ali Saidi 28// Gabe Black 29// Steve Reinhardt 30 31//////////////////////////////////////////////////////////////////// 32// 33// Privilege mode instructions 34// 35 36output header {{ 37 /** 38 * Base class for privelege mode operations. 39 */ 40 class Priv : public SparcStaticInst 41 { 42 protected: 43 // Constructor 44 Priv(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 45 SparcStaticInst(mnem, _machInst, __opClass) 46 { 47 } 48 49 std::string generateDisassembly(Addr pc, 50 const SymbolTable *symtab) const; 51 }; 52 53 /** 54 * Base class for user mode "tick" access. 55 */ 56 class PrivTick : public SparcStaticInst 57 { 58 protected: 59 // Constructor 60 PrivTick(const char *mnem, ExtMachInst _machInst, 61 OpClass __opClass) : 62 SparcStaticInst(mnem, _machInst, __opClass) 63 { 64 } 65 66 std::string generateDisassembly(Addr pc, 67 const SymbolTable *symtab) const; 68 }; 69 70 /** 71 * Base class for privelege mode operations with immediates. 72 */ 73 class PrivImm : public Priv 74 { 75 protected: 76 // Constructor 77 PrivImm(const char *mnem, ExtMachInst _machInst, 78 OpClass __opClass) : 79 Priv(mnem, _machInst, __opClass), imm(SIMM13) 80 { 81 } 82 83 int32_t imm; 84 }; 85 86 /** 87 * Base class for user mode "tick" access with immediates. 88 */ 89 class PrivTickImm : public PrivTick 90 { 91 protected: 92 // Constructor 93 PrivTickImm(const char *mnem, ExtMachInst _machInst, 94 OpClass __opClass) : 95 PrivTick(mnem, _machInst, __opClass), imm(SIMM13) 96 { 97 } 98 99 int32_t imm; 100 }; 101}}; 102 103output decoder {{ 104 std::string Priv::generateDisassembly(Addr pc, 105 const SymbolTable *symtab) const 106 { 107 return "Privileged Instruction"; 108 } 109 110 std::string PrivTick::generateDisassembly(Addr pc, 111 const SymbolTable *symtab) const 112 { 113 return "Regular access to Tick"; 114 } 115}}; 116 117def template PrivExecute {{ 118 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 119 Trace::InstRecord *traceData) const 120 { 121 %(op_decl)s; 122 %(op_rd)s; 123 124 //If the processor isn't in privileged mode, fault out right away 125 if(%(check)s) 126 return new PrivilegedAction; 127 128 %(code)s; 129 %(op_wb)s; 130 return NoFault; 131 } 132}}; 133 134let {{ 135 def doPrivFormat(code, checkCode, name, Name, opt_flags): 136 (usesImm, code, immCode, 137 rString, iString) = splitOutImm(code) 138 iop = InstObjParams(name, Name, 'Priv', code, 139 opt_flags, ("check", checkCode)) 140 header_output = BasicDeclare.subst(iop) 141 decoder_output = BasicConstructor.subst(iop) 142 exec_output = PrivExecute.subst(iop) 143 if usesImm: 144 imm_iop = InstObjParams(name, Name + 'Imm', 'PrivImm', 145 immCode, opt_flags, ("check", checkCode)) 146 header_output += BasicDeclare.subst(imm_iop) 147 decoder_output += BasicConstructor.subst(imm_iop) 148 exec_output += PrivExecute.subst(imm_iop) 149 decode_block = ROrImmDecode.subst(iop) 150 else: 151 decode_block = BasicDecode.subst(iop) 152 return (header_output, decoder_output, exec_output, decode_block) 153}}; 154 155// Primary format for integer operate instructions: 156def format Priv(code, *opt_flags) {{ 157 checkCode = "(!PstatePriv)" 158 (header_output, decoder_output, 159 exec_output, decode_block) = doPrivFormat(code, 160 checkCode, name, Name, opt_flags) 161}}; 162 163// Primary format for integer operate instructions: 164def format PrivTick(code, *opt_flags) {{ 165 checkCode = "(!PstatePriv && TickNpt)" 166 (header_output, decoder_output, 167 exec_output, decode_block) = doPrivFormat(code, 168 checkCode, name, Name, opt_flags) 169}}; 170