priv.isa revision 3418
12632Sstever@eecs.umich.edu// Copyright (c) 2006 The Regents of The University of Michigan 22632Sstever@eecs.umich.edu// All rights reserved. 32632Sstever@eecs.umich.edu// 42632Sstever@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 52632Sstever@eecs.umich.edu// modification, are permitted provided that the following conditions are 62632Sstever@eecs.umich.edu// met: redistributions of source code must retain the above copyright 72632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 82632Sstever@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 92632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 102632Sstever@eecs.umich.edu// documentation and/or other materials provided with the distribution; 112632Sstever@eecs.umich.edu// neither the name of the copyright holders nor the names of its 122632Sstever@eecs.umich.edu// contributors may be used to endorse or promote products derived from 132632Sstever@eecs.umich.edu// this software without specific prior written permission. 142632Sstever@eecs.umich.edu// 152632Sstever@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 162632Sstever@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 172632Sstever@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 182632Sstever@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 192632Sstever@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 202632Sstever@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 212632Sstever@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 222632Sstever@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 232632Sstever@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 242632Sstever@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 252632Sstever@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 262632Sstever@eecs.umich.edu// 272632Sstever@eecs.umich.edu// Authors: Ali Saidi 282632Sstever@eecs.umich.edu// Gabe Black 292632Sstever@eecs.umich.edu// Steve Reinhardt 302632Sstever@eecs.umich.edu 312469SN/A//////////////////////////////////////////////////////////////////// 322469SN/A// 332482SN/A// Privilege mode instructions 342469SN/A// 352469SN/A 362469SN/Aoutput header {{ 372469SN/A /** 382469SN/A * Base class for privelege mode operations. 392469SN/A */ 402469SN/A class Priv : public SparcStaticInst 412469SN/A { 422469SN/A protected: 432469SN/A // Constructor 442469SN/A Priv(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 452469SN/A SparcStaticInst(mnem, _machInst, __opClass) 462469SN/A { 472469SN/A } 482469SN/A 492469SN/A std::string generateDisassembly(Addr pc, 502469SN/A const SymbolTable *symtab) const; 512469SN/A }; 522469SN/A 532469SN/A /** 542469SN/A * Base class for privelege mode operations with immediates. 552469SN/A */ 562469SN/A class PrivImm : public Priv 572469SN/A { 582469SN/A protected: 592469SN/A // Constructor 602469SN/A PrivImm(const char *mnem, ExtMachInst _machInst, 612469SN/A OpClass __opClass) : 622469SN/A Priv(mnem, _machInst, __opClass), imm(SIMM13) 632469SN/A { 642469SN/A } 652469SN/A 662526SN/A int32_t imm; 672469SN/A }; 682469SN/A 692469SN/A}}; 702469SN/A 712469SN/Aoutput decoder {{ 722469SN/A std::string Priv::generateDisassembly(Addr pc, 732469SN/A const SymbolTable *symtab) const 742469SN/A { 752944Sgblack@eecs.umich.edu std::stringstream response; 762944Sgblack@eecs.umich.edu 772944Sgblack@eecs.umich.edu printMnemonic(response, mnemonic); 782944Sgblack@eecs.umich.edu 792944Sgblack@eecs.umich.edu return response.str(); 802469SN/A } 812469SN/A}}; 822469SN/A 832469SN/Adef template PrivExecute {{ 842469SN/A Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 852469SN/A Trace::InstRecord *traceData) const 862469SN/A { 872469SN/A %(op_decl)s; 882469SN/A %(op_rd)s; 892469SN/A 902469SN/A //If the processor isn't in privileged mode, fault out right away 912526SN/A if(%(check)s) 922488SN/A return new PrivilegedAction; 932469SN/A 942938Sgblack@eecs.umich.edu Fault fault = NoFault; 952469SN/A %(code)s; 962469SN/A %(op_wb)s; 972938Sgblack@eecs.umich.edu return fault; 982469SN/A } 992469SN/A}}; 1002469SN/A 1012526SN/Alet {{ 1022526SN/A def doPrivFormat(code, checkCode, name, Name, opt_flags): 1032526SN/A (usesImm, code, immCode, 1042526SN/A rString, iString) = splitOutImm(code) 1052526SN/A iop = InstObjParams(name, Name, 'Priv', code, 1063274Sgblack@eecs.umich.edu opt_flags, {"check": checkCode}) 1072469SN/A header_output = BasicDeclare.subst(iop) 1082469SN/A decoder_output = BasicConstructor.subst(iop) 1092469SN/A exec_output = PrivExecute.subst(iop) 1102526SN/A if usesImm: 1112526SN/A imm_iop = InstObjParams(name, Name + 'Imm', 'PrivImm', 1123274Sgblack@eecs.umich.edu immCode, opt_flags, {"check": checkCode}) 1132469SN/A header_output += BasicDeclare.subst(imm_iop) 1142469SN/A decoder_output += BasicConstructor.subst(imm_iop) 1152469SN/A exec_output += PrivExecute.subst(imm_iop) 1162482SN/A decode_block = ROrImmDecode.subst(iop) 1172469SN/A else: 1182469SN/A decode_block = BasicDecode.subst(iop) 1192526SN/A return (header_output, decoder_output, exec_output, decode_block) 1202526SN/A}}; 1212526SN/A 1222526SN/A// Primary format for integer operate instructions: 1232526SN/Adef format Priv(code, *opt_flags) {{ 1243418Sgblack@eecs.umich.edu checkCode = "!(Pstate<2:2> || Hpstate<2:2>)" 1252526SN/A (header_output, decoder_output, 1262526SN/A exec_output, decode_block) = doPrivFormat(code, 1272940Sgblack@eecs.umich.edu checkCode, name, Name, opt_flags + ('IprAccessOp',)) 1282469SN/A}}; 1292469SN/A 1302938Sgblack@eecs.umich.edudef format HPriv(code, *opt_flags) {{ 1313418Sgblack@eecs.umich.edu checkCode = "!Hpstate<2:2>" 1322938Sgblack@eecs.umich.edu (header_output, decoder_output, 1332938Sgblack@eecs.umich.edu exec_output, decode_block) = doPrivFormat(code, 1342940Sgblack@eecs.umich.edu checkCode, name, Name, opt_flags + ('IprAccessOp',)) 1352938Sgblack@eecs.umich.edu}}; 1362646Ssaidi@eecs.umich.edu 137