util.isa revision 4648
13931Ssaidi@eecs.umich.edu// Copyright (c) 2006-2007 The Regents of The University of Michigan 23388Sgblack@eecs.umich.edu// All rights reserved. 33388Sgblack@eecs.umich.edu// 43388Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 53388Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 63388Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 73388Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 83388Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 93388Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 103388Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 113388Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 123388Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 133388Sgblack@eecs.umich.edu// this software without specific prior written permission. 143388Sgblack@eecs.umich.edu// 153388Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 163388Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 173388Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 183388Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 193388Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 203388Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 213388Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 223388Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 233388Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 243388Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 253388Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 263388Sgblack@eecs.umich.edu// 273388Sgblack@eecs.umich.edu// Authors: Ali Saidi 283388Sgblack@eecs.umich.edu// Gabe Black 293388Sgblack@eecs.umich.edu// Steve Reinhardt 303388Sgblack@eecs.umich.edu 313388Sgblack@eecs.umich.edu//////////////////////////////////////////////////////////////////// 323388Sgblack@eecs.umich.edu// 333388Sgblack@eecs.umich.edu// Mem utility templates and functions 343388Sgblack@eecs.umich.edu// 353388Sgblack@eecs.umich.edu 363441Sgblack@eecs.umich.eduoutput header {{ 373441Sgblack@eecs.umich.edu /** 383441Sgblack@eecs.umich.edu * Base class for memory operations. 393441Sgblack@eecs.umich.edu */ 403441Sgblack@eecs.umich.edu class Mem : public SparcStaticInst 413441Sgblack@eecs.umich.edu { 423441Sgblack@eecs.umich.edu protected: 433441Sgblack@eecs.umich.edu 443441Sgblack@eecs.umich.edu // Constructor 453441Sgblack@eecs.umich.edu Mem(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 463441Sgblack@eecs.umich.edu SparcStaticInst(mnem, _machInst, __opClass) 473441Sgblack@eecs.umich.edu { 483441Sgblack@eecs.umich.edu } 493441Sgblack@eecs.umich.edu 503441Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, 513441Sgblack@eecs.umich.edu const SymbolTable *symtab) const; 523441Sgblack@eecs.umich.edu }; 533441Sgblack@eecs.umich.edu 543441Sgblack@eecs.umich.edu /** 553441Sgblack@eecs.umich.edu * Class for memory operations which use an immediate offset. 563441Sgblack@eecs.umich.edu */ 573441Sgblack@eecs.umich.edu class MemImm : public Mem 583441Sgblack@eecs.umich.edu { 593441Sgblack@eecs.umich.edu protected: 603441Sgblack@eecs.umich.edu 613441Sgblack@eecs.umich.edu // Constructor 623441Sgblack@eecs.umich.edu MemImm(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : 633441Sgblack@eecs.umich.edu Mem(mnem, _machInst, __opClass), imm(sext<13>(SIMM13)) 643441Sgblack@eecs.umich.edu {} 653441Sgblack@eecs.umich.edu 663441Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, 673441Sgblack@eecs.umich.edu const SymbolTable *symtab) const; 683441Sgblack@eecs.umich.edu 693441Sgblack@eecs.umich.edu const int32_t imm; 703441Sgblack@eecs.umich.edu }; 713441Sgblack@eecs.umich.edu}}; 723441Sgblack@eecs.umich.edu 733441Sgblack@eecs.umich.eduoutput decoder {{ 743441Sgblack@eecs.umich.edu std::string Mem::generateDisassembly(Addr pc, 753441Sgblack@eecs.umich.edu const SymbolTable *symtab) const 763441Sgblack@eecs.umich.edu { 773441Sgblack@eecs.umich.edu std::stringstream response; 783441Sgblack@eecs.umich.edu bool load = flags[IsLoad]; 793627Sgblack@eecs.umich.edu bool store = flags[IsStore]; 803441Sgblack@eecs.umich.edu 813441Sgblack@eecs.umich.edu printMnemonic(response, mnemonic); 823627Sgblack@eecs.umich.edu if(store) 833441Sgblack@eecs.umich.edu { 843627Sgblack@eecs.umich.edu printReg(response, _srcRegIdx[0]); 853441Sgblack@eecs.umich.edu ccprintf(response, ", "); 863441Sgblack@eecs.umich.edu } 873627Sgblack@eecs.umich.edu ccprintf(response, "["); 883627Sgblack@eecs.umich.edu if(_srcRegIdx[!store ? 0 : 1] != 0) 893627Sgblack@eecs.umich.edu { 903627Sgblack@eecs.umich.edu printSrcReg(response, !store ? 0 : 1); 913627Sgblack@eecs.umich.edu ccprintf(response, " + "); 923627Sgblack@eecs.umich.edu } 933627Sgblack@eecs.umich.edu printSrcReg(response, !store ? 1 : 2); 943627Sgblack@eecs.umich.edu ccprintf(response, "]"); 953441Sgblack@eecs.umich.edu if(load) 963441Sgblack@eecs.umich.edu { 973441Sgblack@eecs.umich.edu ccprintf(response, ", "); 983627Sgblack@eecs.umich.edu printReg(response, _destRegIdx[0]); 993441Sgblack@eecs.umich.edu } 1003441Sgblack@eecs.umich.edu 1013441Sgblack@eecs.umich.edu return response.str(); 1023441Sgblack@eecs.umich.edu } 1033441Sgblack@eecs.umich.edu 1043441Sgblack@eecs.umich.edu std::string MemImm::generateDisassembly(Addr pc, 1053441Sgblack@eecs.umich.edu const SymbolTable *symtab) const 1063441Sgblack@eecs.umich.edu { 1073441Sgblack@eecs.umich.edu std::stringstream response; 1083441Sgblack@eecs.umich.edu bool load = flags[IsLoad]; 1093441Sgblack@eecs.umich.edu bool save = flags[IsStore]; 1103441Sgblack@eecs.umich.edu 1113441Sgblack@eecs.umich.edu printMnemonic(response, mnemonic); 1123441Sgblack@eecs.umich.edu if(save) 1133441Sgblack@eecs.umich.edu { 1143627Sgblack@eecs.umich.edu printReg(response, _srcRegIdx[0]); 1153441Sgblack@eecs.umich.edu ccprintf(response, ", "); 1163441Sgblack@eecs.umich.edu } 1173627Sgblack@eecs.umich.edu ccprintf(response, "["); 1183627Sgblack@eecs.umich.edu if(_srcRegIdx[!save ? 0 : 1] != 0) 1193627Sgblack@eecs.umich.edu { 1203627Sgblack@eecs.umich.edu printReg(response, _srcRegIdx[!save ? 0 : 1]); 1213627Sgblack@eecs.umich.edu ccprintf(response, " + "); 1223627Sgblack@eecs.umich.edu } 1233441Sgblack@eecs.umich.edu if(imm >= 0) 1243627Sgblack@eecs.umich.edu ccprintf(response, "0x%x]", imm); 1253441Sgblack@eecs.umich.edu else 1263627Sgblack@eecs.umich.edu ccprintf(response, "-0x%x]", -imm); 1273441Sgblack@eecs.umich.edu if(load) 1283441Sgblack@eecs.umich.edu { 1293441Sgblack@eecs.umich.edu ccprintf(response, ", "); 1303627Sgblack@eecs.umich.edu printReg(response, _destRegIdx[0]); 1313441Sgblack@eecs.umich.edu } 1323441Sgblack@eecs.umich.edu 1333441Sgblack@eecs.umich.edu return response.str(); 1343441Sgblack@eecs.umich.edu } 1353441Sgblack@eecs.umich.edu}}; 1363441Sgblack@eecs.umich.edu 1373388Sgblack@eecs.umich.edu//This template provides the execute functions for a load 1383388Sgblack@eecs.umich.edudef template LoadExecute {{ 1393388Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 1403388Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 1413388Sgblack@eecs.umich.edu { 1423388Sgblack@eecs.umich.edu Fault fault = NoFault; 1433388Sgblack@eecs.umich.edu Addr EA; 1443931Ssaidi@eecs.umich.edu %(fp_enable_check)s; 1453388Sgblack@eecs.umich.edu %(op_decl)s; 1463388Sgblack@eecs.umich.edu %(op_rd)s; 1473388Sgblack@eecs.umich.edu %(ea_code)s; 1483766Sgblack@eecs.umich.edu DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); 1493391Sgblack@eecs.umich.edu %(fault_check)s; 1503391Sgblack@eecs.umich.edu if(fault == NoFault) 1513391Sgblack@eecs.umich.edu { 1524648Sgblack@eecs.umich.edu %(EA_trunc)s 1534040Ssaidi@eecs.umich.edu fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s); 1543391Sgblack@eecs.umich.edu } 1553391Sgblack@eecs.umich.edu if(fault == NoFault) 1563391Sgblack@eecs.umich.edu { 1573391Sgblack@eecs.umich.edu %(code)s; 1583391Sgblack@eecs.umich.edu } 1593388Sgblack@eecs.umich.edu if(fault == NoFault) 1603388Sgblack@eecs.umich.edu { 1613616Sgblack@eecs.umich.edu //Write the resulting state to the execution context 1623616Sgblack@eecs.umich.edu %(op_wb)s; 1633388Sgblack@eecs.umich.edu } 1643388Sgblack@eecs.umich.edu 1653388Sgblack@eecs.umich.edu return fault; 1663388Sgblack@eecs.umich.edu } 1673792Sgblack@eecs.umich.edu}}; 1683388Sgblack@eecs.umich.edu 1693792Sgblack@eecs.umich.edudef template LoadInitiateAcc {{ 1703388Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 1713388Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1723388Sgblack@eecs.umich.edu { 1733388Sgblack@eecs.umich.edu Fault fault = NoFault; 1743388Sgblack@eecs.umich.edu Addr EA; 1753931Ssaidi@eecs.umich.edu %(fp_enable_check)s; 1763792Sgblack@eecs.umich.edu %(op_decl)s; 1773792Sgblack@eecs.umich.edu %(op_rd)s; 1783388Sgblack@eecs.umich.edu %(ea_code)s; 1793766Sgblack@eecs.umich.edu DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); 1803391Sgblack@eecs.umich.edu %(fault_check)s; 1813391Sgblack@eecs.umich.edu if(fault == NoFault) 1823391Sgblack@eecs.umich.edu { 1834648Sgblack@eecs.umich.edu %(EA_trunc)s 1844040Ssaidi@eecs.umich.edu fault = xc->read(EA, (%(mem_acc_type)s%(mem_acc_size)s_t&)Mem, %(asi_val)s); 1853391Sgblack@eecs.umich.edu } 1863388Sgblack@eecs.umich.edu return fault; 1873388Sgblack@eecs.umich.edu } 1883792Sgblack@eecs.umich.edu}}; 1893388Sgblack@eecs.umich.edu 1903792Sgblack@eecs.umich.edudef template LoadCompleteAcc {{ 1913388Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr pkt, %(CPU_exec_context)s * xc, 1923388Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 1933388Sgblack@eecs.umich.edu { 1943388Sgblack@eecs.umich.edu Fault fault = NoFault; 1953792Sgblack@eecs.umich.edu %(op_decl)s; 1963792Sgblack@eecs.umich.edu %(op_rd)s; 1973388Sgblack@eecs.umich.edu Mem = pkt->get<typeof(Mem)>(); 1983388Sgblack@eecs.umich.edu %(code)s; 1993388Sgblack@eecs.umich.edu if(fault == NoFault) 2003388Sgblack@eecs.umich.edu { 2013792Sgblack@eecs.umich.edu %(op_wb)s; 2023388Sgblack@eecs.umich.edu } 2033388Sgblack@eecs.umich.edu return fault; 2043388Sgblack@eecs.umich.edu } 2053388Sgblack@eecs.umich.edu}}; 2063388Sgblack@eecs.umich.edu 2073388Sgblack@eecs.umich.edu//This template provides the execute functions for a store 2083388Sgblack@eecs.umich.edudef template StoreExecute {{ 2093388Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, 2103388Sgblack@eecs.umich.edu Trace::InstRecord *traceData) const 2113388Sgblack@eecs.umich.edu { 2123388Sgblack@eecs.umich.edu Fault fault = NoFault; 2133439Sgblack@eecs.umich.edu //This is to support the conditional store in cas instructions. 2143439Sgblack@eecs.umich.edu //It should be optomized out in all the others 2153439Sgblack@eecs.umich.edu bool storeCond = true; 2163388Sgblack@eecs.umich.edu Addr EA; 2173931Ssaidi@eecs.umich.edu %(fp_enable_check)s; 2183388Sgblack@eecs.umich.edu %(op_decl)s; 2193388Sgblack@eecs.umich.edu %(op_rd)s; 2203388Sgblack@eecs.umich.edu %(ea_code)s; 2213766Sgblack@eecs.umich.edu DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); 2223391Sgblack@eecs.umich.edu %(fault_check)s; 2233391Sgblack@eecs.umich.edu if(fault == NoFault) 2243391Sgblack@eecs.umich.edu { 2253391Sgblack@eecs.umich.edu %(code)s; 2263391Sgblack@eecs.umich.edu } 2273439Sgblack@eecs.umich.edu if(storeCond && fault == NoFault) 2283388Sgblack@eecs.umich.edu { 2294648Sgblack@eecs.umich.edu %(EA_trunc)s 2304224Sgblack@eecs.umich.edu fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem, 2313810Sgblack@eecs.umich.edu EA, %(asi_val)s, 0); 2323388Sgblack@eecs.umich.edu } 2333388Sgblack@eecs.umich.edu if(fault == NoFault) 2343388Sgblack@eecs.umich.edu { 2353616Sgblack@eecs.umich.edu //Write the resulting state to the execution context 2363616Sgblack@eecs.umich.edu %(op_wb)s; 2373388Sgblack@eecs.umich.edu } 2383388Sgblack@eecs.umich.edu 2393388Sgblack@eecs.umich.edu return fault; 2403388Sgblack@eecs.umich.edu } 2413792Sgblack@eecs.umich.edu}}; 2423388Sgblack@eecs.umich.edu 2433792Sgblack@eecs.umich.edudef template StoreInitiateAcc {{ 2443388Sgblack@eecs.umich.edu Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s * xc, 2453388Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 2463388Sgblack@eecs.umich.edu { 2473388Sgblack@eecs.umich.edu Fault fault = NoFault; 2483439Sgblack@eecs.umich.edu bool storeCond = true; 2493388Sgblack@eecs.umich.edu Addr EA; 2503931Ssaidi@eecs.umich.edu %(fp_enable_check)s; 2513388Sgblack@eecs.umich.edu %(op_decl)s; 2524040Ssaidi@eecs.umich.edu 2533388Sgblack@eecs.umich.edu %(op_rd)s; 2543388Sgblack@eecs.umich.edu %(ea_code)s; 2553766Sgblack@eecs.umich.edu DPRINTF(Sparc, "%s: The address is 0x%x\n", mnemonic, EA); 2563391Sgblack@eecs.umich.edu %(fault_check)s; 2573391Sgblack@eecs.umich.edu if(fault == NoFault) 2583391Sgblack@eecs.umich.edu { 2593391Sgblack@eecs.umich.edu %(code)s; 2603391Sgblack@eecs.umich.edu } 2613439Sgblack@eecs.umich.edu if(storeCond && fault == NoFault) 2623388Sgblack@eecs.umich.edu { 2634648Sgblack@eecs.umich.edu %(EA_trunc)s 2644224Sgblack@eecs.umich.edu fault = xc->write((%(mem_acc_type)s%(mem_acc_size)s_t)Mem, 2653810Sgblack@eecs.umich.edu EA, %(asi_val)s, 0); 2663388Sgblack@eecs.umich.edu } 2673388Sgblack@eecs.umich.edu if(fault == NoFault) 2683388Sgblack@eecs.umich.edu { 2693616Sgblack@eecs.umich.edu //Write the resulting state to the execution context 2703388Sgblack@eecs.umich.edu %(op_wb)s; 2713388Sgblack@eecs.umich.edu } 2723388Sgblack@eecs.umich.edu return fault; 2733388Sgblack@eecs.umich.edu } 2743792Sgblack@eecs.umich.edu}}; 2753388Sgblack@eecs.umich.edu 2763792Sgblack@eecs.umich.edudef template StoreCompleteAcc {{ 2773388Sgblack@eecs.umich.edu Fault %(class_name)s::completeAcc(PacketPtr, %(CPU_exec_context)s * xc, 2783388Sgblack@eecs.umich.edu Trace::InstRecord * traceData) const 2793388Sgblack@eecs.umich.edu { 2803388Sgblack@eecs.umich.edu return NoFault; 2813388Sgblack@eecs.umich.edu } 2823388Sgblack@eecs.umich.edu}}; 2833388Sgblack@eecs.umich.edu 2843388Sgblack@eecs.umich.edu//This delcares the initiateAcc function in memory operations 2853388Sgblack@eecs.umich.edudef template InitiateAccDeclare {{ 2863388Sgblack@eecs.umich.edu Fault initiateAcc(%(CPU_exec_context)s *, Trace::InstRecord *) const; 2873388Sgblack@eecs.umich.edu}}; 2883388Sgblack@eecs.umich.edu 2893388Sgblack@eecs.umich.edu//This declares the completeAcc function in memory operations 2903388Sgblack@eecs.umich.edudef template CompleteAccDeclare {{ 2913388Sgblack@eecs.umich.edu Fault completeAcc(PacketPtr, %(CPU_exec_context)s *, Trace::InstRecord *) const; 2923388Sgblack@eecs.umich.edu}}; 2933388Sgblack@eecs.umich.edu 2943391Sgblack@eecs.umich.edu//Here are some code snippets which check for various fault conditions 2953391Sgblack@eecs.umich.edulet {{ 2963792Sgblack@eecs.umich.edu LoadFuncs = [LoadExecute, LoadInitiateAcc, LoadCompleteAcc] 2973792Sgblack@eecs.umich.edu StoreFuncs = [StoreExecute, StoreInitiateAcc, StoreCompleteAcc] 2984040Ssaidi@eecs.umich.edu 2993391Sgblack@eecs.umich.edu # The LSB can be zero, since it's really the MSB in doubles and quads 3003391Sgblack@eecs.umich.edu # and we're dealing with doubles 3013391Sgblack@eecs.umich.edu BlockAlignmentFaultCheck = ''' 3023391Sgblack@eecs.umich.edu if(RD & 0xe) 3033391Sgblack@eecs.umich.edu fault = new IllegalInstruction; 3043391Sgblack@eecs.umich.edu else if(EA & 0x3f) 3053391Sgblack@eecs.umich.edu fault = new MemAddressNotAligned; 3063391Sgblack@eecs.umich.edu ''' 3073835Sgblack@eecs.umich.edu TwinAlignmentFaultCheck = ''' 3083863Ssaidi@eecs.umich.edu if(RD & 0x1) 3093835Sgblack@eecs.umich.edu fault = new IllegalInstruction; 3103863Ssaidi@eecs.umich.edu else if(EA & 0xf) 3113835Sgblack@eecs.umich.edu fault = new MemAddressNotAligned; 3123835Sgblack@eecs.umich.edu ''' 3133391Sgblack@eecs.umich.edu # XXX Need to take care of pstate.hpriv as well. The lower ASIs 3143391Sgblack@eecs.umich.edu # are split into ones that are available in priv and hpriv, and 3153391Sgblack@eecs.umich.edu # those that are only available in hpriv 3163391Sgblack@eecs.umich.edu AlternateASIPrivFaultCheck = ''' 3173823Ssaidi@eecs.umich.edu if(!bits(Pstate,2,2) && !bits(Hpstate,2,2) && !AsiIsUnPriv((ASI)EXT_ASI) || 3183823Ssaidi@eecs.umich.edu !bits(Hpstate,2,2) && AsiIsHPriv((ASI)EXT_ASI)) 3193823Ssaidi@eecs.umich.edu fault = new PrivilegedAction; 3203391Sgblack@eecs.umich.edu else if(AsiIsAsIfUser((ASI)EXT_ASI) && !bits(Pstate,2,2)) 3213391Sgblack@eecs.umich.edu fault = new PrivilegedAction; 3223391Sgblack@eecs.umich.edu ''' 3233391Sgblack@eecs.umich.edu 3244648Sgblack@eecs.umich.edu TruncateEA = ''' 3254648Sgblack@eecs.umich.edu#if !FULL_SYSTEM 3264648Sgblack@eecs.umich.edu EA = Pstate<3:> ? EA<31:0> : EA; 3274648Sgblack@eecs.umich.edu#endif 3284648Sgblack@eecs.umich.edu ''' 3293391Sgblack@eecs.umich.edu}}; 3303391Sgblack@eecs.umich.edu 3313391Sgblack@eecs.umich.edu//A simple function to generate the name of the macro op of a certain 3323391Sgblack@eecs.umich.edu//instruction at a certain micropc 3333391Sgblack@eecs.umich.edulet {{ 3343391Sgblack@eecs.umich.edu def makeMicroName(name, microPc): 3353616Sgblack@eecs.umich.edu return name + "::" + name + "_" + str(microPc) 3363391Sgblack@eecs.umich.edu}}; 3373391Sgblack@eecs.umich.edu 3383388Sgblack@eecs.umich.edu//This function properly generates the execute functions for one of the 3393388Sgblack@eecs.umich.edu//templates above. This is needed because in one case, ea computation, 3403391Sgblack@eecs.umich.edu//fault checks and the actual code all occur in the same function, 3413388Sgblack@eecs.umich.edu//and in the other they're distributed across two. Also note that for 3423388Sgblack@eecs.umich.edu//execute functions, the name of the base class doesn't matter. 3433388Sgblack@eecs.umich.edulet {{ 3443949Sgblack@eecs.umich.edu def doSplitExecute(execute, name, Name, asi, opt_flags, microParam): 3453810Sgblack@eecs.umich.edu microParam["asi_val"] = asi; 3463792Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, '', microParam, opt_flags) 3473792Sgblack@eecs.umich.edu (execf, initf, compf) = execute 3483792Sgblack@eecs.umich.edu return execf.subst(iop) + initf.subst(iop) + compf.subst(iop) 3493439Sgblack@eecs.umich.edu 3503439Sgblack@eecs.umich.edu 3514040Ssaidi@eecs.umich.edu def doDualSplitExecute(code, postacc_code, eaRegCode, eaImmCode, execute, 3523810Sgblack@eecs.umich.edu faultCode, nameReg, nameImm, NameReg, NameImm, asi, opt_flags): 3533388Sgblack@eecs.umich.edu executeCode = '' 3543388Sgblack@eecs.umich.edu for (eaCode, name, Name) in ( 3553388Sgblack@eecs.umich.edu (eaRegCode, nameReg, NameReg), 3563388Sgblack@eecs.umich.edu (eaImmCode, nameImm, NameImm)): 3574040Ssaidi@eecs.umich.edu microParams = {"code": code, "postacc_code" : postacc_code, 3584648Sgblack@eecs.umich.edu "ea_code": eaCode, "fault_check": faultCode, 3594648Sgblack@eecs.umich.edu "EA_trunc" : TruncateEA} 3603792Sgblack@eecs.umich.edu executeCode += doSplitExecute(execute, name, Name, 3613810Sgblack@eecs.umich.edu asi, opt_flags, microParams) 3623388Sgblack@eecs.umich.edu return executeCode 3633388Sgblack@eecs.umich.edu}}; 364