decoder.isa revision 7790
13900Ssaidi@eecs.umich.edu// Copyright (c) 2006-2007 The Regents of The University of Michigan 22632Sstever@eecs.umich.edu// All rights reserved. 32632Sstever@eecs.umich.edu// 42632Sstever@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 52632Sstever@eecs.umich.edu// modification, are permitted provided that the following conditions are 62632Sstever@eecs.umich.edu// met: redistributions of source code must retain the above copyright 72632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 82632Sstever@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 92632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 102632Sstever@eecs.umich.edu// documentation and/or other materials provided with the distribution; 112632Sstever@eecs.umich.edu// neither the name of the copyright holders nor the names of its 122632Sstever@eecs.umich.edu// contributors may be used to endorse or promote products derived from 132632Sstever@eecs.umich.edu// this software without specific prior written permission. 142632Sstever@eecs.umich.edu// 152632Sstever@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 162632Sstever@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 172632Sstever@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 182632Sstever@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 192632Sstever@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 202632Sstever@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 212632Sstever@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 222632Sstever@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 232632Sstever@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 242632Sstever@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 252632Sstever@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 262632Sstever@eecs.umich.edu// 272632Sstever@eecs.umich.edu// Authors: Ali Saidi 282632Sstever@eecs.umich.edu// Gabe Black 292632Sstever@eecs.umich.edu// Steve Reinhardt 302632Sstever@eecs.umich.edu 312022SN/A//////////////////////////////////////////////////////////////////// 322022SN/A// 332022SN/A// The actual decoder specification 342022SN/A// 352022SN/A 362469SN/Adecode OP default Unknown::unknown() 372469SN/A{ 382469SN/A 0x0: decode OP2 392469SN/A { 407741Sgblack@eecs.umich.edu // Throw an illegal instruction acception 412516SN/A 0x0: Trap::illtrap({{fault = new IllegalInstruction;}}); 422944Sgblack@eecs.umich.edu format BranchN 432482SN/A { 447741Sgblack@eecs.umich.edu // bpcc 453056Sgblack@eecs.umich.edu 0x1: decode COND2 462469SN/A { 477741Sgblack@eecs.umich.edu // Branch Always 485091Sgblack@eecs.umich.edu 0x8: bpa(19, annul_code={{ 497790Sgblack@eecs.umich.edu NPC = PC + disp; 507790Sgblack@eecs.umich.edu NNPC = PC + disp + 4; 515091Sgblack@eecs.umich.edu }}); 527741Sgblack@eecs.umich.edu // Branch Never 535091Sgblack@eecs.umich.edu 0x0: bpn(19, {{;}}, 545091Sgblack@eecs.umich.edu annul_code={{ 557790Sgblack@eecs.umich.edu NNPC = NPC + 8; 567790Sgblack@eecs.umich.edu NPC = NPC + 4; 575091Sgblack@eecs.umich.edu }}); 583056Sgblack@eecs.umich.edu default: decode BPCC 593056Sgblack@eecs.umich.edu { 605091Sgblack@eecs.umich.edu 0x0: bpcci(19, test={{passesCondition(Ccr<3:0>, COND2)}}); 615091Sgblack@eecs.umich.edu 0x2: bpccx(19, test={{passesCondition(Ccr<7:4>, COND2)}}); 623056Sgblack@eecs.umich.edu } 632482SN/A } 647741Sgblack@eecs.umich.edu // bicc 653598Sgblack@eecs.umich.edu 0x2: decode COND2 663598Sgblack@eecs.umich.edu { 677741Sgblack@eecs.umich.edu // Branch Always 685091Sgblack@eecs.umich.edu 0x8: ba(22, annul_code={{ 697790Sgblack@eecs.umich.edu NPC = PC + disp; 707790Sgblack@eecs.umich.edu NNPC = PC + disp + 4; 715091Sgblack@eecs.umich.edu }}); 727741Sgblack@eecs.umich.edu // Branch Never 735091Sgblack@eecs.umich.edu 0x0: bn(22, {{;}}, 745091Sgblack@eecs.umich.edu annul_code={{ 757790Sgblack@eecs.umich.edu NNPC = NPC + 8; 767790Sgblack@eecs.umich.edu NPC = NPC + 4; 775091Sgblack@eecs.umich.edu }}); 785091Sgblack@eecs.umich.edu default: bicc(22, test={{passesCondition(Ccr<3:0>, COND2)}}); 793598Sgblack@eecs.umich.edu } 802516SN/A } 812516SN/A 0x3: decode RCOND2 822516SN/A { 832516SN/A format BranchSplit 842482SN/A { 855091Sgblack@eecs.umich.edu 0x1: bpreq(test={{Rs1.sdw == 0}}); 865091Sgblack@eecs.umich.edu 0x2: bprle(test={{Rs1.sdw <= 0}}); 875091Sgblack@eecs.umich.edu 0x3: bprl(test={{Rs1.sdw < 0}}); 885091Sgblack@eecs.umich.edu 0x5: bprne(test={{Rs1.sdw != 0}}); 895091Sgblack@eecs.umich.edu 0x6: bprg(test={{Rs1.sdw > 0}}); 905091Sgblack@eecs.umich.edu 0x7: bprge(test={{Rs1.sdw >= 0}}); 912469SN/A } 922482SN/A } 937741Sgblack@eecs.umich.edu // SETHI (or NOP if rd == 0 and imm == 0) 943042Sgblack@eecs.umich.edu 0x4: SetHi::sethi({{Rd.udw = imm;}}); 957741Sgblack@eecs.umich.edu // fbpfcc 964004Sgblack@eecs.umich.edu 0x5: decode COND2 { 974004Sgblack@eecs.umich.edu format BranchN { 987741Sgblack@eecs.umich.edu // Branch Always 995091Sgblack@eecs.umich.edu 0x8: fbpa(22, annul_code={{ 1007790Sgblack@eecs.umich.edu NPC = PC + disp; 1017790Sgblack@eecs.umich.edu NNPC = PC + disp + 4; 1025091Sgblack@eecs.umich.edu }}); 1037741Sgblack@eecs.umich.edu // Branch Never 1045091Sgblack@eecs.umich.edu 0x0: fbpn(22, {{;}}, 1055091Sgblack@eecs.umich.edu annul_code={{ 1067790Sgblack@eecs.umich.edu NNPC = NPC + 8; 1077790Sgblack@eecs.umich.edu NPC = NPC + 4; 1085091Sgblack@eecs.umich.edu }}); 1094004Sgblack@eecs.umich.edu default: decode BPCC { 1105091Sgblack@eecs.umich.edu 0x0: fbpfcc0(19, test= 1115091Sgblack@eecs.umich.edu {{passesFpCondition(Fsr<11:10>, COND2)}}); 1125091Sgblack@eecs.umich.edu 0x1: fbpfcc1(19, test= 1135091Sgblack@eecs.umich.edu {{passesFpCondition(Fsr<33:32>, COND2)}}); 1145091Sgblack@eecs.umich.edu 0x2: fbpfcc2(19, test= 1155091Sgblack@eecs.umich.edu {{passesFpCondition(Fsr<35:34>, COND2)}}); 1165091Sgblack@eecs.umich.edu 0x3: fbpfcc3(19, test= 1175091Sgblack@eecs.umich.edu {{passesFpCondition(Fsr<37:36>, COND2)}}); 1184004Sgblack@eecs.umich.edu } 1194004Sgblack@eecs.umich.edu } 1204004Sgblack@eecs.umich.edu } 1217741Sgblack@eecs.umich.edu // fbfcc 1224004Sgblack@eecs.umich.edu 0x6: decode COND2 { 1234004Sgblack@eecs.umich.edu format BranchN { 1247741Sgblack@eecs.umich.edu // Branch Always 1255091Sgblack@eecs.umich.edu 0x8: fba(22, annul_code={{ 1267790Sgblack@eecs.umich.edu NPC = PC + disp; 1277790Sgblack@eecs.umich.edu NNPC = PC + disp + 4; 1285091Sgblack@eecs.umich.edu }}); 1297741Sgblack@eecs.umich.edu // Branch Never 1305091Sgblack@eecs.umich.edu 0x0: fbn(22, {{;}}, 1315091Sgblack@eecs.umich.edu annul_code={{ 1327790Sgblack@eecs.umich.edu NNPC = NPC + 8; 1337790Sgblack@eecs.umich.edu NPC = NPC + 4; 1345091Sgblack@eecs.umich.edu }}); 1355091Sgblack@eecs.umich.edu default: fbfcc(22, test= 1365091Sgblack@eecs.umich.edu {{passesFpCondition(Fsr<11:10>, COND2)}}); 1374004Sgblack@eecs.umich.edu } 1384004Sgblack@eecs.umich.edu } 1392469SN/A } 1402944Sgblack@eecs.umich.edu 0x1: BranchN::call(30, {{ 1413928Ssaidi@eecs.umich.edu if (Pstate<3:>) 1427790Sgblack@eecs.umich.edu R15 = (PC)<31:0>; 1433928Ssaidi@eecs.umich.edu else 1447790Sgblack@eecs.umich.edu R15 = PC; 1457790Sgblack@eecs.umich.edu NNPC = R15 + disp; 1462469SN/A }}); 1472469SN/A 0x2: decode OP3 { 1482482SN/A format IntOp { 1492482SN/A 0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}}); 1502974Sgblack@eecs.umich.edu 0x01: and({{Rd = Rs1.sdw & Rs2_or_imm13;}}); 1512974Sgblack@eecs.umich.edu 0x02: or({{Rd = Rs1.sdw | Rs2_or_imm13;}}); 1522974Sgblack@eecs.umich.edu 0x03: xor({{Rd = Rs1.sdw ^ Rs2_or_imm13;}}); 1532526SN/A 0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}}); 1542974Sgblack@eecs.umich.edu 0x05: andn({{Rd = Rs1.sdw & ~Rs2_or_imm13;}}); 1552974Sgblack@eecs.umich.edu 0x06: orn({{Rd = Rs1.sdw | ~Rs2_or_imm13;}}); 1562974Sgblack@eecs.umich.edu 0x07: xnor({{Rd = ~(Rs1.sdw ^ Rs2_or_imm13);}}); 1572646Ssaidi@eecs.umich.edu 0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + Ccr<0:0>;}}); 1582974Sgblack@eecs.umich.edu 0x09: mulx({{Rd = Rs1.sdw * Rs2_or_imm13;}}); 1592469SN/A 0x0A: umul({{ 1602516SN/A Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>; 1612646Ssaidi@eecs.umich.edu Y = Rd<63:32>; 1622482SN/A }}); 1632469SN/A 0x0B: smul({{ 1643931Ssaidi@eecs.umich.edu Rd.sdw = sext<32>(Rs1.sdw<31:0>) * sext<32>(Rs2_or_imm13<31:0>); 1653900Ssaidi@eecs.umich.edu Y = Rd.sdw<63:32>; 1662482SN/A }}); 1672954Sgblack@eecs.umich.edu 0x0C: subc({{Rd.sdw = Rs1.sdw + (~Rs2_or_imm13) + 1 - Ccr<0:0>}}); 1682469SN/A 0x0D: udivx({{ 1697741Sgblack@eecs.umich.edu if (Rs2_or_imm13 == 0) 1707741Sgblack@eecs.umich.edu fault = new DivisionByZero; 1717741Sgblack@eecs.umich.edu else 1727741Sgblack@eecs.umich.edu Rd.udw = Rs1.udw / Rs2_or_imm13; 1732482SN/A }}); 1742469SN/A 0x0E: udiv({{ 1757741Sgblack@eecs.umich.edu if (Rs2_or_imm13 == 0) { 1767741Sgblack@eecs.umich.edu fault = new DivisionByZero; 1777741Sgblack@eecs.umich.edu } else { 1782646Ssaidi@eecs.umich.edu Rd.udw = ((Y << 32) | Rs1.udw<31:0>) / Rs2_or_imm13; 1797741Sgblack@eecs.umich.edu if (Rd.udw >> 32 != 0) 1802482SN/A Rd.udw = 0xFFFFFFFF; 1812482SN/A } 1822482SN/A }}); 1832482SN/A 0x0F: sdiv({{ 1847741Sgblack@eecs.umich.edu if (Rs2_or_imm13.sdw == 0) { 1852469SN/A fault = new DivisionByZero; 1867741Sgblack@eecs.umich.edu } else { 1877741Sgblack@eecs.umich.edu Rd.udw = ((int64_t)((Y << 32) | 1887741Sgblack@eecs.umich.edu Rs1.sdw<31:0>)) / Rs2_or_imm13.sdw; 1897741Sgblack@eecs.umich.edu if ((int64_t)Rd.udw >= 1907741Sgblack@eecs.umich.edu std::numeric_limits<int32_t>::max()) { 1912482SN/A Rd.udw = 0x7FFFFFFF; 1927741Sgblack@eecs.umich.edu } else if ((int64_t)Rd.udw <= 1937741Sgblack@eecs.umich.edu std::numeric_limits<int32_t>::min()) { 1943929Ssaidi@eecs.umich.edu Rd.udw = ULL(0xFFFFFFFF80000000); 1957741Sgblack@eecs.umich.edu } 1962482SN/A } 1972526SN/A }}); 1982469SN/A } 1992482SN/A format IntOpCc { 2002469SN/A 0x10: addcc({{ 2015093Sgblack@eecs.umich.edu int64_t res, op1 = Rs1, op2 = Rs2_or_imm13; 2025093Sgblack@eecs.umich.edu Rd = res = op1 + op2; 2035093Sgblack@eecs.umich.edu }}); 2042482SN/A 0x11: IntOpCcRes::andcc({{Rd = Rs1 & Rs2_or_imm13;}}); 2052482SN/A 0x12: IntOpCcRes::orcc({{Rd = Rs1 | Rs2_or_imm13;}}); 2062482SN/A 0x13: IntOpCcRes::xorcc({{Rd = Rs1 ^ Rs2_or_imm13;}}); 2072469SN/A 0x14: subcc({{ 2085093Sgblack@eecs.umich.edu int64_t res, op1 = Rs1, op2 = Rs2_or_imm13; 2095093Sgblack@eecs.umich.edu Rd = res = op1 - op2; 2105093Sgblack@eecs.umich.edu }}, sub=True); 2112482SN/A 0x15: IntOpCcRes::andncc({{Rd = Rs1 & ~Rs2_or_imm13;}}); 2122482SN/A 0x16: IntOpCcRes::orncc({{Rd = Rs1 | ~Rs2_or_imm13;}}); 2132482SN/A 0x17: IntOpCcRes::xnorcc({{Rd = ~(Rs1 ^ Rs2_or_imm13);}}); 2142469SN/A 0x18: addccc({{ 2155093Sgblack@eecs.umich.edu int64_t res, op1 = Rs1, op2 = Rs2_or_imm13; 2165093Sgblack@eecs.umich.edu Rd = res = op1 + op2 + Ccr<0:>; 2175093Sgblack@eecs.umich.edu }}); 2183765Sgblack@eecs.umich.edu 0x1A: IntOpCcRes::umulcc({{ 2192615SN/A uint64_t resTemp; 2202615SN/A Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>; 2213765Sgblack@eecs.umich.edu Y = resTemp<63:32>;}}); 2223765Sgblack@eecs.umich.edu 0x1B: IntOpCcRes::smulcc({{ 2232615SN/A int64_t resTemp; 2243931Ssaidi@eecs.umich.edu Rd = resTemp = sext<32>(Rs1.sdw<31:0>) * sext<32>(Rs2_or_imm13<31:0>); 2253765Sgblack@eecs.umich.edu Y = resTemp<63:32>;}}); 2262469SN/A 0x1C: subccc({{ 2275093Sgblack@eecs.umich.edu int64_t res, op1 = Rs1, op2 = Rs2_or_imm13; 2285093Sgblack@eecs.umich.edu Rd = res = op1 - op2 - Ccr<0:>; 2295093Sgblack@eecs.umich.edu }}, sub=True); 2303765Sgblack@eecs.umich.edu 0x1D: IntOpCcRes::udivxcc({{ 2317741Sgblack@eecs.umich.edu if (Rs2_or_imm13.udw == 0) 2327741Sgblack@eecs.umich.edu fault = new DivisionByZero; 2337741Sgblack@eecs.umich.edu else 2347741Sgblack@eecs.umich.edu Rd = Rs1.udw / Rs2_or_imm13.udw;}}); 2355093Sgblack@eecs.umich.edu 0x1E: IntOpCcRes::udivcc({{ 2366639Svince@csl.cornell.edu uint64_t resTemp; 2376639Svince@csl.cornell.edu uint32_t val2 = Rs2_or_imm13.udw; 2385093Sgblack@eecs.umich.edu int32_t overflow = 0; 2397741Sgblack@eecs.umich.edu if (val2 == 0) { 2407741Sgblack@eecs.umich.edu fault = new DivisionByZero; 2417741Sgblack@eecs.umich.edu } else { 2425093Sgblack@eecs.umich.edu resTemp = (uint64_t)((Y << 32) | Rs1.udw<31:0>) / val2; 2435093Sgblack@eecs.umich.edu overflow = (resTemp<63:32> != 0); 2447741Sgblack@eecs.umich.edu if (overflow) 2457741Sgblack@eecs.umich.edu Rd = resTemp = 0xFFFFFFFF; 2467741Sgblack@eecs.umich.edu else 2477741Sgblack@eecs.umich.edu Rd = resTemp; 2485093Sgblack@eecs.umich.edu } 2495093Sgblack@eecs.umich.edu }}, iv={{overflow}}); 2505093Sgblack@eecs.umich.edu 0x1F: IntOpCcRes::sdivcc({{ 2515093Sgblack@eecs.umich.edu int64_t val2 = Rs2_or_imm13.sdw<31:0>; 2525093Sgblack@eecs.umich.edu bool overflow = false, underflow = false; 2537741Sgblack@eecs.umich.edu if (val2 == 0) { 2547741Sgblack@eecs.umich.edu fault = new DivisionByZero; 2557741Sgblack@eecs.umich.edu } else { 2565093Sgblack@eecs.umich.edu Rd = (int64_t)((Y << 32) | Rs1.sdw<31:0>) / val2; 2575093Sgblack@eecs.umich.edu overflow = ((int64_t)Rd >= std::numeric_limits<int32_t>::max()); 2585093Sgblack@eecs.umich.edu underflow = ((int64_t)Rd <= std::numeric_limits<int32_t>::min()); 2597741Sgblack@eecs.umich.edu if (overflow) 2607741Sgblack@eecs.umich.edu Rd = 0x7FFFFFFF; 2617741Sgblack@eecs.umich.edu else if (underflow) 2627741Sgblack@eecs.umich.edu Rd = ULL(0xFFFFFFFF80000000); 2635093Sgblack@eecs.umich.edu } 2645093Sgblack@eecs.umich.edu }}, iv={{overflow || underflow}}); 2652469SN/A 0x20: taddcc({{ 2665093Sgblack@eecs.umich.edu int64_t res, op1 = Rs1, op2 = Rs2_or_imm13; 2675093Sgblack@eecs.umich.edu Rd = res = Rs1 + op2; 2685093Sgblack@eecs.umich.edu }}, iv={{ 2695093Sgblack@eecs.umich.edu (op1 & mask(2)) || (op2 & mask(2)) || 2705093Sgblack@eecs.umich.edu findOverflow(32, res, op1, op2) 2715093Sgblack@eecs.umich.edu }}); 2722469SN/A 0x21: tsubcc({{ 2735093Sgblack@eecs.umich.edu int64_t res, op1 = Rs1, op2 = Rs2_or_imm13; 2745093Sgblack@eecs.umich.edu Rd = res = Rs1 - op2; 2755093Sgblack@eecs.umich.edu }}, iv={{ 2765093Sgblack@eecs.umich.edu (op1 & mask(2)) || (op2 & mask(2)) || 2775093Sgblack@eecs.umich.edu findOverflow(32, res, op1, ~op2) 2785093Sgblack@eecs.umich.edu }}, sub=True); 2792469SN/A 0x22: taddcctv({{ 2805093Sgblack@eecs.umich.edu int64_t res, op1 = Rs1, op2 = Rs2_or_imm13; 2815093Sgblack@eecs.umich.edu Rd = res = op1 + op2; 2825093Sgblack@eecs.umich.edu bool overflow = (op1 & mask(2)) || (op2 & mask(2)) || 2835093Sgblack@eecs.umich.edu findOverflow(32, res, op1, op2); 2847741Sgblack@eecs.umich.edu if (overflow) 2857741Sgblack@eecs.umich.edu fault = new TagOverflow; 2865093Sgblack@eecs.umich.edu }}, iv={{overflow}}); 2872469SN/A 0x23: tsubcctv({{ 2885093Sgblack@eecs.umich.edu int64_t res, op1 = Rs1, op2 = Rs2_or_imm13; 2895093Sgblack@eecs.umich.edu Rd = res = op1 - op2; 2905093Sgblack@eecs.umich.edu bool overflow = (op1 & mask(2)) || (op2 & mask(2)) || 2915093Sgblack@eecs.umich.edu findOverflow(32, res, op1, ~op2); 2927741Sgblack@eecs.umich.edu if (overflow) 2937741Sgblack@eecs.umich.edu fault = new TagOverflow; 2945093Sgblack@eecs.umich.edu }}, iv={{overflow}}, sub=True); 2952469SN/A 0x24: mulscc({{ 2965093Sgblack@eecs.umich.edu int32_t savedLSB = Rs1<0:>; 2974237Sgblack@eecs.umich.edu 2987741Sgblack@eecs.umich.edu // Step 1 2995093Sgblack@eecs.umich.edu int64_t multiplicand = Rs2_or_imm13; 3007741Sgblack@eecs.umich.edu // Step 2 3015093Sgblack@eecs.umich.edu int32_t partialP = Rs1<31:1> | 3025093Sgblack@eecs.umich.edu ((Ccr<3:3> ^ Ccr<1:1>) << 31); 3037741Sgblack@eecs.umich.edu // Step 3 3045093Sgblack@eecs.umich.edu int32_t added = Y<0:> ? multiplicand : 0; 3055093Sgblack@eecs.umich.edu int64_t res, op1 = partialP, op2 = added; 3065093Sgblack@eecs.umich.edu Rd = res = partialP + added; 3077741Sgblack@eecs.umich.edu // Steps 4 & 5 3085093Sgblack@eecs.umich.edu Y = Y<31:1> | (savedLSB << 31); 3095093Sgblack@eecs.umich.edu }}); 3102526SN/A } 3112526SN/A format IntOp 3122526SN/A { 3132526SN/A 0x25: decode X { 3142526SN/A 0x0: sll({{Rd = Rs1 << (I ? SHCNT32 : Rs2<4:0>);}}); 3152526SN/A 0x1: sllx({{Rd = Rs1 << (I ? SHCNT64 : Rs2<5:0>);}}); 3162469SN/A } 3172526SN/A 0x26: decode X { 3182526SN/A 0x0: srl({{Rd = Rs1.uw >> (I ? SHCNT32 : Rs2<4:0>);}}); 3192526SN/A 0x1: srlx({{Rd = Rs1.udw >> (I ? SHCNT64 : Rs2<5:0>);}}); 3202526SN/A } 3212526SN/A 0x27: decode X { 3222526SN/A 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}}); 3232526SN/A 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}}); 3242526SN/A } 3252954Sgblack@eecs.umich.edu 0x28: decode RS1 { 3263929Ssaidi@eecs.umich.edu 0x00: NoPriv::rdy({{Rd = Y<31:0>;}}); 3277741Sgblack@eecs.umich.edu // 1 should cause an illegal instruction exception 3283587Sgblack@eecs.umich.edu 0x02: NoPriv::rdccr({{Rd = Ccr;}}); 3293587Sgblack@eecs.umich.edu 0x03: NoPriv::rdasi({{Rd = Asi;}}); 3305094Sgblack@eecs.umich.edu 0x04: Priv::rdtick({{Rd = Tick;}}, {{Tick<63:>}}); 3313587Sgblack@eecs.umich.edu 0x05: NoPriv::rdpc({{ 3327741Sgblack@eecs.umich.edu if (Pstate<3:>) 3337790Sgblack@eecs.umich.edu Rd = (PC)<31:0>; 3343587Sgblack@eecs.umich.edu else 3357790Sgblack@eecs.umich.edu Rd = PC; 3367720Sgblack@eecs.umich.edu }}); 3373587Sgblack@eecs.umich.edu 0x06: NoPriv::rdfprs({{ 3387741Sgblack@eecs.umich.edu // Wait for all fpops to finish. 3393587Sgblack@eecs.umich.edu Rd = Fprs; 3403587Sgblack@eecs.umich.edu }}); 3417741Sgblack@eecs.umich.edu // 7-14 should cause an illegal instruction exception 3423587Sgblack@eecs.umich.edu 0x0F: decode I { 3434040Ssaidi@eecs.umich.edu 0x0: Nop::stbar({{/*stuff*/}}, IsWriteBarrier, MemWriteOp); 3444040Ssaidi@eecs.umich.edu 0x1: Nop::membar({{/*stuff*/}}, IsMemBarrier, MemReadOp); 3452954Sgblack@eecs.umich.edu } 3463587Sgblack@eecs.umich.edu 0x10: Priv::rdpcr({{Rd = Pcr;}}); 3475094Sgblack@eecs.umich.edu 0x11: Priv::rdpic({{Rd = Pic;}}, {{Pcr<0:>}}); 3487741Sgblack@eecs.umich.edu // 0x12 should cause an illegal instruction exception 3493587Sgblack@eecs.umich.edu 0x13: NoPriv::rdgsr({{ 3504010Ssaidi@eecs.umich.edu fault = checkFpEnableFault(xc); 3514010Ssaidi@eecs.umich.edu if (fault) 3524010Ssaidi@eecs.umich.edu return fault; 3534010Ssaidi@eecs.umich.edu Rd = Gsr; 3542954Sgblack@eecs.umich.edu }}); 3557741Sgblack@eecs.umich.edu // 0x14-0x15 should cause an illegal instruction exception 3563587Sgblack@eecs.umich.edu 0x16: Priv::rdsoftint({{Rd = Softint;}}); 3573823Ssaidi@eecs.umich.edu 0x17: Priv::rdtick_cmpr({{Rd = TickCmpr;}}); 3585094Sgblack@eecs.umich.edu 0x18: Priv::rdstick({{Rd = Stick}}, {{Stick<63:>}}); 3593823Ssaidi@eecs.umich.edu 0x19: Priv::rdstick_cmpr({{Rd = StickCmpr;}}); 3603598Sgblack@eecs.umich.edu 0x1A: Priv::rdstrand_sts_reg({{ 3617741Sgblack@eecs.umich.edu if (Pstate<2:> && !Hpstate<2:>) 3623598Sgblack@eecs.umich.edu Rd = StrandStsReg<0:>; 3633598Sgblack@eecs.umich.edu else 3643598Sgblack@eecs.umich.edu Rd = StrandStsReg; 3653598Sgblack@eecs.umich.edu }}); 3667741Sgblack@eecs.umich.edu // 0x1A is supposed to be reserved, but it reads the strand 3677741Sgblack@eecs.umich.edu // status register. 3687741Sgblack@eecs.umich.edu // 0x1B-0x1F should cause an illegal instruction exception 3692954Sgblack@eecs.umich.edu } 3703587Sgblack@eecs.umich.edu 0x29: decode RS1 { 3713587Sgblack@eecs.umich.edu 0x00: HPriv::rdhprhpstate({{Rd = Hpstate;}}); 3725094Sgblack@eecs.umich.edu 0x01: HPriv::rdhprhtstate({{Rd = Htstate;}}, checkTl=true); 3737741Sgblack@eecs.umich.edu // 0x02 should cause an illegal instruction exception 3743587Sgblack@eecs.umich.edu 0x03: HPriv::rdhprhintp({{Rd = Hintp;}}); 3757741Sgblack@eecs.umich.edu // 0x04 should cause an illegal instruction exception 3763587Sgblack@eecs.umich.edu 0x05: HPriv::rdhprhtba({{Rd = Htba;}}); 3773587Sgblack@eecs.umich.edu 0x06: HPriv::rdhprhver({{Rd = Hver;}}); 3787741Sgblack@eecs.umich.edu // 0x07-0x1E should cause an illegal instruction exception 3793823Ssaidi@eecs.umich.edu 0x1F: HPriv::rdhprhstick_cmpr({{Rd = HstickCmpr;}}); 3803587Sgblack@eecs.umich.edu } 3813587Sgblack@eecs.umich.edu 0x2A: decode RS1 { 3825094Sgblack@eecs.umich.edu 0x00: Priv::rdprtpc({{Rd = Tpc;}}, checkTl=true); 3835094Sgblack@eecs.umich.edu 0x01: Priv::rdprtnpc({{Rd = Tnpc;}}, checkTl=true); 3845094Sgblack@eecs.umich.edu 0x02: Priv::rdprtstate({{Rd = Tstate;}}, checkTl=true); 3855094Sgblack@eecs.umich.edu 0x03: Priv::rdprtt({{Rd = Tt;}}, checkTl=true); 3863823Ssaidi@eecs.umich.edu 0x04: Priv::rdprtick({{Rd = Tick;}}); 3873587Sgblack@eecs.umich.edu 0x05: Priv::rdprtba({{Rd = Tba;}}); 3883587Sgblack@eecs.umich.edu 0x06: Priv::rdprpstate({{Rd = Pstate;}}); 3893587Sgblack@eecs.umich.edu 0x07: Priv::rdprtl({{Rd = Tl;}}); 3903587Sgblack@eecs.umich.edu 0x08: Priv::rdprpil({{Rd = Pil;}}); 3913587Sgblack@eecs.umich.edu 0x09: Priv::rdprcwp({{Rd = Cwp;}}); 3923587Sgblack@eecs.umich.edu 0x0A: Priv::rdprcansave({{Rd = Cansave;}}); 3933587Sgblack@eecs.umich.edu 0x0B: Priv::rdprcanrestore({{Rd = Canrestore;}}); 3943587Sgblack@eecs.umich.edu 0x0C: Priv::rdprcleanwin({{Rd = Cleanwin;}}); 3953587Sgblack@eecs.umich.edu 0x0D: Priv::rdprotherwin({{Rd = Otherwin;}}); 3963587Sgblack@eecs.umich.edu 0x0E: Priv::rdprwstate({{Rd = Wstate;}}); 3977741Sgblack@eecs.umich.edu // 0x0F should cause an illegal instruction exception 3983587Sgblack@eecs.umich.edu 0x10: Priv::rdprgl({{Rd = Gl;}}); 3997741Sgblack@eecs.umich.edu // 0x11-0x1F should cause an illegal instruction exception 4003587Sgblack@eecs.umich.edu } 4012526SN/A 0x2B: BasicOperate::flushw({{ 4027741Sgblack@eecs.umich.edu if (NWindows - 2 - Cansave != 0) { 4037741Sgblack@eecs.umich.edu if (Otherwin) 4043909Ssaidi@eecs.umich.edu fault = new SpillNOther(4*Wstate<5:3>); 4052526SN/A else 4063909Ssaidi@eecs.umich.edu fault = new SpillNNormal(4*Wstate<2:0>); 4072526SN/A } 4082526SN/A }}); 4092526SN/A 0x2C: decode MOVCC3 4102469SN/A { 4117085Sgblack@eecs.umich.edu 0x0: decode CC 4127085Sgblack@eecs.umich.edu { 4137085Sgblack@eecs.umich.edu 0x0: movccfcc0({{ 4147741Sgblack@eecs.umich.edu if (passesCondition(Fsr<11:10>, COND4)) 4157085Sgblack@eecs.umich.edu Rd = Rs2_or_imm11; 4167085Sgblack@eecs.umich.edu else 4177085Sgblack@eecs.umich.edu Rd = Rd; 4187085Sgblack@eecs.umich.edu }}); 4197085Sgblack@eecs.umich.edu 0x1: movccfcc1({{ 4207741Sgblack@eecs.umich.edu if (passesCondition(Fsr<33:32>, COND4)) 4217085Sgblack@eecs.umich.edu Rd = Rs2_or_imm11; 4227085Sgblack@eecs.umich.edu else 4237085Sgblack@eecs.umich.edu Rd = Rd; 4247085Sgblack@eecs.umich.edu }}); 4257085Sgblack@eecs.umich.edu 0x2: movccfcc2({{ 4267741Sgblack@eecs.umich.edu if (passesCondition(Fsr<35:34>, COND4)) 4277085Sgblack@eecs.umich.edu Rd = Rs2_or_imm11; 4287085Sgblack@eecs.umich.edu else 4297085Sgblack@eecs.umich.edu Rd = Rd; 4307085Sgblack@eecs.umich.edu }}); 4317085Sgblack@eecs.umich.edu 0x3: movccfcc3({{ 4327741Sgblack@eecs.umich.edu if (passesCondition(Fsr<37:36>, COND4)) 4337085Sgblack@eecs.umich.edu Rd = Rs2_or_imm11; 4347085Sgblack@eecs.umich.edu else 4357085Sgblack@eecs.umich.edu Rd = Rd; 4367085Sgblack@eecs.umich.edu }}); 4377085Sgblack@eecs.umich.edu } 4382526SN/A 0x1: decode CC 4392526SN/A { 4402526SN/A 0x0: movcci({{ 4417741Sgblack@eecs.umich.edu if (passesCondition(Ccr<3:0>, COND4)) 4422591SN/A Rd = Rs2_or_imm11; 4432591SN/A else 4442591SN/A Rd = Rd; 4452526SN/A }}); 4462526SN/A 0x2: movccx({{ 4477741Sgblack@eecs.umich.edu if (passesCondition(Ccr<7:4>, COND4)) 4482591SN/A Rd = Rs2_or_imm11; 4492591SN/A else 4502591SN/A Rd = Rd; 4512526SN/A }}); 4522224SN/A } 4532526SN/A } 4542526SN/A 0x2D: sdivx({{ 4557741Sgblack@eecs.umich.edu if (Rs2_or_imm13.sdw == 0) 4567741Sgblack@eecs.umich.edu fault = new DivisionByZero; 4577741Sgblack@eecs.umich.edu else 4587741Sgblack@eecs.umich.edu Rd.sdw = Rs1.sdw / Rs2_or_imm13.sdw; 4592526SN/A }}); 4603941Ssaidi@eecs.umich.edu 0x2E: Trap::popc({{fault = new IllegalInstruction;}}); 4612526SN/A 0x2F: decode RCOND3 4622526SN/A { 4632615SN/A 0x1: movreq({{Rd = (Rs1.sdw == 0) ? Rs2_or_imm10 : Rd;}}); 4642615SN/A 0x2: movrle({{Rd = (Rs1.sdw <= 0) ? Rs2_or_imm10 : Rd;}}); 4652615SN/A 0x3: movrl({{Rd = (Rs1.sdw < 0) ? Rs2_or_imm10 : Rd;}}); 4662615SN/A 0x5: movrne({{Rd = (Rs1.sdw != 0) ? Rs2_or_imm10 : Rd;}}); 4672615SN/A 0x6: movrg({{Rd = (Rs1.sdw > 0) ? Rs2_or_imm10 : Rd;}}); 4682615SN/A 0x7: movrge({{Rd = (Rs1.sdw >= 0) ? Rs2_or_imm10 : Rd;}}); 4692526SN/A } 4703587Sgblack@eecs.umich.edu 0x30: decode RD { 4713929Ssaidi@eecs.umich.edu 0x00: NoPriv::wry({{Y = (Rs1 ^ Rs2_or_imm13)<31:0>;}}); 4727741Sgblack@eecs.umich.edu // 0x01 should cause an illegal instruction exception 4733587Sgblack@eecs.umich.edu 0x02: NoPriv::wrccr({{Ccr = Rs1 ^ Rs2_or_imm13;}}); 4747784SAli.Saidi@ARM.com 0x03: NoPriv::wrasi({{Asi = Rs1 ^ Rs2_or_imm13;}}, false, 4757784SAli.Saidi@ARM.com IsSquashAfter); 4767741Sgblack@eecs.umich.edu // 0x04-0x05 should cause an illegal instruction exception 4773587Sgblack@eecs.umich.edu 0x06: NoPriv::wrfprs({{Fprs = Rs1 ^ Rs2_or_imm13;}}); 4787741Sgblack@eecs.umich.edu // 0x07-0x0E should cause an illegal instruction exception 4793587Sgblack@eecs.umich.edu 0x0F: Trap::softreset({{fault = new SoftwareInitiatedReset;}}); 4803587Sgblack@eecs.umich.edu 0x10: Priv::wrpcr({{Pcr = Rs1 ^ Rs2_or_imm13;}}); 4815094Sgblack@eecs.umich.edu 0x11: Priv::wrpic({{Pic = Rs1 ^ Rs2_or_imm13;}}, {{Pcr<0:>}}); 4827741Sgblack@eecs.umich.edu // 0x12 should cause an illegal instruction exception 4833587Sgblack@eecs.umich.edu 0x13: NoPriv::wrgsr({{ 4847741Sgblack@eecs.umich.edu if (Fprs<2:> == 0 || Pstate<4:> == 0) 4853587Sgblack@eecs.umich.edu return new FpDisabled; 4863587Sgblack@eecs.umich.edu Gsr = Rs1 ^ Rs2_or_imm13; 4873587Sgblack@eecs.umich.edu }}); 4883587Sgblack@eecs.umich.edu 0x14: Priv::wrsoftint_set({{SoftintSet = Rs1 ^ Rs2_or_imm13;}}); 4893587Sgblack@eecs.umich.edu 0x15: Priv::wrsoftint_clr({{SoftintClr = Rs1 ^ Rs2_or_imm13;}}); 4903587Sgblack@eecs.umich.edu 0x16: Priv::wrsoftint({{Softint = Rs1 ^ Rs2_or_imm13;}}); 4913823Ssaidi@eecs.umich.edu 0x17: Priv::wrtick_cmpr({{TickCmpr = Rs1 ^ Rs2_or_imm13;}}); 4923587Sgblack@eecs.umich.edu 0x18: NoPriv::wrstick({{ 4937741Sgblack@eecs.umich.edu if (!Hpstate<2:>) 4943587Sgblack@eecs.umich.edu return new IllegalInstruction; 4953823Ssaidi@eecs.umich.edu Stick = Rs1 ^ Rs2_or_imm13; 4963587Sgblack@eecs.umich.edu }}); 4973823Ssaidi@eecs.umich.edu 0x19: Priv::wrstick_cmpr({{StickCmpr = Rs1 ^ Rs2_or_imm13;}}); 4983598Sgblack@eecs.umich.edu 0x1A: Priv::wrstrand_sts_reg({{ 4993598Sgblack@eecs.umich.edu StrandStsReg = Rs1 ^ Rs2_or_imm13; 5003598Sgblack@eecs.umich.edu }}); 5017741Sgblack@eecs.umich.edu // 0x1A is supposed to be reserved, but it writes the strand 5027741Sgblack@eecs.umich.edu // status register. 5037741Sgblack@eecs.umich.edu // 0x1B-0x1F should cause an illegal instruction exception 5043587Sgblack@eecs.umich.edu } 5052526SN/A 0x31: decode FCN { 5063417Sgblack@eecs.umich.edu 0x0: Priv::saved({{ 5073417Sgblack@eecs.umich.edu assert(Cansave < NWindows - 2); 5083417Sgblack@eecs.umich.edu assert(Otherwin || Canrestore); 5093417Sgblack@eecs.umich.edu Cansave = Cansave + 1; 5107741Sgblack@eecs.umich.edu if (Otherwin == 0) 5113417Sgblack@eecs.umich.edu Canrestore = Canrestore - 1; 5123417Sgblack@eecs.umich.edu else 5133417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 5143417Sgblack@eecs.umich.edu }}); 5153598Sgblack@eecs.umich.edu 0x1: Priv::restored({{ 5163417Sgblack@eecs.umich.edu assert(Cansave || Otherwin); 5173417Sgblack@eecs.umich.edu assert(Canrestore < NWindows - 2); 5183417Sgblack@eecs.umich.edu Canrestore = Canrestore + 1; 5197741Sgblack@eecs.umich.edu if (Otherwin == 0) 5203417Sgblack@eecs.umich.edu Cansave = Cansave - 1; 5213417Sgblack@eecs.umich.edu else 5223417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 5233928Ssaidi@eecs.umich.edu 5247741Sgblack@eecs.umich.edu if (Cleanwin < NWindows - 1) 5253928Ssaidi@eecs.umich.edu Cleanwin = Cleanwin + 1; 5263417Sgblack@eecs.umich.edu }}); 5272526SN/A } 5283587Sgblack@eecs.umich.edu 0x32: decode RD { 5295094Sgblack@eecs.umich.edu 0x00: Priv::wrprtpc( 5305094Sgblack@eecs.umich.edu {{Tpc = Rs1 ^ Rs2_or_imm13;}}, checkTl=true); 5315094Sgblack@eecs.umich.edu 0x01: Priv::wrprtnpc( 5325094Sgblack@eecs.umich.edu {{Tnpc = Rs1 ^ Rs2_or_imm13;}}, checkTl=true); 5335094Sgblack@eecs.umich.edu 0x02: Priv::wrprtstate( 5345094Sgblack@eecs.umich.edu {{Tstate = Rs1 ^ Rs2_or_imm13;}}, checkTl=true); 5355094Sgblack@eecs.umich.edu 0x03: Priv::wrprtt( 5365094Sgblack@eecs.umich.edu {{Tt = Rs1 ^ Rs2_or_imm13;}}, checkTl=true); 5373823Ssaidi@eecs.umich.edu 0x04: HPriv::wrprtick({{Tick = Rs1 ^ Rs2_or_imm13;}}); 5383587Sgblack@eecs.umich.edu 0x05: Priv::wrprtba({{Tba = Rs1 ^ Rs2_or_imm13;}}); 5393587Sgblack@eecs.umich.edu 0x06: Priv::wrprpstate({{Pstate = Rs1 ^ Rs2_or_imm13;}}); 5403587Sgblack@eecs.umich.edu 0x07: Priv::wrprtl({{ 5417741Sgblack@eecs.umich.edu if (Pstate<2:> && !Hpstate<2:>) 5423587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPTL); 5433587Sgblack@eecs.umich.edu else 5443587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxTL); 5453587Sgblack@eecs.umich.edu }}); 5463587Sgblack@eecs.umich.edu 0x08: Priv::wrprpil({{Pil = Rs1 ^ Rs2_or_imm13;}}); 5473587Sgblack@eecs.umich.edu 0x09: Priv::wrprcwp({{Cwp = Rs1 ^ Rs2_or_imm13;}}); 5483587Sgblack@eecs.umich.edu 0x0A: Priv::wrprcansave({{Cansave = Rs1 ^ Rs2_or_imm13;}}); 5493587Sgblack@eecs.umich.edu 0x0B: Priv::wrprcanrestore({{Canrestore = Rs1 ^ Rs2_or_imm13;}}); 5503587Sgblack@eecs.umich.edu 0x0C: Priv::wrprcleanwin({{Cleanwin = Rs1 ^ Rs2_or_imm13;}}); 5513587Sgblack@eecs.umich.edu 0x0D: Priv::wrprotherwin({{Otherwin = Rs1 ^ Rs2_or_imm13;}}); 5523587Sgblack@eecs.umich.edu 0x0E: Priv::wrprwstate({{Wstate = Rs1 ^ Rs2_or_imm13;}}); 5537741Sgblack@eecs.umich.edu // 0x0F should cause an illegal instruction exception 5543587Sgblack@eecs.umich.edu 0x10: Priv::wrprgl({{ 5557741Sgblack@eecs.umich.edu if (Pstate<2:> && !Hpstate<2:>) 5563587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPGL); 5573587Sgblack@eecs.umich.edu else 5583587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxGL); 5593587Sgblack@eecs.umich.edu }}); 5607741Sgblack@eecs.umich.edu // 0x11-0x1F should cause an illegal instruction exception 5613587Sgblack@eecs.umich.edu } 5623587Sgblack@eecs.umich.edu 0x33: decode RD { 5633587Sgblack@eecs.umich.edu 0x00: HPriv::wrhprhpstate({{Hpstate = Rs1 ^ Rs2_or_imm13;}}); 5645094Sgblack@eecs.umich.edu 0x01: HPriv::wrhprhtstate( 5655094Sgblack@eecs.umich.edu {{Htstate = Rs1 ^ Rs2_or_imm13;}}, checkTl=true); 5667741Sgblack@eecs.umich.edu // 0x02 should cause an illegal instruction exception 5673587Sgblack@eecs.umich.edu 0x03: HPriv::wrhprhintp({{Hintp = Rs1 ^ Rs2_or_imm13;}}); 5687741Sgblack@eecs.umich.edu // 0x04 should cause an illegal instruction exception 5693587Sgblack@eecs.umich.edu 0x05: HPriv::wrhprhtba({{Htba = Rs1 ^ Rs2_or_imm13;}}); 5707741Sgblack@eecs.umich.edu // 0x06-0x01D should cause an illegal instruction exception 5713823Ssaidi@eecs.umich.edu 0x1F: HPriv::wrhprhstick_cmpr({{HstickCmpr = Rs1 ^ Rs2_or_imm13;}}); 5723587Sgblack@eecs.umich.edu } 5732954Sgblack@eecs.umich.edu 0x34: decode OPF{ 5744008Ssaidi@eecs.umich.edu format FpBasic{ 5755095Sgblack@eecs.umich.edu 0x01: fmovs({{Frds.uw = Frs2s.uw;}}); 5765095Sgblack@eecs.umich.edu 0x02: fmovd({{Frd.udw = Frs2.udw;}}); 5773995Sgblack@eecs.umich.edu 0x03: FpUnimpl::fmovq(); 5785095Sgblack@eecs.umich.edu 0x05: fnegs({{Frds.uw = Frs2s.uw ^ (1UL << 31);}}); 5795095Sgblack@eecs.umich.edu 0x06: fnegd({{Frd.udw = Frs2.udw ^ (1ULL << 63);}}); 5803995Sgblack@eecs.umich.edu 0x07: FpUnimpl::fnegq(); 5815095Sgblack@eecs.umich.edu 0x09: fabss({{Frds.uw = ((1UL << 31) - 1) & Frs2s.uw;}}); 5825095Sgblack@eecs.umich.edu 0x0A: fabsd({{Frd.udw = ((1ULL << 63) - 1) & Frs2.udw;}}); 5833995Sgblack@eecs.umich.edu 0x0B: FpUnimpl::fabsq(); 5843918Ssaidi@eecs.umich.edu 0x29: fsqrts({{Frds.sf = std::sqrt(Frs2s.sf);}}); 5853918Ssaidi@eecs.umich.edu 0x2A: fsqrtd({{Frd.df = std::sqrt(Frs2.df);}}); 5863995Sgblack@eecs.umich.edu 0x2B: FpUnimpl::fsqrtq(); 5873279Sgblack@eecs.umich.edu 0x41: fadds({{Frds.sf = Frs1s.sf + Frs2s.sf;}}); 5882963Sgblack@eecs.umich.edu 0x42: faddd({{Frd.df = Frs1.df + Frs2.df;}}); 5893995Sgblack@eecs.umich.edu 0x43: FpUnimpl::faddq(); 5903279Sgblack@eecs.umich.edu 0x45: fsubs({{Frds.sf = Frs1s.sf - Frs2s.sf;}}); 5914008Ssaidi@eecs.umich.edu 0x46: fsubd({{Frd.df = Frs1.df - Frs2.df; }}); 5923995Sgblack@eecs.umich.edu 0x47: FpUnimpl::fsubq(); 5933279Sgblack@eecs.umich.edu 0x49: fmuls({{Frds.sf = Frs1s.sf * Frs2s.sf;}}); 5942963Sgblack@eecs.umich.edu 0x4A: fmuld({{Frd.df = Frs1.df * Frs2.df;}}); 5953995Sgblack@eecs.umich.edu 0x4B: FpUnimpl::fmulq(); 5963279Sgblack@eecs.umich.edu 0x4D: fdivs({{Frds.sf = Frs1s.sf / Frs2s.sf;}}); 5972963Sgblack@eecs.umich.edu 0x4E: fdivd({{Frd.df = Frs1.df / Frs2.df;}}); 5983995Sgblack@eecs.umich.edu 0x4F: FpUnimpl::fdivq(); 5993279Sgblack@eecs.umich.edu 0x69: fsmuld({{Frd.df = Frs1s.sf * Frs2s.sf;}}); 6003995Sgblack@eecs.umich.edu 0x6E: FpUnimpl::fdmulq(); 6015095Sgblack@eecs.umich.edu 0x81: fstox({{Frd.sdw = static_cast<int64_t>(Frs2s.sf);}}); 6025095Sgblack@eecs.umich.edu 0x82: fdtox({{Frd.sdw = static_cast<int64_t>(Frs2.df);}}); 6033995Sgblack@eecs.umich.edu 0x83: FpUnimpl::fqtox(); 6045095Sgblack@eecs.umich.edu 0x84: fxtos({{Frds.sf = static_cast<float>(Frs2.sdw);}}); 6055095Sgblack@eecs.umich.edu 0x88: fxtod({{Frd.df = static_cast<double>(Frs2.sdw);}}); 6063995Sgblack@eecs.umich.edu 0x8C: FpUnimpl::fxtoq(); 6075095Sgblack@eecs.umich.edu 0xC4: fitos({{Frds.sf = static_cast<float>(Frs2s.sw);}}); 6083279Sgblack@eecs.umich.edu 0xC6: fdtos({{Frds.sf = Frs2.df;}}); 6093995Sgblack@eecs.umich.edu 0xC7: FpUnimpl::fqtos(); 6105095Sgblack@eecs.umich.edu 0xC8: fitod({{Frd.df = static_cast<double>(Frs2s.sw);}}); 6113279Sgblack@eecs.umich.edu 0xC9: fstod({{Frd.df = Frs2s.sf;}}); 6123995Sgblack@eecs.umich.edu 0xCB: FpUnimpl::fqtod(); 6133995Sgblack@eecs.umich.edu 0xCC: FpUnimpl::fitoq(); 6143995Sgblack@eecs.umich.edu 0xCD: FpUnimpl::fstoq(); 6153995Sgblack@eecs.umich.edu 0xCE: FpUnimpl::fdtoq(); 6162963Sgblack@eecs.umich.edu 0xD1: fstoi({{ 6174008Ssaidi@eecs.umich.edu Frds.sw = static_cast<int32_t>(Frs2s.sf); 6184008Ssaidi@eecs.umich.edu float t = Frds.sw; 6194008Ssaidi@eecs.umich.edu if (t != Frs2s.sf) 6204008Ssaidi@eecs.umich.edu Fsr = insertBits(Fsr, 4,0, 0x01); 6212963Sgblack@eecs.umich.edu }}); 6222963Sgblack@eecs.umich.edu 0xD2: fdtoi({{ 6234008Ssaidi@eecs.umich.edu Frds.sw = static_cast<int32_t>(Frs2.df); 6244008Ssaidi@eecs.umich.edu double t = Frds.sw; 6254008Ssaidi@eecs.umich.edu if (t != Frs2.df) 6264008Ssaidi@eecs.umich.edu Fsr = insertBits(Fsr, 4,0, 0x01); 6272963Sgblack@eecs.umich.edu }}); 6283995Sgblack@eecs.umich.edu 0xD3: FpUnimpl::fqtoi(); 6293941Ssaidi@eecs.umich.edu default: FailUnimpl::fpop1(); 6302963Sgblack@eecs.umich.edu } 6312954Sgblack@eecs.umich.edu } 6323992Sgblack@eecs.umich.edu 0x35: decode OPF{ 6334008Ssaidi@eecs.umich.edu format FpBasic{ 6344204Sgblack@eecs.umich.edu 0x01: fmovs_fcc0({{ 6357741Sgblack@eecs.umich.edu if (passesFpCondition(Fsr<11:10>, COND4)) 6364204Sgblack@eecs.umich.edu Frds = Frs2s; 6374204Sgblack@eecs.umich.edu else 6384204Sgblack@eecs.umich.edu Frds = Frds; 6394204Sgblack@eecs.umich.edu }}); 6404204Sgblack@eecs.umich.edu 0x02: fmovd_fcc0({{ 6417741Sgblack@eecs.umich.edu if (passesFpCondition(Fsr<11:10>, COND4)) 6424204Sgblack@eecs.umich.edu Frd = Frs2; 6434204Sgblack@eecs.umich.edu else 6444204Sgblack@eecs.umich.edu Frd = Frd; 6454204Sgblack@eecs.umich.edu }}); 6464204Sgblack@eecs.umich.edu 0x03: FpUnimpl::fmovq_fcc0(); 6474204Sgblack@eecs.umich.edu 0x25: fmovrsz({{ 6487741Sgblack@eecs.umich.edu if (Rs1 == 0) 6494204Sgblack@eecs.umich.edu Frds = Frs2s; 6504204Sgblack@eecs.umich.edu else 6514204Sgblack@eecs.umich.edu Frds = Frds; 6524204Sgblack@eecs.umich.edu }}); 6534204Sgblack@eecs.umich.edu 0x26: fmovrdz({{ 6547741Sgblack@eecs.umich.edu if (Rs1 == 0) 6554204Sgblack@eecs.umich.edu Frd = Frs2; 6564204Sgblack@eecs.umich.edu else 6574204Sgblack@eecs.umich.edu Frd = Frd; 6584204Sgblack@eecs.umich.edu }}); 6594204Sgblack@eecs.umich.edu 0x27: FpUnimpl::fmovrqz(); 6604204Sgblack@eecs.umich.edu 0x41: fmovs_fcc1({{ 6617741Sgblack@eecs.umich.edu if (passesFpCondition(Fsr<33:32>, COND4)) 6624204Sgblack@eecs.umich.edu Frds = Frs2s; 6634204Sgblack@eecs.umich.edu else 6644204Sgblack@eecs.umich.edu Frds = Frds; 6654204Sgblack@eecs.umich.edu }}); 6664204Sgblack@eecs.umich.edu 0x42: fmovd_fcc1({{ 6677741Sgblack@eecs.umich.edu if (passesFpCondition(Fsr<33:32>, COND4)) 6684204Sgblack@eecs.umich.edu Frd = Frs2; 6694204Sgblack@eecs.umich.edu else 6704204Sgblack@eecs.umich.edu Frd = Frd; 6714204Sgblack@eecs.umich.edu }}); 6724204Sgblack@eecs.umich.edu 0x43: FpUnimpl::fmovq_fcc1(); 6734204Sgblack@eecs.umich.edu 0x45: fmovrslez({{ 6747741Sgblack@eecs.umich.edu if (Rs1 <= 0) 6754204Sgblack@eecs.umich.edu Frds = Frs2s; 6764204Sgblack@eecs.umich.edu else 6774204Sgblack@eecs.umich.edu Frds = Frds; 6784204Sgblack@eecs.umich.edu }}); 6794204Sgblack@eecs.umich.edu 0x46: fmovrdlez({{ 6807741Sgblack@eecs.umich.edu if (Rs1 <= 0) 6814204Sgblack@eecs.umich.edu Frd = Frs2; 6824204Sgblack@eecs.umich.edu else 6834204Sgblack@eecs.umich.edu Frd = Frd; 6844204Sgblack@eecs.umich.edu }}); 6854204Sgblack@eecs.umich.edu 0x47: FpUnimpl::fmovrqlez(); 6863992Sgblack@eecs.umich.edu 0x51: fcmps({{ 6873992Sgblack@eecs.umich.edu uint8_t fcc; 6887741Sgblack@eecs.umich.edu if (isnan(Frs1s) || isnan(Frs2s)) 6893992Sgblack@eecs.umich.edu fcc = 3; 6907741Sgblack@eecs.umich.edu else if (Frs1s < Frs2s) 6913992Sgblack@eecs.umich.edu fcc = 1; 6927741Sgblack@eecs.umich.edu else if (Frs1s > Frs2s) 6933992Sgblack@eecs.umich.edu fcc = 2; 6943992Sgblack@eecs.umich.edu else 6953992Sgblack@eecs.umich.edu fcc = 0; 6963992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 6977741Sgblack@eecs.umich.edu if (FCMPCC) 6983992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 6993992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 7003992Sgblack@eecs.umich.edu }}); 7013992Sgblack@eecs.umich.edu 0x52: fcmpd({{ 7023992Sgblack@eecs.umich.edu uint8_t fcc; 7037741Sgblack@eecs.umich.edu if (isnan(Frs1) || isnan(Frs2)) 7043992Sgblack@eecs.umich.edu fcc = 3; 7057741Sgblack@eecs.umich.edu else if (Frs1 < Frs2) 7063992Sgblack@eecs.umich.edu fcc = 1; 7077741Sgblack@eecs.umich.edu else if (Frs1 > Frs2) 7083992Sgblack@eecs.umich.edu fcc = 2; 7093992Sgblack@eecs.umich.edu else 7103992Sgblack@eecs.umich.edu fcc = 0; 7113992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 7127741Sgblack@eecs.umich.edu if (FCMPCC) 7133992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 7143992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 7153992Sgblack@eecs.umich.edu }}); 7163995Sgblack@eecs.umich.edu 0x53: FpUnimpl::fcmpq(); 7173997Ssaidi@eecs.umich.edu 0x55: fcmpes({{ 7183992Sgblack@eecs.umich.edu uint8_t fcc = 0; 7197741Sgblack@eecs.umich.edu if (isnan(Frs1s) || isnan(Frs2s)) 7203992Sgblack@eecs.umich.edu fault = new FpExceptionIEEE754; 7217741Sgblack@eecs.umich.edu if (Frs1s < Frs2s) 7223992Sgblack@eecs.umich.edu fcc = 1; 7237741Sgblack@eecs.umich.edu else if (Frs1s > Frs2s) 7243992Sgblack@eecs.umich.edu fcc = 2; 7253992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 7267741Sgblack@eecs.umich.edu if (FCMPCC) 7273992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 7283992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 7293992Sgblack@eecs.umich.edu }}); 7303997Ssaidi@eecs.umich.edu 0x56: fcmped({{ 7313992Sgblack@eecs.umich.edu uint8_t fcc = 0; 7327741Sgblack@eecs.umich.edu if (isnan(Frs1) || isnan(Frs2)) 7333992Sgblack@eecs.umich.edu fault = new FpExceptionIEEE754; 7347741Sgblack@eecs.umich.edu if (Frs1 < Frs2) 7353992Sgblack@eecs.umich.edu fcc = 1; 7367741Sgblack@eecs.umich.edu else if (Frs1 > Frs2) 7373992Sgblack@eecs.umich.edu fcc = 2; 7383992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 7397741Sgblack@eecs.umich.edu if (FCMPCC) 7403992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 7413992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 7423992Sgblack@eecs.umich.edu }}); 7433997Ssaidi@eecs.umich.edu 0x57: FpUnimpl::fcmpeq(); 7444204Sgblack@eecs.umich.edu 0x65: fmovrslz({{ 7457741Sgblack@eecs.umich.edu if (Rs1 < 0) 7464204Sgblack@eecs.umich.edu Frds = Frs2s; 7474204Sgblack@eecs.umich.edu else 7484204Sgblack@eecs.umich.edu Frds = Frds; 7494204Sgblack@eecs.umich.edu }}); 7504204Sgblack@eecs.umich.edu 0x66: fmovrdlz({{ 7517741Sgblack@eecs.umich.edu if (Rs1 < 0) 7524204Sgblack@eecs.umich.edu Frd = Frs2; 7534204Sgblack@eecs.umich.edu else 7544204Sgblack@eecs.umich.edu Frd = Frd; 7554204Sgblack@eecs.umich.edu }}); 7564204Sgblack@eecs.umich.edu 0x67: FpUnimpl::fmovrqlz(); 7574204Sgblack@eecs.umich.edu 0x81: fmovs_fcc2({{ 7587741Sgblack@eecs.umich.edu if (passesFpCondition(Fsr<35:34>, COND4)) 7594204Sgblack@eecs.umich.edu Frds = Frs2s; 7604204Sgblack@eecs.umich.edu else 7614204Sgblack@eecs.umich.edu Frds = Frds; 7624204Sgblack@eecs.umich.edu }}); 7634204Sgblack@eecs.umich.edu 0x82: fmovd_fcc2({{ 7647741Sgblack@eecs.umich.edu if (passesFpCondition(Fsr<35:34>, COND4)) 7654204Sgblack@eecs.umich.edu Frd = Frs2; 7664204Sgblack@eecs.umich.edu else 7674204Sgblack@eecs.umich.edu Frd = Frd; 7684204Sgblack@eecs.umich.edu }}); 7694204Sgblack@eecs.umich.edu 0x83: FpUnimpl::fmovq_fcc2(); 7704204Sgblack@eecs.umich.edu 0xA5: fmovrsnz({{ 7717741Sgblack@eecs.umich.edu if (Rs1 != 0) 7724204Sgblack@eecs.umich.edu Frds = Frs2s; 7734204Sgblack@eecs.umich.edu else 7744204Sgblack@eecs.umich.edu Frds = Frds; 7754204Sgblack@eecs.umich.edu }}); 7764204Sgblack@eecs.umich.edu 0xA6: fmovrdnz({{ 7777741Sgblack@eecs.umich.edu if (Rs1 != 0) 7784204Sgblack@eecs.umich.edu Frd = Frs2; 7794204Sgblack@eecs.umich.edu else 7804204Sgblack@eecs.umich.edu Frd = Frd; 7814204Sgblack@eecs.umich.edu }}); 7824204Sgblack@eecs.umich.edu 0xA7: FpUnimpl::fmovrqnz(); 7834204Sgblack@eecs.umich.edu 0xC1: fmovs_fcc3({{ 7847741Sgblack@eecs.umich.edu if (passesFpCondition(Fsr<37:36>, COND4)) 7854204Sgblack@eecs.umich.edu Frds = Frs2s; 7864204Sgblack@eecs.umich.edu else 7874204Sgblack@eecs.umich.edu Frds = Frds; 7884204Sgblack@eecs.umich.edu }}); 7894204Sgblack@eecs.umich.edu 0xC2: fmovd_fcc3({{ 7907741Sgblack@eecs.umich.edu if (passesFpCondition(Fsr<37:36>, COND4)) 7914204Sgblack@eecs.umich.edu Frd = Frs2; 7924204Sgblack@eecs.umich.edu else 7934204Sgblack@eecs.umich.edu Frd = Frd; 7944204Sgblack@eecs.umich.edu }}); 7954204Sgblack@eecs.umich.edu 0xC3: FpUnimpl::fmovq_fcc3(); 7964204Sgblack@eecs.umich.edu 0xC5: fmovrsgz({{ 7977741Sgblack@eecs.umich.edu if (Rs1 > 0) 7984204Sgblack@eecs.umich.edu Frds = Frs2s; 7994204Sgblack@eecs.umich.edu else 8004204Sgblack@eecs.umich.edu Frds = Frds; 8014204Sgblack@eecs.umich.edu }}); 8024204Sgblack@eecs.umich.edu 0xC6: fmovrdgz({{ 8037741Sgblack@eecs.umich.edu if (Rs1 > 0) 8044204Sgblack@eecs.umich.edu Frd = Frs2; 8054204Sgblack@eecs.umich.edu else 8064204Sgblack@eecs.umich.edu Frd = Frd; 8074204Sgblack@eecs.umich.edu }}); 8084204Sgblack@eecs.umich.edu 0xC7: FpUnimpl::fmovrqgz(); 8094204Sgblack@eecs.umich.edu 0xE5: fmovrsgez({{ 8107741Sgblack@eecs.umich.edu if (Rs1 >= 0) 8114204Sgblack@eecs.umich.edu Frds = Frs2s; 8124204Sgblack@eecs.umich.edu else 8134204Sgblack@eecs.umich.edu Frds = Frds; 8144204Sgblack@eecs.umich.edu }}); 8154204Sgblack@eecs.umich.edu 0xE6: fmovrdgez({{ 8167741Sgblack@eecs.umich.edu if (Rs1 >= 0) 8174204Sgblack@eecs.umich.edu Frd = Frs2; 8184204Sgblack@eecs.umich.edu else 8194204Sgblack@eecs.umich.edu Frd = Frd; 8204204Sgblack@eecs.umich.edu }}); 8214204Sgblack@eecs.umich.edu 0xE7: FpUnimpl::fmovrqgez(); 8224204Sgblack@eecs.umich.edu 0x101: fmovs_icc({{ 8237741Sgblack@eecs.umich.edu if (passesCondition(Ccr<3:0>, COND4)) 8244204Sgblack@eecs.umich.edu Frds = Frs2s; 8254204Sgblack@eecs.umich.edu else 8264204Sgblack@eecs.umich.edu Frds = Frds; 8274204Sgblack@eecs.umich.edu }}); 8284204Sgblack@eecs.umich.edu 0x102: fmovd_icc({{ 8297741Sgblack@eecs.umich.edu if (passesCondition(Ccr<3:0>, COND4)) 8304204Sgblack@eecs.umich.edu Frd = Frs2; 8314204Sgblack@eecs.umich.edu else 8324204Sgblack@eecs.umich.edu Frd = Frd; 8334204Sgblack@eecs.umich.edu }}); 8344204Sgblack@eecs.umich.edu 0x103: FpUnimpl::fmovq_icc(); 8354204Sgblack@eecs.umich.edu 0x181: fmovs_xcc({{ 8367741Sgblack@eecs.umich.edu if (passesCondition(Ccr<7:4>, COND4)) 8374204Sgblack@eecs.umich.edu Frds = Frs2s; 8384204Sgblack@eecs.umich.edu else 8394204Sgblack@eecs.umich.edu Frds = Frds; 8404204Sgblack@eecs.umich.edu }}); 8414204Sgblack@eecs.umich.edu 0x182: fmovd_xcc({{ 8427741Sgblack@eecs.umich.edu if (passesCondition(Ccr<7:4>, COND4)) 8434204Sgblack@eecs.umich.edu Frd = Frs2; 8444204Sgblack@eecs.umich.edu else 8454204Sgblack@eecs.umich.edu Frd = Frd; 8464204Sgblack@eecs.umich.edu }}); 8474204Sgblack@eecs.umich.edu 0x183: FpUnimpl::fmovq_xcc(); 8483992Sgblack@eecs.umich.edu default: FailUnimpl::fpop2(); 8493992Sgblack@eecs.umich.edu } 8503992Sgblack@eecs.umich.edu } 8517741Sgblack@eecs.umich.edu // This used to be just impdep1, but now it's a whole bunch 8527741Sgblack@eecs.umich.edu // of instructions 8532954Sgblack@eecs.umich.edu 0x36: decode OPF{ 8543941Ssaidi@eecs.umich.edu 0x00: FailUnimpl::edge8(); 8553941Ssaidi@eecs.umich.edu 0x01: FailUnimpl::edge8n(); 8563941Ssaidi@eecs.umich.edu 0x02: FailUnimpl::edge8l(); 8573941Ssaidi@eecs.umich.edu 0x03: FailUnimpl::edge8ln(); 8583941Ssaidi@eecs.umich.edu 0x04: FailUnimpl::edge16(); 8593941Ssaidi@eecs.umich.edu 0x05: FailUnimpl::edge16n(); 8603941Ssaidi@eecs.umich.edu 0x06: FailUnimpl::edge16l(); 8613941Ssaidi@eecs.umich.edu 0x07: FailUnimpl::edge16ln(); 8623941Ssaidi@eecs.umich.edu 0x08: FailUnimpl::edge32(); 8633941Ssaidi@eecs.umich.edu 0x09: FailUnimpl::edge32n(); 8643941Ssaidi@eecs.umich.edu 0x0A: FailUnimpl::edge32l(); 8653941Ssaidi@eecs.umich.edu 0x0B: FailUnimpl::edge32ln(); 8663941Ssaidi@eecs.umich.edu 0x10: FailUnimpl::array8(); 8673941Ssaidi@eecs.umich.edu 0x12: FailUnimpl::array16(); 8683941Ssaidi@eecs.umich.edu 0x14: FailUnimpl::array32(); 8693042Sgblack@eecs.umich.edu 0x18: BasicOperate::alignaddr({{ 8702963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 8713042Sgblack@eecs.umich.edu Rd = sum & ~7; 8722963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | (sum & 7); 8732963Sgblack@eecs.umich.edu }}); 8743941Ssaidi@eecs.umich.edu 0x19: FailUnimpl::bmask(); 8752963Sgblack@eecs.umich.edu 0x1A: BasicOperate::alignaddresslittle({{ 8762963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 8773042Sgblack@eecs.umich.edu Rd = sum & ~7; 8782963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | ((~sum + 1) & 7); 8792963Sgblack@eecs.umich.edu }}); 8803941Ssaidi@eecs.umich.edu 0x20: FailUnimpl::fcmple16(); 8813941Ssaidi@eecs.umich.edu 0x22: FailUnimpl::fcmpne16(); 8823941Ssaidi@eecs.umich.edu 0x24: FailUnimpl::fcmple32(); 8833941Ssaidi@eecs.umich.edu 0x26: FailUnimpl::fcmpne32(); 8843941Ssaidi@eecs.umich.edu 0x28: FailUnimpl::fcmpgt16(); 8853941Ssaidi@eecs.umich.edu 0x2A: FailUnimpl::fcmpeq16(); 8863941Ssaidi@eecs.umich.edu 0x2C: FailUnimpl::fcmpgt32(); 8873941Ssaidi@eecs.umich.edu 0x2E: FailUnimpl::fcmpeq32(); 8883941Ssaidi@eecs.umich.edu 0x31: FailUnimpl::fmul8x16(); 8893941Ssaidi@eecs.umich.edu 0x33: FailUnimpl::fmul8x16au(); 8903941Ssaidi@eecs.umich.edu 0x35: FailUnimpl::fmul8x16al(); 8913941Ssaidi@eecs.umich.edu 0x36: FailUnimpl::fmul8sux16(); 8923941Ssaidi@eecs.umich.edu 0x37: FailUnimpl::fmul8ulx16(); 8933941Ssaidi@eecs.umich.edu 0x38: FailUnimpl::fmuld8sux16(); 8943941Ssaidi@eecs.umich.edu 0x39: FailUnimpl::fmuld8ulx16(); 8952954Sgblack@eecs.umich.edu 0x3A: Trap::fpack32({{fault = new IllegalInstruction;}}); 8962954Sgblack@eecs.umich.edu 0x3B: Trap::fpack16({{fault = new IllegalInstruction;}}); 8972954Sgblack@eecs.umich.edu 0x3D: Trap::fpackfix({{fault = new IllegalInstruction;}}); 8982954Sgblack@eecs.umich.edu 0x3E: Trap::pdist({{fault = new IllegalInstruction;}}); 8992963Sgblack@eecs.umich.edu 0x48: BasicOperate::faligndata({{ 9003057Sgblack@eecs.umich.edu uint64_t msbX = Frs1.udw; 9013057Sgblack@eecs.umich.edu uint64_t lsbX = Frs2.udw; 9027741Sgblack@eecs.umich.edu // Some special cases need to be split out, first 9037741Sgblack@eecs.umich.edu // because they're the most likely to be used, and 9047741Sgblack@eecs.umich.edu // second because otherwise, we end up shifting by 9057741Sgblack@eecs.umich.edu // greater than the width of the type being shifted, 9067741Sgblack@eecs.umich.edu // namely 64, which produces undefined results 9077741Sgblack@eecs.umich.edu // according to the C standard. 9087741Sgblack@eecs.umich.edu switch (Gsr<2:0>) { 9097741Sgblack@eecs.umich.edu case 0: 9107741Sgblack@eecs.umich.edu Frd.udw = msbX; 9117741Sgblack@eecs.umich.edu break; 9127741Sgblack@eecs.umich.edu case 8: 9137741Sgblack@eecs.umich.edu Frd.udw = lsbX; 9147741Sgblack@eecs.umich.edu break; 9157741Sgblack@eecs.umich.edu default: 9167741Sgblack@eecs.umich.edu uint64_t msbShift = Gsr<2:0> * 8; 9177741Sgblack@eecs.umich.edu uint64_t lsbShift = (8 - Gsr<2:0>) * 8; 9187741Sgblack@eecs.umich.edu uint64_t msbMask = ((uint64_t)(-1)) >> msbShift; 9197741Sgblack@eecs.umich.edu uint64_t lsbMask = ((uint64_t)(-1)) << lsbShift; 9207741Sgblack@eecs.umich.edu Frd.udw = ((msbX & msbMask) << msbShift) | 9217741Sgblack@eecs.umich.edu ((lsbX & lsbMask) >> lsbShift); 9223057Sgblack@eecs.umich.edu } 9232963Sgblack@eecs.umich.edu }}); 9242954Sgblack@eecs.umich.edu 0x4B: Trap::fpmerge({{fault = new IllegalInstruction;}}); 9253941Ssaidi@eecs.umich.edu 0x4C: FailUnimpl::bshuffle(); 9263941Ssaidi@eecs.umich.edu 0x4D: FailUnimpl::fexpand(); 9273941Ssaidi@eecs.umich.edu 0x50: FailUnimpl::fpadd16(); 9283941Ssaidi@eecs.umich.edu 0x51: FailUnimpl::fpadd16s(); 9293941Ssaidi@eecs.umich.edu 0x52: FailUnimpl::fpadd32(); 9303941Ssaidi@eecs.umich.edu 0x53: FailUnimpl::fpadd32s(); 9313941Ssaidi@eecs.umich.edu 0x54: FailUnimpl::fpsub16(); 9323941Ssaidi@eecs.umich.edu 0x55: FailUnimpl::fpsub16s(); 9333941Ssaidi@eecs.umich.edu 0x56: FailUnimpl::fpsub32(); 9343941Ssaidi@eecs.umich.edu 0x57: FailUnimpl::fpsub32s(); 9354008Ssaidi@eecs.umich.edu 0x60: FpBasic::fzero({{Frd.df = 0;}}); 9364008Ssaidi@eecs.umich.edu 0x61: FpBasic::fzeros({{Frds.sf = 0;}}); 9373941Ssaidi@eecs.umich.edu 0x62: FailUnimpl::fnor(); 9383941Ssaidi@eecs.umich.edu 0x63: FailUnimpl::fnors(); 9393941Ssaidi@eecs.umich.edu 0x64: FailUnimpl::fandnot2(); 9403941Ssaidi@eecs.umich.edu 0x65: FailUnimpl::fandnot2s(); 9414008Ssaidi@eecs.umich.edu 0x66: FpBasic::fnot2({{ 9422963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs2.df)); 9432963Sgblack@eecs.umich.edu }}); 9444008Ssaidi@eecs.umich.edu 0x67: FpBasic::fnot2s({{ 9453279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs2s.sf)); 9462963Sgblack@eecs.umich.edu }}); 9473941Ssaidi@eecs.umich.edu 0x68: FailUnimpl::fandnot1(); 9483941Ssaidi@eecs.umich.edu 0x69: FailUnimpl::fandnot1s(); 9494008Ssaidi@eecs.umich.edu 0x6A: FpBasic::fnot1({{ 9502963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs1.df)); 9512963Sgblack@eecs.umich.edu }}); 9524008Ssaidi@eecs.umich.edu 0x6B: FpBasic::fnot1s({{ 9533279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs1s.sf)); 9542963Sgblack@eecs.umich.edu }}); 9553941Ssaidi@eecs.umich.edu 0x6C: FailUnimpl::fxor(); 9563941Ssaidi@eecs.umich.edu 0x6D: FailUnimpl::fxors(); 9573941Ssaidi@eecs.umich.edu 0x6E: FailUnimpl::fnand(); 9583941Ssaidi@eecs.umich.edu 0x6F: FailUnimpl::fnands(); 9593941Ssaidi@eecs.umich.edu 0x70: FailUnimpl::fand(); 9603941Ssaidi@eecs.umich.edu 0x71: FailUnimpl::fands(); 9613941Ssaidi@eecs.umich.edu 0x72: FailUnimpl::fxnor(); 9623941Ssaidi@eecs.umich.edu 0x73: FailUnimpl::fxnors(); 9634008Ssaidi@eecs.umich.edu 0x74: FpBasic::fsrc1({{Frd.udw = Frs1.udw;}}); 9644008Ssaidi@eecs.umich.edu 0x75: FpBasic::fsrc1s({{Frds.uw = Frs1s.uw;}}); 9653941Ssaidi@eecs.umich.edu 0x76: FailUnimpl::fornot2(); 9663941Ssaidi@eecs.umich.edu 0x77: FailUnimpl::fornot2s(); 9674008Ssaidi@eecs.umich.edu 0x78: FpBasic::fsrc2({{Frd.udw = Frs2.udw;}}); 9684008Ssaidi@eecs.umich.edu 0x79: FpBasic::fsrc2s({{Frds.uw = Frs2s.uw;}}); 9693941Ssaidi@eecs.umich.edu 0x7A: FailUnimpl::fornot1(); 9703941Ssaidi@eecs.umich.edu 0x7B: FailUnimpl::fornot1s(); 9713941Ssaidi@eecs.umich.edu 0x7C: FailUnimpl::for(); 9723941Ssaidi@eecs.umich.edu 0x7D: FailUnimpl::fors(); 9734008Ssaidi@eecs.umich.edu 0x7E: FpBasic::fone({{Frd.udw = std::numeric_limits<uint64_t>::max();}}); 9744008Ssaidi@eecs.umich.edu 0x7F: FpBasic::fones({{Frds.uw = std::numeric_limits<uint32_t>::max();}}); 9752954Sgblack@eecs.umich.edu 0x80: Trap::shutdown({{fault = new IllegalInstruction;}}); 9763941Ssaidi@eecs.umich.edu 0x81: FailUnimpl::siam(); 9772954Sgblack@eecs.umich.edu } 9784090Ssaidi@eecs.umich.edu // M5 special opcodes use the reserved IMPDEP2A opcode space 9794090Ssaidi@eecs.umich.edu 0x37: decode M5FUNC { 9804096Sgblack@eecs.umich.edu#if FULL_SYSTEM 9814113Sgblack@eecs.umich.edu format BasicOperate { 9824113Sgblack@eecs.umich.edu // we have 7 bits of space here to play with... 9837790Sgblack@eecs.umich.edu 0x21: m5exit({{ 9847790Sgblack@eecs.umich.edu PseudoInst::m5exit(xc->tcBase(), O0); 9857790Sgblack@eecs.umich.edu }}, No_OpClass, IsNonSpeculative); 9864113Sgblack@eecs.umich.edu 0x50: m5readfile({{ 9877790Sgblack@eecs.umich.edu O0 = PseudoInst::readfile(xc->tcBase(), O0, O1, O2); 9887790Sgblack@eecs.umich.edu }}, IsNonSpeculative); 9897790Sgblack@eecs.umich.edu 0x51: m5break({{ 9907790Sgblack@eecs.umich.edu PseudoInst::debugbreak(xc->tcBase()); 9917790Sgblack@eecs.umich.edu }}, IsNonSpeculative); 9924113Sgblack@eecs.umich.edu 0x54: m5panic({{ 9937790Sgblack@eecs.umich.edu panic("M5 panic instruction called at pc = %#x.", PC); 9947790Sgblack@eecs.umich.edu }}, No_OpClass, IsNonSpeculative); 9954113Sgblack@eecs.umich.edu } 9964096Sgblack@eecs.umich.edu#endif 9974096Sgblack@eecs.umich.edu default: Trap::impdep2({{fault = new IllegalInstruction;}}); 9984090Ssaidi@eecs.umich.edu } 9992526SN/A 0x38: Branch::jmpl({{ 10002526SN/A Addr target = Rs1 + Rs2_or_imm13; 10017741Sgblack@eecs.umich.edu if (target & 0x3) { 10022526SN/A fault = new MemAddressNotAligned; 10037741Sgblack@eecs.umich.edu } else { 10043928Ssaidi@eecs.umich.edu if (Pstate<3:>) 10057790Sgblack@eecs.umich.edu Rd = (PC)<31:0>; 10063928Ssaidi@eecs.umich.edu else 10077790Sgblack@eecs.umich.edu Rd = PC; 10087790Sgblack@eecs.umich.edu NNPC = target; 10092526SN/A } 10102526SN/A }}); 10112526SN/A 0x39: Branch::return({{ 10122526SN/A Addr target = Rs1 + Rs2_or_imm13; 10137741Sgblack@eecs.umich.edu if (fault == NoFault) { 10147741Sgblack@eecs.umich.edu // Check for fills which are higher priority than alignment 10157741Sgblack@eecs.umich.edu // faults. 10167741Sgblack@eecs.umich.edu if (Canrestore == 0) { 10177741Sgblack@eecs.umich.edu if (Otherwin) 10183909Ssaidi@eecs.umich.edu fault = new FillNOther(4*Wstate<5:3>); 10192561SN/A else 10203909Ssaidi@eecs.umich.edu fault = new FillNNormal(4*Wstate<2:0>); 10217741Sgblack@eecs.umich.edu } else if (target & 0x3) { // Check for alignment faults 10223765Sgblack@eecs.umich.edu fault = new MemAddressNotAligned; 10237741Sgblack@eecs.umich.edu } else { 10247790Sgblack@eecs.umich.edu NNPC = target; 10253417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 10262561SN/A Cansave = Cansave + 1; 10272561SN/A Canrestore = Canrestore - 1; 10282561SN/A } 10292561SN/A } 10302526SN/A }}); 10312526SN/A 0x3A: decode CC 10322526SN/A { 10332526SN/A 0x0: Trap::tcci({{ 10347741Sgblack@eecs.umich.edu if (passesCondition(Ccr<3:0>, COND2)) { 10352561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 10362561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 10373531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 10382561SN/A } 10394828Sgblack@eecs.umich.edu }}, IsSerializeAfter, IsNonSpeculative, IsSyscall); 10402526SN/A 0x2: Trap::tccx({{ 10417741Sgblack@eecs.umich.edu if (passesCondition(Ccr<7:4>, COND2)) { 10422561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 10432561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 10443531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 10452526SN/A } 10464828Sgblack@eecs.umich.edu }}, IsSerializeAfter, IsNonSpeculative, IsSyscall); 10472526SN/A } 10484090Ssaidi@eecs.umich.edu 0x3B: Nop::flush({{/*Instruction memory flush*/}}, IsWriteBarrier, 10494090Ssaidi@eecs.umich.edu MemWriteOp); 10502526SN/A 0x3C: save({{ 10517741Sgblack@eecs.umich.edu if (Cansave == 0) { 10527741Sgblack@eecs.umich.edu if (Otherwin) 10533909Ssaidi@eecs.umich.edu fault = new SpillNOther(4*Wstate<5:3>); 10542526SN/A else 10553909Ssaidi@eecs.umich.edu fault = new SpillNNormal(4*Wstate<2:0>); 10567741Sgblack@eecs.umich.edu } else if (Cleanwin - Canrestore == 0) { 10572526SN/A fault = new CleanWindow; 10587741Sgblack@eecs.umich.edu } else { 10592526SN/A Cwp = (Cwp + 1) % NWindows; 10603765Sgblack@eecs.umich.edu Rd_next = Rs1 + Rs2_or_imm13; 10612561SN/A Cansave = Cansave - 1; 10622561SN/A Canrestore = Canrestore + 1; 10632526SN/A } 10642526SN/A }}); 10652526SN/A 0x3D: restore({{ 10667741Sgblack@eecs.umich.edu if (Canrestore == 0) { 10677741Sgblack@eecs.umich.edu if (Otherwin) 10683909Ssaidi@eecs.umich.edu fault = new FillNOther(4*Wstate<5:3>); 10692526SN/A else 10703909Ssaidi@eecs.umich.edu fault = new FillNNormal(4*Wstate<2:0>); 10717741Sgblack@eecs.umich.edu } else { 10723417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 10733765Sgblack@eecs.umich.edu Rd_prev = Rs1 + Rs2_or_imm13; 10742561SN/A Cansave = Cansave + 1; 10752561SN/A Canrestore = Canrestore - 1; 10762526SN/A } 10772526SN/A }}); 10782526SN/A 0x3E: decode FCN { 10792526SN/A 0x0: Priv::done({{ 10802646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 10812646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 10822646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 10832646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 10842646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 10853825Ssaidi@eecs.umich.edu Hpstate = Htstate; 10867790Sgblack@eecs.umich.edu NPC = Tnpc; 10877790Sgblack@eecs.umich.edu NNPC = Tnpc + 4; 10882526SN/A Tl = Tl - 1; 10895094Sgblack@eecs.umich.edu }}, checkTl=true); 10902938Sgblack@eecs.umich.edu 0x1: Priv::retry({{ 10912646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 10922646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 10932646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 10942646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 10952646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 10963826Ssaidi@eecs.umich.edu Hpstate = Htstate; 10977790Sgblack@eecs.umich.edu NPC = Tpc; 10987790Sgblack@eecs.umich.edu NNPC = Tnpc; 10992526SN/A Tl = Tl - 1; 11005094Sgblack@eecs.umich.edu }}, checkTl=true); 11012526SN/A } 11022526SN/A } 11032469SN/A } 11042469SN/A 0x3: decode OP3 { 11052526SN/A format Load { 11063272Sgblack@eecs.umich.edu 0x00: lduw({{Rd = Mem.uw;}}); 11073272Sgblack@eecs.umich.edu 0x01: ldub({{Rd = Mem.ub;}}); 11083272Sgblack@eecs.umich.edu 0x02: lduh({{Rd = Mem.uhw;}}); 11093835Sgblack@eecs.umich.edu 0x03: ldtw({{ 11104115Ssaidi@eecs.umich.edu RdLow = (Mem.tuw).a; 11114115Ssaidi@eecs.umich.edu RdHigh = (Mem.tuw).b; 11123272Sgblack@eecs.umich.edu }}); 11132526SN/A } 11142526SN/A format Store { 11153272Sgblack@eecs.umich.edu 0x04: stw({{Mem.uw = Rd.sw;}}); 11163272Sgblack@eecs.umich.edu 0x05: stb({{Mem.ub = Rd.sb;}}); 11173272Sgblack@eecs.umich.edu 0x06: sth({{Mem.uhw = Rd.shw;}}); 11184224Sgblack@eecs.umich.edu 0x07: sttw({{ 11197741Sgblack@eecs.umich.edu // This temporary needs to be here so that the parser 11207741Sgblack@eecs.umich.edu // will correctly identify this instruction as a store. 11217741Sgblack@eecs.umich.edu // It's probably either the parenthesis or referencing 11227741Sgblack@eecs.umich.edu // the member variable that throws confuses it. 11234256Sgblack@eecs.umich.edu Twin32_t temp; 11244256Sgblack@eecs.umich.edu temp.a = RdLow<31:0>; 11254256Sgblack@eecs.umich.edu temp.b = RdHigh<31:0>; 11264256Sgblack@eecs.umich.edu Mem.tuw = temp; 11274224Sgblack@eecs.umich.edu }}); 11282526SN/A } 11292526SN/A format Load { 11303272Sgblack@eecs.umich.edu 0x08: ldsw({{Rd = (int32_t)Mem.sw;}}); 11313272Sgblack@eecs.umich.edu 0x09: ldsb({{Rd = (int8_t)Mem.sb;}}); 11323272Sgblack@eecs.umich.edu 0x0A: ldsh({{Rd = (int16_t)Mem.shw;}}); 11333272Sgblack@eecs.umich.edu 0x0B: ldx({{Rd = (int64_t)Mem.sdw;}}); 11342526SN/A } 11354040Ssaidi@eecs.umich.edu 0x0D: Swap::ldstub({{Mem.ub = 0xFF;}}, 11364040Ssaidi@eecs.umich.edu {{ 11374040Ssaidi@eecs.umich.edu uint8_t tmp = mem_data; 11384040Ssaidi@eecs.umich.edu Rd.ub = tmp; 11394040Ssaidi@eecs.umich.edu }}, MEM_SWAP); 11403272Sgblack@eecs.umich.edu 0x0E: Store::stx({{Mem.udw = Rd}}); 11414040Ssaidi@eecs.umich.edu 0x0F: Swap::swap({{Mem.uw = Rd.uw}}, 11424040Ssaidi@eecs.umich.edu {{ 11434040Ssaidi@eecs.umich.edu uint32_t tmp = mem_data; 11444040Ssaidi@eecs.umich.edu Rd.uw = tmp; 11454040Ssaidi@eecs.umich.edu }}, MEM_SWAP); 11463810Sgblack@eecs.umich.edu format LoadAlt { 11475096Sgblack@eecs.umich.edu 0x10: lduwa({{Rd = Mem.uw;}}); 11485096Sgblack@eecs.umich.edu 0x11: lduba({{Rd = Mem.ub;}}); 11495096Sgblack@eecs.umich.edu 0x12: lduha({{Rd = Mem.uhw;}}); 11503856Ssaidi@eecs.umich.edu 0x13: decode EXT_ASI { 11517741Sgblack@eecs.umich.edu // ASI_LDTD_AIUP 11523926Ssaidi@eecs.umich.edu 0x22: TwinLoad::ldtx_aiup( 11534040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11545096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11557741Sgblack@eecs.umich.edu // ASI_LDTD_AIUS 11563926Ssaidi@eecs.umich.edu 0x23: TwinLoad::ldtx_aius( 11574040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11585096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11597741Sgblack@eecs.umich.edu // ASI_QUAD_LDD 11603856Ssaidi@eecs.umich.edu 0x24: TwinLoad::ldtx_quad_ldd( 11614040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11625096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11637741Sgblack@eecs.umich.edu // ASI_LDTX_REAL 11643856Ssaidi@eecs.umich.edu 0x26: TwinLoad::ldtx_real( 11654040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11665096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11677741Sgblack@eecs.umich.edu // ASI_LDTX_N 11684040Ssaidi@eecs.umich.edu 0x27: TwinLoad::ldtx_n( 11694040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11705096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11717741Sgblack@eecs.umich.edu // ASI_LDTX_AIUP_L 11724040Ssaidi@eecs.umich.edu 0x2A: TwinLoad::ldtx_aiup_l( 11734040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11745096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11757741Sgblack@eecs.umich.edu // ASI_LDTX_AIUS_L 11764040Ssaidi@eecs.umich.edu 0x2B: TwinLoad::ldtx_aius_l( 11774040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11785096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11797741Sgblack@eecs.umich.edu // ASI_LDTX_L 11804040Ssaidi@eecs.umich.edu 0x2C: TwinLoad::ldtx_l( 11814040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11825096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11837741Sgblack@eecs.umich.edu // ASI_LDTX_REAL_L 11843856Ssaidi@eecs.umich.edu 0x2E: TwinLoad::ldtx_real_l( 11854040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11865096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11877741Sgblack@eecs.umich.edu // ASI_LDTX_N_L 11883856Ssaidi@eecs.umich.edu 0x2F: TwinLoad::ldtx_n_l( 11894040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11905096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11917741Sgblack@eecs.umich.edu // ASI_LDTX_P 11923901Ssaidi@eecs.umich.edu 0xE2: TwinLoad::ldtx_p( 11934040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11945096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11957741Sgblack@eecs.umich.edu // ASI_LDTX_S 11963926Ssaidi@eecs.umich.edu 0xE3: TwinLoad::ldtx_s( 11974040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11985096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 11997741Sgblack@eecs.umich.edu // ASI_LDTX_PL 12004040Ssaidi@eecs.umich.edu 0xEA: TwinLoad::ldtx_pl( 12014040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12025096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 12037741Sgblack@eecs.umich.edu // ASI_LDTX_SL 12044040Ssaidi@eecs.umich.edu 0xEB: TwinLoad::ldtx_sl( 12054040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12065096Sgblack@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}); 12073856Ssaidi@eecs.umich.edu default: ldtwa({{ 12084115Ssaidi@eecs.umich.edu RdLow = (Mem.tuw).a; 12095096Sgblack@eecs.umich.edu RdHigh = (Mem.tuw).b;}}); 12103856Ssaidi@eecs.umich.edu } 12112526SN/A } 12123810Sgblack@eecs.umich.edu format StoreAlt { 12135096Sgblack@eecs.umich.edu 0x14: stwa({{Mem.uw = Rd;}}); 12145096Sgblack@eecs.umich.edu 0x15: stba({{Mem.ub = Rd;}}); 12155096Sgblack@eecs.umich.edu 0x16: stha({{Mem.uhw = Rd;}}); 12164224Sgblack@eecs.umich.edu 0x17: sttwa({{ 12177741Sgblack@eecs.umich.edu // This temporary needs to be here so that the parser 12187741Sgblack@eecs.umich.edu // will correctly identify this instruction as a store. 12197741Sgblack@eecs.umich.edu // It's probably either the parenthesis or referencing 12207741Sgblack@eecs.umich.edu // the member variable that throws confuses it. 12214256Sgblack@eecs.umich.edu Twin32_t temp; 12224256Sgblack@eecs.umich.edu temp.a = RdLow<31:0>; 12234256Sgblack@eecs.umich.edu temp.b = RdHigh<31:0>; 12244256Sgblack@eecs.umich.edu Mem.tuw = temp; 12255096Sgblack@eecs.umich.edu }}); 12262526SN/A } 12273810Sgblack@eecs.umich.edu format LoadAlt { 12285096Sgblack@eecs.umich.edu 0x18: ldswa({{Rd = (int32_t)Mem.sw;}}); 12295096Sgblack@eecs.umich.edu 0x19: ldsba({{Rd = (int8_t)Mem.sb;}}); 12305096Sgblack@eecs.umich.edu 0x1A: ldsha({{Rd = (int16_t)Mem.shw;}}); 12315096Sgblack@eecs.umich.edu 0x1B: ldxa({{Rd = (int64_t)Mem.sdw;}}); 12322526SN/A } 12334040Ssaidi@eecs.umich.edu 0x1D: SwapAlt::ldstuba({{Mem.ub = 0xFF;}}, 12344040Ssaidi@eecs.umich.edu {{ 12354040Ssaidi@eecs.umich.edu uint8_t tmp = mem_data; 12364040Ssaidi@eecs.umich.edu Rd.ub = tmp; 12375096Sgblack@eecs.umich.edu }}, MEM_SWAP); 12385096Sgblack@eecs.umich.edu 0x1E: StoreAlt::stxa({{Mem.udw = Rd}}); 12394040Ssaidi@eecs.umich.edu 0x1F: SwapAlt::swapa({{Mem.uw = Rd.uw}}, 12404040Ssaidi@eecs.umich.edu {{ 12414040Ssaidi@eecs.umich.edu uint32_t tmp = mem_data; 12424040Ssaidi@eecs.umich.edu Rd.uw = tmp; 12435096Sgblack@eecs.umich.edu }}, MEM_SWAP); 12444040Ssaidi@eecs.umich.edu 12452526SN/A format Trap { 12463931Ssaidi@eecs.umich.edu 0x20: Load::ldf({{Frds.uw = Mem.uw;}}); 12474008Ssaidi@eecs.umich.edu 0x21: decode RD { 12484011Ssaidi@eecs.umich.edu 0x0: Load::ldfsr({{fault = checkFpEnableFault(xc); 12494011Ssaidi@eecs.umich.edu if (fault) 12504011Ssaidi@eecs.umich.edu return fault; 12514011Ssaidi@eecs.umich.edu Fsr = Mem.uw | Fsr<63:32>;}}); 12524011Ssaidi@eecs.umich.edu 0x1: Load::ldxfsr({{fault = checkFpEnableFault(xc); 12534011Ssaidi@eecs.umich.edu if (fault) 12544011Ssaidi@eecs.umich.edu return fault; 12554011Ssaidi@eecs.umich.edu Fsr = Mem.udw;}}); 12564008Ssaidi@eecs.umich.edu default: FailUnimpl::ldfsrOther(); 12572469SN/A } 12582526SN/A 0x22: ldqf({{fault = new FpDisabled;}}); 12593272Sgblack@eecs.umich.edu 0x23: Load::lddf({{Frd.udw = Mem.udw;}}); 12603931Ssaidi@eecs.umich.edu 0x24: Store::stf({{Mem.uw = Frds.uw;}}); 12614008Ssaidi@eecs.umich.edu 0x25: decode RD { 12625893Sgblack@eecs.umich.edu 0x0: StoreFsr::stfsr({{fault = checkFpEnableFault(xc); 12635893Sgblack@eecs.umich.edu if (fault) 12645893Sgblack@eecs.umich.edu return fault; 12655893Sgblack@eecs.umich.edu Mem.uw = Fsr<31:0>;}}); 12665893Sgblack@eecs.umich.edu 0x1: StoreFsr::stxfsr({{fault = checkFpEnableFault(xc); 12675893Sgblack@eecs.umich.edu if (fault) 12685893Sgblack@eecs.umich.edu return fault; 12695893Sgblack@eecs.umich.edu Mem.udw = Fsr;}}); 12704008Ssaidi@eecs.umich.edu default: FailUnimpl::stfsrOther(); 12712526SN/A } 12722526SN/A 0x26: stqf({{fault = new FpDisabled;}}); 12733272Sgblack@eecs.umich.edu 0x27: Store::stdf({{Mem.udw = Frd.udw;}}); 12742526SN/A 0x2D: Nop::prefetch({{ }}); 12755096Sgblack@eecs.umich.edu 0x30: LoadAlt::ldfa({{Frds.uw = Mem.uw;}}); 12762526SN/A 0x32: ldqfa({{fault = new FpDisabled;}}); 12773272Sgblack@eecs.umich.edu format LoadAlt { 12783272Sgblack@eecs.umich.edu 0x33: decode EXT_ASI { 12797741Sgblack@eecs.umich.edu // ASI_NUCLEUS 12803272Sgblack@eecs.umich.edu 0x04: FailUnimpl::lddfa_n(); 12817741Sgblack@eecs.umich.edu // ASI_NUCLEUS_LITTLE 12823272Sgblack@eecs.umich.edu 0x0C: FailUnimpl::lddfa_nl(); 12837741Sgblack@eecs.umich.edu // ASI_AS_IF_USER_PRIMARY 12843272Sgblack@eecs.umich.edu 0x10: FailUnimpl::lddfa_aiup(); 12857741Sgblack@eecs.umich.edu // ASI_AS_IF_USER_PRIMARY_LITTLE 12863272Sgblack@eecs.umich.edu 0x18: FailUnimpl::lddfa_aiupl(); 12877741Sgblack@eecs.umich.edu // ASI_AS_IF_USER_SECONDARY 12883272Sgblack@eecs.umich.edu 0x11: FailUnimpl::lddfa_aius(); 12897741Sgblack@eecs.umich.edu // ASI_AS_IF_USER_SECONDARY_LITTLE 12903272Sgblack@eecs.umich.edu 0x19: FailUnimpl::lddfa_aiusl(); 12917741Sgblack@eecs.umich.edu // ASI_REAL 12923272Sgblack@eecs.umich.edu 0x14: FailUnimpl::lddfa_real(); 12937741Sgblack@eecs.umich.edu // ASI_REAL_LITTLE 12943272Sgblack@eecs.umich.edu 0x1C: FailUnimpl::lddfa_real_l(); 12957741Sgblack@eecs.umich.edu // ASI_REAL_IO 12963272Sgblack@eecs.umich.edu 0x15: FailUnimpl::lddfa_real_io(); 12977741Sgblack@eecs.umich.edu // ASI_REAL_IO_LITTLE 12983272Sgblack@eecs.umich.edu 0x1D: FailUnimpl::lddfa_real_io_l(); 12997741Sgblack@eecs.umich.edu // ASI_PRIMARY 13003272Sgblack@eecs.umich.edu 0x80: FailUnimpl::lddfa_p(); 13017741Sgblack@eecs.umich.edu // ASI_PRIMARY_LITTLE 13023272Sgblack@eecs.umich.edu 0x88: FailUnimpl::lddfa_pl(); 13037741Sgblack@eecs.umich.edu // ASI_SECONDARY 13043272Sgblack@eecs.umich.edu 0x81: FailUnimpl::lddfa_s(); 13057741Sgblack@eecs.umich.edu // ASI_SECONDARY_LITTLE 13063272Sgblack@eecs.umich.edu 0x89: FailUnimpl::lddfa_sl(); 13077741Sgblack@eecs.umich.edu // ASI_PRIMARY_NO_FAULT 13083272Sgblack@eecs.umich.edu 0x82: FailUnimpl::lddfa_pnf(); 13097741Sgblack@eecs.umich.edu // ASI_PRIMARY_NO_FAULT_LITTLE 13103272Sgblack@eecs.umich.edu 0x8A: FailUnimpl::lddfa_pnfl(); 13117741Sgblack@eecs.umich.edu // ASI_SECONDARY_NO_FAULT 13123272Sgblack@eecs.umich.edu 0x83: FailUnimpl::lddfa_snf(); 13137741Sgblack@eecs.umich.edu // ASI_SECONDARY_NO_FAULT_LITTLE 13143272Sgblack@eecs.umich.edu 0x8B: FailUnimpl::lddfa_snfl(); 13153272Sgblack@eecs.umich.edu 13163272Sgblack@eecs.umich.edu format BlockLoad { 13173272Sgblack@eecs.umich.edu // LDBLOCKF 13187741Sgblack@eecs.umich.edu // ASI_BLOCK_AS_IF_USER_PRIMARY 13193272Sgblack@eecs.umich.edu 0x16: FailUnimpl::ldblockf_aiup(); 13207741Sgblack@eecs.umich.edu // ASI_BLOCK_AS_IF_USER_SECONDARY 13213272Sgblack@eecs.umich.edu 0x17: FailUnimpl::ldblockf_aius(); 13227741Sgblack@eecs.umich.edu // ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 13233272Sgblack@eecs.umich.edu 0x1E: FailUnimpl::ldblockf_aiupl(); 13247741Sgblack@eecs.umich.edu // ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 13253272Sgblack@eecs.umich.edu 0x1F: FailUnimpl::ldblockf_aiusl(); 13267741Sgblack@eecs.umich.edu // ASI_BLOCK_PRIMARY 13275096Sgblack@eecs.umich.edu 0xF0: ldblockf_p({{Frd_N.udw = Mem.udw;}}); 13287741Sgblack@eecs.umich.edu // ASI_BLOCK_SECONDARY 13293272Sgblack@eecs.umich.edu 0xF1: FailUnimpl::ldblockf_s(); 13307741Sgblack@eecs.umich.edu // ASI_BLOCK_PRIMARY_LITTLE 13313272Sgblack@eecs.umich.edu 0xF8: FailUnimpl::ldblockf_pl(); 13327741Sgblack@eecs.umich.edu // ASI_BLOCK_SECONDARY_LITTLE 13333272Sgblack@eecs.umich.edu 0xF9: FailUnimpl::ldblockf_sl(); 13343272Sgblack@eecs.umich.edu } 13353272Sgblack@eecs.umich.edu 13367741Sgblack@eecs.umich.edu // LDSHORTF 13377741Sgblack@eecs.umich.edu // ASI_FL8_PRIMARY 13383272Sgblack@eecs.umich.edu 0xD0: FailUnimpl::ldshortf_8p(); 13397741Sgblack@eecs.umich.edu // ASI_FL8_SECONDARY 13403272Sgblack@eecs.umich.edu 0xD1: FailUnimpl::ldshortf_8s(); 13417741Sgblack@eecs.umich.edu // ASI_FL8_PRIMARY_LITTLE 13423272Sgblack@eecs.umich.edu 0xD8: FailUnimpl::ldshortf_8pl(); 13437741Sgblack@eecs.umich.edu // ASI_FL8_SECONDARY_LITTLE 13443272Sgblack@eecs.umich.edu 0xD9: FailUnimpl::ldshortf_8sl(); 13457741Sgblack@eecs.umich.edu // ASI_FL16_PRIMARY 13463272Sgblack@eecs.umich.edu 0xD2: FailUnimpl::ldshortf_16p(); 13477741Sgblack@eecs.umich.edu // ASI_FL16_SECONDARY 13483272Sgblack@eecs.umich.edu 0xD3: FailUnimpl::ldshortf_16s(); 13497741Sgblack@eecs.umich.edu // ASI_FL16_PRIMARY_LITTLE 13503272Sgblack@eecs.umich.edu 0xDA: FailUnimpl::ldshortf_16pl(); 13517741Sgblack@eecs.umich.edu // ASI_FL16_SECONDARY_LITTLE 13523272Sgblack@eecs.umich.edu 0xDB: FailUnimpl::ldshortf_16sl(); 13537741Sgblack@eecs.umich.edu // Not an ASI which is legal with lddfa 13543378Sgblack@eecs.umich.edu default: Trap::lddfa_bad_asi( 13553378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 13563272Sgblack@eecs.umich.edu } 13573272Sgblack@eecs.umich.edu } 13583931Ssaidi@eecs.umich.edu 0x34: Store::stfa({{Mem.uw = Frds.uw;}}); 13592954Sgblack@eecs.umich.edu 0x36: stqfa({{fault = new FpDisabled;}}); 13603378Sgblack@eecs.umich.edu format StoreAlt { 13613378Sgblack@eecs.umich.edu 0x37: decode EXT_ASI { 13627741Sgblack@eecs.umich.edu // ASI_NUCLEUS 13633378Sgblack@eecs.umich.edu 0x04: FailUnimpl::stdfa_n(); 13647741Sgblack@eecs.umich.edu // ASI_NUCLEUS_LITTLE 13653378Sgblack@eecs.umich.edu 0x0C: FailUnimpl::stdfa_nl(); 13667741Sgblack@eecs.umich.edu // ASI_AS_IF_USER_PRIMARY 13673378Sgblack@eecs.umich.edu 0x10: FailUnimpl::stdfa_aiup(); 13687741Sgblack@eecs.umich.edu // ASI_AS_IF_USER_PRIMARY_LITTLE 13693378Sgblack@eecs.umich.edu 0x18: FailUnimpl::stdfa_aiupl(); 13707741Sgblack@eecs.umich.edu // ASI_AS_IF_USER_SECONDARY 13713378Sgblack@eecs.umich.edu 0x11: FailUnimpl::stdfa_aius(); 13727741Sgblack@eecs.umich.edu // ASI_AS_IF_USER_SECONDARY_LITTLE 13733378Sgblack@eecs.umich.edu 0x19: FailUnimpl::stdfa_aiusl(); 13747741Sgblack@eecs.umich.edu // ASI_REAL 13753378Sgblack@eecs.umich.edu 0x14: FailUnimpl::stdfa_real(); 13767741Sgblack@eecs.umich.edu // ASI_REAL_LITTLE 13773378Sgblack@eecs.umich.edu 0x1C: FailUnimpl::stdfa_real_l(); 13787741Sgblack@eecs.umich.edu // ASI_REAL_IO 13793378Sgblack@eecs.umich.edu 0x15: FailUnimpl::stdfa_real_io(); 13807741Sgblack@eecs.umich.edu // ASI_REAL_IO_LITTLE 13813378Sgblack@eecs.umich.edu 0x1D: FailUnimpl::stdfa_real_io_l(); 13827741Sgblack@eecs.umich.edu // ASI_PRIMARY 13833378Sgblack@eecs.umich.edu 0x80: FailUnimpl::stdfa_p(); 13847741Sgblack@eecs.umich.edu // ASI_PRIMARY_LITTLE 13853378Sgblack@eecs.umich.edu 0x88: FailUnimpl::stdfa_pl(); 13867741Sgblack@eecs.umich.edu // ASI_SECONDARY 13873378Sgblack@eecs.umich.edu 0x81: FailUnimpl::stdfa_s(); 13887741Sgblack@eecs.umich.edu // ASI_SECONDARY_LITTLE 13893378Sgblack@eecs.umich.edu 0x89: FailUnimpl::stdfa_sl(); 13907741Sgblack@eecs.umich.edu // ASI_PRIMARY_NO_FAULT 13913378Sgblack@eecs.umich.edu 0x82: FailUnimpl::stdfa_pnf(); 13927741Sgblack@eecs.umich.edu // ASI_PRIMARY_NO_FAULT_LITTLE 13933378Sgblack@eecs.umich.edu 0x8A: FailUnimpl::stdfa_pnfl(); 13947741Sgblack@eecs.umich.edu // ASI_SECONDARY_NO_FAULT 13953378Sgblack@eecs.umich.edu 0x83: FailUnimpl::stdfa_snf(); 13967741Sgblack@eecs.umich.edu // ASI_SECONDARY_NO_FAULT_LITTLE 13973378Sgblack@eecs.umich.edu 0x8B: FailUnimpl::stdfa_snfl(); 13983378Sgblack@eecs.umich.edu 13993378Sgblack@eecs.umich.edu format BlockStore { 14003378Sgblack@eecs.umich.edu // STBLOCKF 14017741Sgblack@eecs.umich.edu // ASI_BLOCK_AS_IF_USER_PRIMARY 14023378Sgblack@eecs.umich.edu 0x16: FailUnimpl::stblockf_aiup(); 14037741Sgblack@eecs.umich.edu // ASI_BLOCK_AS_IF_USER_SECONDARY 14043378Sgblack@eecs.umich.edu 0x17: FailUnimpl::stblockf_aius(); 14057741Sgblack@eecs.umich.edu // ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 14063378Sgblack@eecs.umich.edu 0x1E: FailUnimpl::stblockf_aiupl(); 14077741Sgblack@eecs.umich.edu // ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 14083378Sgblack@eecs.umich.edu 0x1F: FailUnimpl::stblockf_aiusl(); 14097741Sgblack@eecs.umich.edu // ASI_BLOCK_PRIMARY 14105096Sgblack@eecs.umich.edu 0xF0: stblockf_p({{Mem.udw = Frd_N.udw;}}); 14117741Sgblack@eecs.umich.edu // ASI_BLOCK_SECONDARY 14123378Sgblack@eecs.umich.edu 0xF1: FailUnimpl::stblockf_s(); 14137741Sgblack@eecs.umich.edu // ASI_BLOCK_PRIMARY_LITTLE 14143378Sgblack@eecs.umich.edu 0xF8: FailUnimpl::stblockf_pl(); 14157741Sgblack@eecs.umich.edu // ASI_BLOCK_SECONDARY_LITTLE 14163378Sgblack@eecs.umich.edu 0xF9: FailUnimpl::stblockf_sl(); 14173378Sgblack@eecs.umich.edu } 14183378Sgblack@eecs.umich.edu 14197741Sgblack@eecs.umich.edu // STSHORTF 14207741Sgblack@eecs.umich.edu // ASI_FL8_PRIMARY 14213378Sgblack@eecs.umich.edu 0xD0: FailUnimpl::stshortf_8p(); 14227741Sgblack@eecs.umich.edu // ASI_FL8_SECONDARY 14233378Sgblack@eecs.umich.edu 0xD1: FailUnimpl::stshortf_8s(); 14247741Sgblack@eecs.umich.edu // ASI_FL8_PRIMARY_LITTLE 14253378Sgblack@eecs.umich.edu 0xD8: FailUnimpl::stshortf_8pl(); 14267741Sgblack@eecs.umich.edu // ASI_FL8_SECONDARY_LITTLE 14273378Sgblack@eecs.umich.edu 0xD9: FailUnimpl::stshortf_8sl(); 14287741Sgblack@eecs.umich.edu // ASI_FL16_PRIMARY 14293378Sgblack@eecs.umich.edu 0xD2: FailUnimpl::stshortf_16p(); 14307741Sgblack@eecs.umich.edu // ASI_FL16_SECONDARY 14313378Sgblack@eecs.umich.edu 0xD3: FailUnimpl::stshortf_16s(); 14327741Sgblack@eecs.umich.edu // ASI_FL16_PRIMARY_LITTLE 14333378Sgblack@eecs.umich.edu 0xDA: FailUnimpl::stshortf_16pl(); 14347741Sgblack@eecs.umich.edu // ASI_FL16_SECONDARY_LITTLE 14353378Sgblack@eecs.umich.edu 0xDB: FailUnimpl::stshortf_16sl(); 14367741Sgblack@eecs.umich.edu // Not an ASI which is legal with lddfa 14373378Sgblack@eecs.umich.edu default: Trap::stdfa_bad_asi( 14383378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 14393378Sgblack@eecs.umich.edu } 14403378Sgblack@eecs.umich.edu } 14414040Ssaidi@eecs.umich.edu 0x3C: CasAlt::casa({{ 14424040Ssaidi@eecs.umich.edu mem_data = htog(Rs2.uw); 14434040Ssaidi@eecs.umich.edu Mem.uw = Rd.uw;}}, 14444040Ssaidi@eecs.umich.edu {{ 14454040Ssaidi@eecs.umich.edu uint32_t tmp = mem_data; 14464040Ssaidi@eecs.umich.edu Rd.uw = tmp; 14475096Sgblack@eecs.umich.edu }}, MEM_SWAP_COND); 14482526SN/A 0x3D: Nop::prefetcha({{ }}); 14494040Ssaidi@eecs.umich.edu 0x3E: CasAlt::casxa({{mem_data = gtoh(Rs2); 14504040Ssaidi@eecs.umich.edu Mem.udw = Rd.udw; }}, 14515096Sgblack@eecs.umich.edu {{ Rd.udw = mem_data; }}, MEM_SWAP_COND); 14522526SN/A } 14532469SN/A } 14542022SN/A} 1455