decoder.isa revision 4235
13900Ssaidi@eecs.umich.edu// Copyright (c) 2006-2007 The Regents of The University of Michigan 22632Sstever@eecs.umich.edu// All rights reserved. 32632Sstever@eecs.umich.edu// 42632Sstever@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 52632Sstever@eecs.umich.edu// modification, are permitted provided that the following conditions are 62632Sstever@eecs.umich.edu// met: redistributions of source code must retain the above copyright 72632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 82632Sstever@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 92632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 102632Sstever@eecs.umich.edu// documentation and/or other materials provided with the distribution; 112632Sstever@eecs.umich.edu// neither the name of the copyright holders nor the names of its 122632Sstever@eecs.umich.edu// contributors may be used to endorse or promote products derived from 132632Sstever@eecs.umich.edu// this software without specific prior written permission. 142632Sstever@eecs.umich.edu// 152632Sstever@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 162632Sstever@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 172632Sstever@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 182632Sstever@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 192632Sstever@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 202632Sstever@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 212632Sstever@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 222632Sstever@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 232632Sstever@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 242632Sstever@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 252632Sstever@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 262632Sstever@eecs.umich.edu// 272632Sstever@eecs.umich.edu// Authors: Ali Saidi 282632Sstever@eecs.umich.edu// Gabe Black 292632Sstever@eecs.umich.edu// Steve Reinhardt 302632Sstever@eecs.umich.edu 312022SN/A//////////////////////////////////////////////////////////////////// 322022SN/A// 332022SN/A// The actual decoder specification 342022SN/A// 352022SN/A 362469SN/Adecode OP default Unknown::unknown() 372469SN/A{ 382469SN/A 0x0: decode OP2 392469SN/A { 402516SN/A //Throw an illegal instruction acception 412516SN/A 0x0: Trap::illtrap({{fault = new IllegalInstruction;}}); 422944Sgblack@eecs.umich.edu format BranchN 432482SN/A { 443598Sgblack@eecs.umich.edu //bpcc 453056Sgblack@eecs.umich.edu 0x1: decode COND2 462469SN/A { 473056Sgblack@eecs.umich.edu //Branch Always 483056Sgblack@eecs.umich.edu 0x8: decode A 493056Sgblack@eecs.umich.edu { 503598Sgblack@eecs.umich.edu 0x0: bpa(19, {{ 512516SN/A NNPC = xc->readPC() + disp; 523056Sgblack@eecs.umich.edu }}); 533598Sgblack@eecs.umich.edu 0x1: bpa(19, {{ 543056Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 553056Sgblack@eecs.umich.edu NNPC = NPC + 4; 563056Sgblack@eecs.umich.edu }}, ',a'); 573056Sgblack@eecs.umich.edu } 583056Sgblack@eecs.umich.edu //Branch Never 593056Sgblack@eecs.umich.edu 0x0: decode A 603056Sgblack@eecs.umich.edu { 613598Sgblack@eecs.umich.edu 0x0: bpn(19, {{ 623056Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 633056Sgblack@eecs.umich.edu }}); 643598Sgblack@eecs.umich.edu 0x1: bpn(19, {{ 654004Sgblack@eecs.umich.edu NNPC = NPC + 8; 664004Sgblack@eecs.umich.edu NPC = NPC + 4; 673056Sgblack@eecs.umich.edu }}, ',a'); 683056Sgblack@eecs.umich.edu } 693056Sgblack@eecs.umich.edu default: decode BPCC 703056Sgblack@eecs.umich.edu { 713056Sgblack@eecs.umich.edu 0x0: bpcci(19, {{ 723056Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 733056Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 743056Sgblack@eecs.umich.edu else 753056Sgblack@eecs.umich.edu handle_annul 763056Sgblack@eecs.umich.edu }}); 773056Sgblack@eecs.umich.edu 0x2: bpccx(19, {{ 783056Sgblack@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND2)) 793056Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 803056Sgblack@eecs.umich.edu else 813056Sgblack@eecs.umich.edu handle_annul 823056Sgblack@eecs.umich.edu }}); 833056Sgblack@eecs.umich.edu } 842482SN/A } 853598Sgblack@eecs.umich.edu //bicc 863598Sgblack@eecs.umich.edu 0x2: decode COND2 873598Sgblack@eecs.umich.edu { 883598Sgblack@eecs.umich.edu //Branch Always 893598Sgblack@eecs.umich.edu 0x8: decode A 903598Sgblack@eecs.umich.edu { 913598Sgblack@eecs.umich.edu 0x0: ba(22, {{ 923598Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 933598Sgblack@eecs.umich.edu }}); 943598Sgblack@eecs.umich.edu 0x1: ba(22, {{ 953598Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 963598Sgblack@eecs.umich.edu NNPC = NPC + 4; 973598Sgblack@eecs.umich.edu }}, ',a'); 983598Sgblack@eecs.umich.edu } 993598Sgblack@eecs.umich.edu //Branch Never 1003598Sgblack@eecs.umich.edu 0x0: decode A 1013598Sgblack@eecs.umich.edu { 1023598Sgblack@eecs.umich.edu 0x0: bn(22, {{ 1033598Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 1043598Sgblack@eecs.umich.edu }}); 1053598Sgblack@eecs.umich.edu 0x1: bn(22, {{ 1064004Sgblack@eecs.umich.edu NNPC = NPC + 8; 1074004Sgblack@eecs.umich.edu NPC = NPC + 4; 1083598Sgblack@eecs.umich.edu }}, ',a'); 1093598Sgblack@eecs.umich.edu } 1103598Sgblack@eecs.umich.edu default: bicc(22, {{ 1113598Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 1123598Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 1133598Sgblack@eecs.umich.edu else 1143598Sgblack@eecs.umich.edu handle_annul 1153598Sgblack@eecs.umich.edu }}); 1163598Sgblack@eecs.umich.edu } 1172516SN/A } 1182516SN/A 0x3: decode RCOND2 1192516SN/A { 1202516SN/A format BranchSplit 1212482SN/A { 1222482SN/A 0x1: bpreq({{ 1232591SN/A if(Rs1.sdw == 0) 1242516SN/A NNPC = xc->readPC() + disp; 1252580SN/A else 1262580SN/A handle_annul 1272482SN/A }}); 1282482SN/A 0x2: bprle({{ 1292591SN/A if(Rs1.sdw <= 0) 1302516SN/A NNPC = xc->readPC() + disp; 1312580SN/A else 1322580SN/A handle_annul 1332482SN/A }}); 1342482SN/A 0x3: bprl({{ 1352591SN/A if(Rs1.sdw < 0) 1362516SN/A NNPC = xc->readPC() + disp; 1372580SN/A else 1382580SN/A handle_annul 1392482SN/A }}); 1402482SN/A 0x5: bprne({{ 1412591SN/A if(Rs1.sdw != 0) 1422516SN/A NNPC = xc->readPC() + disp; 1432580SN/A else 1442580SN/A handle_annul 1452482SN/A }}); 1462482SN/A 0x6: bprg({{ 1472591SN/A if(Rs1.sdw > 0) 1482516SN/A NNPC = xc->readPC() + disp; 1492580SN/A else 1502580SN/A handle_annul 1512482SN/A }}); 1522482SN/A 0x7: bprge({{ 1532591SN/A if(Rs1.sdw >= 0) 1542516SN/A NNPC = xc->readPC() + disp; 1552580SN/A else 1562580SN/A handle_annul 1572482SN/A }}); 1582469SN/A } 1592482SN/A } 1602516SN/A //SETHI (or NOP if rd == 0 and imm == 0) 1613042Sgblack@eecs.umich.edu 0x4: SetHi::sethi({{Rd.udw = imm;}}); 1624004Sgblack@eecs.umich.edu //fbpfcc 1634004Sgblack@eecs.umich.edu 0x5: decode COND2 { 1644004Sgblack@eecs.umich.edu format BranchN { 1654004Sgblack@eecs.umich.edu //Branch Always 1664004Sgblack@eecs.umich.edu 0x8: decode A 1674004Sgblack@eecs.umich.edu { 1684004Sgblack@eecs.umich.edu 0x0: fbpa(22, {{ 1694004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 1704004Sgblack@eecs.umich.edu }}); 1714004Sgblack@eecs.umich.edu 0x1: fbpa(22, {{ 1724004Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 1734004Sgblack@eecs.umich.edu NNPC = NPC + 4; 1744004Sgblack@eecs.umich.edu }}, ',a'); 1754004Sgblack@eecs.umich.edu } 1764004Sgblack@eecs.umich.edu //Branch Never 1774004Sgblack@eecs.umich.edu 0x0: decode A 1784004Sgblack@eecs.umich.edu { 1794004Sgblack@eecs.umich.edu 0x0: fbpn(22, {{ 1804004Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 1814004Sgblack@eecs.umich.edu }}); 1824004Sgblack@eecs.umich.edu 0x1: fbpn(22, {{ 1834004Sgblack@eecs.umich.edu NNPC = NPC + 8; 1844004Sgblack@eecs.umich.edu NPC = NPC + 4; 1854004Sgblack@eecs.umich.edu }}, ',a'); 1864004Sgblack@eecs.umich.edu } 1874004Sgblack@eecs.umich.edu default: decode BPCC { 1884235Sgblack@eecs.umich.edu 0x0: fbpfcc0(19, {{ 1894004Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<11:10>, COND2)) 1904004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 1914004Sgblack@eecs.umich.edu else 1924004Sgblack@eecs.umich.edu handle_annul 1934004Sgblack@eecs.umich.edu }}); 1944235Sgblack@eecs.umich.edu 0x1: fbpfcc1(19, {{ 1954004Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<33:32>, COND2)) 1964004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 1974004Sgblack@eecs.umich.edu else 1984004Sgblack@eecs.umich.edu handle_annul 1994004Sgblack@eecs.umich.edu }}); 2004235Sgblack@eecs.umich.edu 0x2: fbpfcc2(19, {{ 2014004Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<35:34>, COND2)) 2024004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 2034004Sgblack@eecs.umich.edu else 2044004Sgblack@eecs.umich.edu handle_annul 2054004Sgblack@eecs.umich.edu }}); 2064235Sgblack@eecs.umich.edu 0x3: fbpfcc3(19, {{ 2074004Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<37:36>, COND2)) 2084004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 2094004Sgblack@eecs.umich.edu else 2104004Sgblack@eecs.umich.edu handle_annul 2114004Sgblack@eecs.umich.edu }}); 2124004Sgblack@eecs.umich.edu } 2134004Sgblack@eecs.umich.edu } 2144004Sgblack@eecs.umich.edu } 2154004Sgblack@eecs.umich.edu //fbfcc 2164004Sgblack@eecs.umich.edu 0x6: decode COND2 { 2174004Sgblack@eecs.umich.edu format BranchN { 2184004Sgblack@eecs.umich.edu //Branch Always 2194004Sgblack@eecs.umich.edu 0x8: decode A 2204004Sgblack@eecs.umich.edu { 2214004Sgblack@eecs.umich.edu 0x0: fba(22, {{ 2224004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 2234004Sgblack@eecs.umich.edu }}); 2244004Sgblack@eecs.umich.edu 0x1: fba(22, {{ 2254004Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 2264004Sgblack@eecs.umich.edu NNPC = NPC + 4; 2274004Sgblack@eecs.umich.edu }}, ',a'); 2284004Sgblack@eecs.umich.edu } 2294004Sgblack@eecs.umich.edu //Branch Never 2304004Sgblack@eecs.umich.edu 0x0: decode A 2314004Sgblack@eecs.umich.edu { 2324004Sgblack@eecs.umich.edu 0x0: fbn(22, {{ 2334004Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 2344004Sgblack@eecs.umich.edu }}); 2354004Sgblack@eecs.umich.edu 0x1: fbn(22, {{ 2364004Sgblack@eecs.umich.edu NNPC = NPC + 8; 2374004Sgblack@eecs.umich.edu NPC = NPC + 4; 2384004Sgblack@eecs.umich.edu }}, ',a'); 2394004Sgblack@eecs.umich.edu } 2404004Sgblack@eecs.umich.edu default: fbfcc(22, {{ 2414004Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<11:10>, COND2)) 2424004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 2434004Sgblack@eecs.umich.edu else 2444004Sgblack@eecs.umich.edu handle_annul 2454004Sgblack@eecs.umich.edu }}); 2464004Sgblack@eecs.umich.edu } 2474004Sgblack@eecs.umich.edu } 2482469SN/A } 2492944Sgblack@eecs.umich.edu 0x1: BranchN::call(30, {{ 2503928Ssaidi@eecs.umich.edu if (Pstate<3:>) 2513928Ssaidi@eecs.umich.edu R15 = (xc->readPC())<31:0>; 2523928Ssaidi@eecs.umich.edu else 2533928Ssaidi@eecs.umich.edu R15 = xc->readPC(); 2542516SN/A NNPC = R15 + disp; 2552469SN/A }}); 2562469SN/A 0x2: decode OP3 { 2572482SN/A format IntOp { 2582482SN/A 0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}}); 2592974Sgblack@eecs.umich.edu 0x01: and({{Rd = Rs1.sdw & Rs2_or_imm13;}}); 2602974Sgblack@eecs.umich.edu 0x02: or({{Rd = Rs1.sdw | Rs2_or_imm13;}}); 2612974Sgblack@eecs.umich.edu 0x03: xor({{Rd = Rs1.sdw ^ Rs2_or_imm13;}}); 2622526SN/A 0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}}); 2632974Sgblack@eecs.umich.edu 0x05: andn({{Rd = Rs1.sdw & ~Rs2_or_imm13;}}); 2642974Sgblack@eecs.umich.edu 0x06: orn({{Rd = Rs1.sdw | ~Rs2_or_imm13;}}); 2652974Sgblack@eecs.umich.edu 0x07: xnor({{Rd = ~(Rs1.sdw ^ Rs2_or_imm13);}}); 2662646Ssaidi@eecs.umich.edu 0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + Ccr<0:0>;}}); 2672974Sgblack@eecs.umich.edu 0x09: mulx({{Rd = Rs1.sdw * Rs2_or_imm13;}}); 2682469SN/A 0x0A: umul({{ 2692516SN/A Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>; 2702646Ssaidi@eecs.umich.edu Y = Rd<63:32>; 2712482SN/A }}); 2722469SN/A 0x0B: smul({{ 2733931Ssaidi@eecs.umich.edu Rd.sdw = sext<32>(Rs1.sdw<31:0>) * sext<32>(Rs2_or_imm13<31:0>); 2743900Ssaidi@eecs.umich.edu Y = Rd.sdw<63:32>; 2752482SN/A }}); 2762954Sgblack@eecs.umich.edu 0x0C: subc({{Rd.sdw = Rs1.sdw + (~Rs2_or_imm13) + 1 - Ccr<0:0>}}); 2772469SN/A 0x0D: udivx({{ 2782516SN/A if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 2792516SN/A else Rd.udw = Rs1.udw / Rs2_or_imm13; 2802482SN/A }}); 2812469SN/A 0x0E: udiv({{ 2822516SN/A if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 2832482SN/A else 2842482SN/A { 2852646Ssaidi@eecs.umich.edu Rd.udw = ((Y << 32) | Rs1.udw<31:0>) / Rs2_or_imm13; 2862482SN/A if(Rd.udw >> 32 != 0) 2872482SN/A Rd.udw = 0xFFFFFFFF; 2882482SN/A } 2892482SN/A }}); 2902482SN/A 0x0F: sdiv({{ 2912615SN/A if(Rs2_or_imm13.sdw == 0) 2922469SN/A fault = new DivisionByZero; 2932469SN/A else 2942482SN/A { 2952646Ssaidi@eecs.umich.edu Rd.udw = ((int64_t)((Y << 32) | Rs1.sdw<31:0>)) / Rs2_or_imm13.sdw; 2963929Ssaidi@eecs.umich.edu if((int64_t)Rd.udw >= std::numeric_limits<int32_t>::max()) 2972482SN/A Rd.udw = 0x7FFFFFFF; 2983929Ssaidi@eecs.umich.edu else if((int64_t)Rd.udw <= std::numeric_limits<int32_t>::min()) 2993929Ssaidi@eecs.umich.edu Rd.udw = ULL(0xFFFFFFFF80000000); 3002482SN/A } 3012526SN/A }}); 3022469SN/A } 3032482SN/A format IntOpCc { 3042469SN/A 0x10: addcc({{ 3052516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3062469SN/A Rd = resTemp = Rs1 + val2;}}, 3072580SN/A {{(Rs1<31:0> + val2<31:0>)<32:>}}, 3082469SN/A {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 3092580SN/A {{(Rs1<63:1> + val2<63:1> + (Rs1 & val2)<0:>)<63:>}}, 3102469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3112526SN/A ); 3122482SN/A 0x11: IntOpCcRes::andcc({{Rd = Rs1 & Rs2_or_imm13;}}); 3132482SN/A 0x12: IntOpCcRes::orcc({{Rd = Rs1 | Rs2_or_imm13;}}); 3142482SN/A 0x13: IntOpCcRes::xorcc({{Rd = Rs1 ^ Rs2_or_imm13;}}); 3152469SN/A 0x14: subcc({{ 3162580SN/A int64_t val2 = Rs2_or_imm13; 3172580SN/A Rd = Rs1 - val2;}}, 3182580SN/A {{(~(Rs1<31:0> + (~val2)<31:0> + 1))<32:>}}, 3192580SN/A {{(Rs1<31:> != val2<31:>) && (Rs1<31:> != Rd<31:>)}}, 3202580SN/A {{(~(Rs1<63:1> + (~val2)<63:1> + 3212580SN/A (Rs1 | ~val2)<0:>))<63:>}}, 3222580SN/A {{Rs1<63:> != val2<63:> && Rs1<63:> != Rd<63:>}} 3232526SN/A ); 3242482SN/A 0x15: IntOpCcRes::andncc({{Rd = Rs1 & ~Rs2_or_imm13;}}); 3252482SN/A 0x16: IntOpCcRes::orncc({{Rd = Rs1 | ~Rs2_or_imm13;}}); 3262482SN/A 0x17: IntOpCcRes::xnorcc({{Rd = ~(Rs1 ^ Rs2_or_imm13);}}); 3272469SN/A 0x18: addccc({{ 3282516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3292646Ssaidi@eecs.umich.edu int64_t carryin = Ccr<0:0>; 3302469SN/A Rd = resTemp = Rs1 + val2 + carryin;}}, 3312580SN/A {{(Rs1<31:0> + val2<31:0> + carryin)<32:>}}, 3322469SN/A {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 3333931Ssaidi@eecs.umich.edu {{((Rs1 & val2) | (~resTemp & (Rs1 | val2)))<63:>}}, 3342469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3352526SN/A ); 3363765Sgblack@eecs.umich.edu 0x1A: IntOpCcRes::umulcc({{ 3372615SN/A uint64_t resTemp; 3382615SN/A Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>; 3393765Sgblack@eecs.umich.edu Y = resTemp<63:32>;}}); 3403765Sgblack@eecs.umich.edu 0x1B: IntOpCcRes::smulcc({{ 3412615SN/A int64_t resTemp; 3423931Ssaidi@eecs.umich.edu Rd = resTemp = sext<32>(Rs1.sdw<31:0>) * sext<32>(Rs2_or_imm13<31:0>); 3433765Sgblack@eecs.umich.edu Y = resTemp<63:32>;}}); 3442469SN/A 0x1C: subccc({{ 3452516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3462646Ssaidi@eecs.umich.edu int64_t carryin = Ccr<0:0>; 3472954Sgblack@eecs.umich.edu Rd = resTemp = Rs1 + ~val2 + 1 - carryin;}}, 3483931Ssaidi@eecs.umich.edu {{((~Rs1 & val2) | (resTemp & (~Rs1 | val2)))<31:>}}, 3492469SN/A {{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}}, 3503931Ssaidi@eecs.umich.edu {{((~Rs1 & val2) | (resTemp & (~Rs1 | val2)))<63:>}}, 3512469SN/A {{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}} 3522526SN/A ); 3533765Sgblack@eecs.umich.edu 0x1D: IntOpCcRes::udivxcc({{ 3542615SN/A if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero; 3553765Sgblack@eecs.umich.edu else Rd = Rs1.udw / Rs2_or_imm13.udw;}}); 3562469SN/A 0x1E: udivcc({{ 3572615SN/A uint32_t resTemp, val2 = Rs2_or_imm13.udw; 3582989Ssaidi@eecs.umich.edu int32_t overflow = 0; 3592469SN/A if(val2 == 0) fault = new DivisionByZero; 3602469SN/A else 3612224SN/A { 3622646Ssaidi@eecs.umich.edu resTemp = (uint64_t)((Y << 32) | Rs1.udw<31:0>) / val2; 3632516SN/A overflow = (resTemp<63:32> != 0); 3642516SN/A if(overflow) Rd = resTemp = 0xFFFFFFFF; 3652516SN/A else Rd = resTemp; 3662469SN/A } }}, 3672469SN/A {{0}}, 3682469SN/A {{overflow}}, 3692469SN/A {{0}}, 3702469SN/A {{0}} 3712526SN/A ); 3722469SN/A 0x1F: sdivcc({{ 3732996Sgblack@eecs.umich.edu int64_t val2 = Rs2_or_imm13.sdw<31:0>; 3742996Sgblack@eecs.umich.edu bool overflow = false, underflow = false; 3752469SN/A if(val2 == 0) fault = new DivisionByZero; 3762469SN/A else 3772469SN/A { 3782996Sgblack@eecs.umich.edu Rd = (int64_t)((Y << 32) | Rs1.sdw<31:0>) / val2; 3793929Ssaidi@eecs.umich.edu overflow = ((int64_t)Rd >= std::numeric_limits<int32_t>::max()); 3803929Ssaidi@eecs.umich.edu underflow = ((int64_t)Rd <= std::numeric_limits<int32_t>::min()); 3812996Sgblack@eecs.umich.edu if(overflow) Rd = 0x7FFFFFFF; 3823929Ssaidi@eecs.umich.edu else if(underflow) Rd = ULL(0xFFFFFFFF80000000); 3832469SN/A } }}, 3842469SN/A {{0}}, 3852469SN/A {{overflow || underflow}}, 3862469SN/A {{0}}, 3872469SN/A {{0}} 3882526SN/A ); 3892469SN/A 0x20: taddcc({{ 3902516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3912469SN/A Rd = resTemp = Rs1 + val2; 3922469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}}, 3933753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 3942469SN/A {{overflow}}, 3952469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3962469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3972526SN/A ); 3982469SN/A 0x21: tsubcc({{ 3992516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 4002469SN/A Rd = resTemp = Rs1 + val2; 4012469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}}, 4023753Sgblack@eecs.umich.edu {{(Rs1<31:0> + val2<31:0>)<32:0>}}, 4032469SN/A {{overflow}}, 4042469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 4052469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 4062526SN/A ); 4072469SN/A 0x22: taddcctv({{ 4082996Sgblack@eecs.umich.edu int64_t val2 = Rs2_or_imm13; 4092996Sgblack@eecs.umich.edu Rd = Rs1 + val2; 4102954Sgblack@eecs.umich.edu int32_t overflow = Rs1<1:0> || val2<1:0> || 4112954Sgblack@eecs.umich.edu (Rs1<31:> == val2<31:> && val2<31:> != Rd<31:>); 4122469SN/A if(overflow) fault = new TagOverflow;}}, 4133753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 4142469SN/A {{overflow}}, 4152469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 4162996Sgblack@eecs.umich.edu {{Rs1<63:> == val2<63:> && val2<63:> != Rd<63:>}} 4172526SN/A ); 4182469SN/A 0x23: tsubcctv({{ 4192516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 4202469SN/A Rd = resTemp = Rs1 + val2; 4212469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>); 4222469SN/A if(overflow) fault = new TagOverflow;}}, 4233753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 4242469SN/A {{overflow}}, 4252469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 4262469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 4272526SN/A ); 4282469SN/A 0x24: mulscc({{ 4292516SN/A int64_t resTemp, multiplicand = Rs2_or_imm13; 4302469SN/A int32_t multiplier = Rs1<31:0>; 4312469SN/A int32_t savedLSB = Rs1<0:>; 4322516SN/A multiplier = multiplier<31:1> | 4333753Sgblack@eecs.umich.edu ((Ccr<3:3> ^ Ccr<1:1>) << 32); 4342646Ssaidi@eecs.umich.edu if(!Y<0:>) 4352469SN/A multiplicand = 0; 4362469SN/A Rd = resTemp = multiplicand + multiplier; 4372646Ssaidi@eecs.umich.edu Y = Y<31:1> | (savedLSB << 31);}}, 4383753Sgblack@eecs.umich.edu {{((multiplicand<31:0> + multiplier<31:0>)<32:0>)}}, 4392469SN/A {{multiplicand<31:> == multiplier<31:> && multiplier<31:> != resTemp<31:>}}, 4402469SN/A {{((multiplicand >> 1) + (multiplier >> 1) + (multiplicand & multiplier & 0x1))<63:>}}, 4412469SN/A {{multiplicand<63:> == multiplier<63:> && multiplier<63:> != resTemp<63:>}} 4422526SN/A ); 4432526SN/A } 4442526SN/A format IntOp 4452526SN/A { 4462526SN/A 0x25: decode X { 4472526SN/A 0x0: sll({{Rd = Rs1 << (I ? SHCNT32 : Rs2<4:0>);}}); 4482526SN/A 0x1: sllx({{Rd = Rs1 << (I ? SHCNT64 : Rs2<5:0>);}}); 4492469SN/A } 4502526SN/A 0x26: decode X { 4512526SN/A 0x0: srl({{Rd = Rs1.uw >> (I ? SHCNT32 : Rs2<4:0>);}}); 4522526SN/A 0x1: srlx({{Rd = Rs1.udw >> (I ? SHCNT64 : Rs2<5:0>);}}); 4532526SN/A } 4542526SN/A 0x27: decode X { 4552526SN/A 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}}); 4562526SN/A 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}}); 4572526SN/A } 4582954Sgblack@eecs.umich.edu 0x28: decode RS1 { 4593929Ssaidi@eecs.umich.edu 0x00: NoPriv::rdy({{Rd = Y<31:0>;}}); 4603587Sgblack@eecs.umich.edu //1 should cause an illegal instruction exception 4613587Sgblack@eecs.umich.edu 0x02: NoPriv::rdccr({{Rd = Ccr;}}); 4623587Sgblack@eecs.umich.edu 0x03: NoPriv::rdasi({{Rd = Asi;}}); 4633823Ssaidi@eecs.umich.edu 0x04: PrivCheck::rdtick({{Rd = Tick;}}, {{Tick<63:>}}); 4643587Sgblack@eecs.umich.edu 0x05: NoPriv::rdpc({{ 4653587Sgblack@eecs.umich.edu if(Pstate<3:>) 4663587Sgblack@eecs.umich.edu Rd = (xc->readPC())<31:0>; 4673587Sgblack@eecs.umich.edu else 4683587Sgblack@eecs.umich.edu Rd = xc->readPC();}}); 4693587Sgblack@eecs.umich.edu 0x06: NoPriv::rdfprs({{ 4703587Sgblack@eecs.umich.edu //Wait for all fpops to finish. 4713587Sgblack@eecs.umich.edu Rd = Fprs; 4723587Sgblack@eecs.umich.edu }}); 4733587Sgblack@eecs.umich.edu //7-14 should cause an illegal instruction exception 4743587Sgblack@eecs.umich.edu 0x0F: decode I { 4754040Ssaidi@eecs.umich.edu 0x0: Nop::stbar({{/*stuff*/}}, IsWriteBarrier, MemWriteOp); 4764040Ssaidi@eecs.umich.edu 0x1: Nop::membar({{/*stuff*/}}, IsMemBarrier, MemReadOp); 4772954Sgblack@eecs.umich.edu } 4783587Sgblack@eecs.umich.edu 0x10: Priv::rdpcr({{Rd = Pcr;}}); 4793587Sgblack@eecs.umich.edu 0x11: PrivCheck::rdpic({{Rd = Pic;}}, {{Pcr<0:>}}); 4803587Sgblack@eecs.umich.edu //0x12 should cause an illegal instruction exception 4813587Sgblack@eecs.umich.edu 0x13: NoPriv::rdgsr({{ 4824010Ssaidi@eecs.umich.edu fault = checkFpEnableFault(xc); 4834010Ssaidi@eecs.umich.edu if (fault) 4844010Ssaidi@eecs.umich.edu return fault; 4854010Ssaidi@eecs.umich.edu Rd = Gsr; 4862954Sgblack@eecs.umich.edu }}); 4873587Sgblack@eecs.umich.edu //0x14-0x15 should cause an illegal instruction exception 4883587Sgblack@eecs.umich.edu 0x16: Priv::rdsoftint({{Rd = Softint;}}); 4893823Ssaidi@eecs.umich.edu 0x17: Priv::rdtick_cmpr({{Rd = TickCmpr;}}); 4903823Ssaidi@eecs.umich.edu 0x18: PrivCheck::rdstick({{Rd = Stick}}, {{Stick<63:>}}); 4913823Ssaidi@eecs.umich.edu 0x19: Priv::rdstick_cmpr({{Rd = StickCmpr;}}); 4923598Sgblack@eecs.umich.edu 0x1A: Priv::rdstrand_sts_reg({{ 4933598Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 4943598Sgblack@eecs.umich.edu Rd = StrandStsReg<0:>; 4953598Sgblack@eecs.umich.edu else 4963598Sgblack@eecs.umich.edu Rd = StrandStsReg; 4973598Sgblack@eecs.umich.edu }}); 4983598Sgblack@eecs.umich.edu //0x1A is supposed to be reserved, but it reads the strand 4993598Sgblack@eecs.umich.edu //status register. 5003598Sgblack@eecs.umich.edu //0x1B-0x1F should cause an illegal instruction exception 5012954Sgblack@eecs.umich.edu } 5023587Sgblack@eecs.umich.edu 0x29: decode RS1 { 5033587Sgblack@eecs.umich.edu 0x00: HPriv::rdhprhpstate({{Rd = Hpstate;}}); 5043587Sgblack@eecs.umich.edu 0x01: HPriv::rdhprhtstate({{ 5053587Sgblack@eecs.umich.edu if(Tl == 0) 5063587Sgblack@eecs.umich.edu return new IllegalInstruction; 5073587Sgblack@eecs.umich.edu Rd = Htstate; 5083587Sgblack@eecs.umich.edu }}); 5093587Sgblack@eecs.umich.edu //0x02 should cause an illegal instruction exception 5103587Sgblack@eecs.umich.edu 0x03: HPriv::rdhprhintp({{Rd = Hintp;}}); 5113587Sgblack@eecs.umich.edu //0x04 should cause an illegal instruction exception 5123587Sgblack@eecs.umich.edu 0x05: HPriv::rdhprhtba({{Rd = Htba;}}); 5133587Sgblack@eecs.umich.edu 0x06: HPriv::rdhprhver({{Rd = Hver;}}); 5143587Sgblack@eecs.umich.edu //0x07-0x1E should cause an illegal instruction exception 5153823Ssaidi@eecs.umich.edu 0x1F: HPriv::rdhprhstick_cmpr({{Rd = HstickCmpr;}}); 5163587Sgblack@eecs.umich.edu } 5173587Sgblack@eecs.umich.edu 0x2A: decode RS1 { 5183587Sgblack@eecs.umich.edu 0x00: Priv::rdprtpc({{ 5193587Sgblack@eecs.umich.edu if(Tl == 0) 5203587Sgblack@eecs.umich.edu return new IllegalInstruction; 5213587Sgblack@eecs.umich.edu Rd = Tpc; 5223587Sgblack@eecs.umich.edu }}); 5233587Sgblack@eecs.umich.edu 0x01: Priv::rdprtnpc({{ 5243587Sgblack@eecs.umich.edu if(Tl == 0) 5253587Sgblack@eecs.umich.edu return new IllegalInstruction; 5263587Sgblack@eecs.umich.edu Rd = Tnpc; 5273587Sgblack@eecs.umich.edu }}); 5283587Sgblack@eecs.umich.edu 0x02: Priv::rdprtstate({{ 5293587Sgblack@eecs.umich.edu if(Tl == 0) 5303587Sgblack@eecs.umich.edu return new IllegalInstruction; 5313587Sgblack@eecs.umich.edu Rd = Tstate; 5323587Sgblack@eecs.umich.edu }}); 5333587Sgblack@eecs.umich.edu 0x03: Priv::rdprtt({{ 5343587Sgblack@eecs.umich.edu if(Tl == 0) 5353587Sgblack@eecs.umich.edu return new IllegalInstruction; 5363587Sgblack@eecs.umich.edu Rd = Tt; 5373587Sgblack@eecs.umich.edu }}); 5383823Ssaidi@eecs.umich.edu 0x04: Priv::rdprtick({{Rd = Tick;}}); 5393587Sgblack@eecs.umich.edu 0x05: Priv::rdprtba({{Rd = Tba;}}); 5403587Sgblack@eecs.umich.edu 0x06: Priv::rdprpstate({{Rd = Pstate;}}); 5413587Sgblack@eecs.umich.edu 0x07: Priv::rdprtl({{Rd = Tl;}}); 5423587Sgblack@eecs.umich.edu 0x08: Priv::rdprpil({{Rd = Pil;}}); 5433587Sgblack@eecs.umich.edu 0x09: Priv::rdprcwp({{Rd = Cwp;}}); 5443587Sgblack@eecs.umich.edu 0x0A: Priv::rdprcansave({{Rd = Cansave;}}); 5453587Sgblack@eecs.umich.edu 0x0B: Priv::rdprcanrestore({{Rd = Canrestore;}}); 5463587Sgblack@eecs.umich.edu 0x0C: Priv::rdprcleanwin({{Rd = Cleanwin;}}); 5473587Sgblack@eecs.umich.edu 0x0D: Priv::rdprotherwin({{Rd = Otherwin;}}); 5483587Sgblack@eecs.umich.edu 0x0E: Priv::rdprwstate({{Rd = Wstate;}}); 5493587Sgblack@eecs.umich.edu //0x0F should cause an illegal instruction exception 5503587Sgblack@eecs.umich.edu 0x10: Priv::rdprgl({{Rd = Gl;}}); 5513587Sgblack@eecs.umich.edu //0x11-0x1F should cause an illegal instruction exception 5523587Sgblack@eecs.umich.edu } 5532526SN/A 0x2B: BasicOperate::flushw({{ 5543911Ssaidi@eecs.umich.edu if(NWindows - 2 - Cansave != 0) 5552526SN/A { 5562526SN/A if(Otherwin) 5573909Ssaidi@eecs.umich.edu fault = new SpillNOther(4*Wstate<5:3>); 5582526SN/A else 5593909Ssaidi@eecs.umich.edu fault = new SpillNNormal(4*Wstate<2:0>); 5602526SN/A } 5612526SN/A }}); 5622526SN/A 0x2C: decode MOVCC3 5632469SN/A { 5642526SN/A 0x0: Trap::movccfcc({{fault = new FpDisabled;}}); 5652526SN/A 0x1: decode CC 5662526SN/A { 5672526SN/A 0x0: movcci({{ 5682646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND4)) 5692591SN/A Rd = Rs2_or_imm11; 5702591SN/A else 5712591SN/A Rd = Rd; 5722526SN/A }}); 5732526SN/A 0x2: movccx({{ 5742646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND4)) 5752591SN/A Rd = Rs2_or_imm11; 5762591SN/A else 5772591SN/A Rd = Rd; 5782526SN/A }}); 5792224SN/A } 5802526SN/A } 5812526SN/A 0x2D: sdivx({{ 5822615SN/A if(Rs2_or_imm13.sdw == 0) fault = new DivisionByZero; 5832615SN/A else Rd.sdw = Rs1.sdw / Rs2_or_imm13.sdw; 5842526SN/A }}); 5853941Ssaidi@eecs.umich.edu 0x2E: Trap::popc({{fault = new IllegalInstruction;}}); 5862526SN/A 0x2F: decode RCOND3 5872526SN/A { 5882615SN/A 0x1: movreq({{Rd = (Rs1.sdw == 0) ? Rs2_or_imm10 : Rd;}}); 5892615SN/A 0x2: movrle({{Rd = (Rs1.sdw <= 0) ? Rs2_or_imm10 : Rd;}}); 5902615SN/A 0x3: movrl({{Rd = (Rs1.sdw < 0) ? Rs2_or_imm10 : Rd;}}); 5912615SN/A 0x5: movrne({{Rd = (Rs1.sdw != 0) ? Rs2_or_imm10 : Rd;}}); 5922615SN/A 0x6: movrg({{Rd = (Rs1.sdw > 0) ? Rs2_or_imm10 : Rd;}}); 5932615SN/A 0x7: movrge({{Rd = (Rs1.sdw >= 0) ? Rs2_or_imm10 : Rd;}}); 5942526SN/A } 5953587Sgblack@eecs.umich.edu 0x30: decode RD { 5963929Ssaidi@eecs.umich.edu 0x00: NoPriv::wry({{Y = (Rs1 ^ Rs2_or_imm13)<31:0>;}}); 5973587Sgblack@eecs.umich.edu //0x01 should cause an illegal instruction exception 5983587Sgblack@eecs.umich.edu 0x02: NoPriv::wrccr({{Ccr = Rs1 ^ Rs2_or_imm13;}}); 5993826Ssaidi@eecs.umich.edu 0x03: NoPriv::wrasi({{Asi = Rs1 ^ Rs2_or_imm13;}}); 6003587Sgblack@eecs.umich.edu //0x04-0x05 should cause an illegal instruction exception 6013587Sgblack@eecs.umich.edu 0x06: NoPriv::wrfprs({{Fprs = Rs1 ^ Rs2_or_imm13;}}); 6023587Sgblack@eecs.umich.edu //0x07-0x0E should cause an illegal instruction exception 6033587Sgblack@eecs.umich.edu 0x0F: Trap::softreset({{fault = new SoftwareInitiatedReset;}}); 6043587Sgblack@eecs.umich.edu 0x10: Priv::wrpcr({{Pcr = Rs1 ^ Rs2_or_imm13;}}); 6053587Sgblack@eecs.umich.edu 0x11: PrivCheck::wrpic({{Pic = Rs1 ^ Rs2_or_imm13;}}, {{Pcr<0:>}}); 6063587Sgblack@eecs.umich.edu //0x12 should cause an illegal instruction exception 6073587Sgblack@eecs.umich.edu 0x13: NoPriv::wrgsr({{ 6083587Sgblack@eecs.umich.edu if(Fprs<2:> == 0 || Pstate<4:> == 0) 6093587Sgblack@eecs.umich.edu return new FpDisabled; 6103587Sgblack@eecs.umich.edu Gsr = Rs1 ^ Rs2_or_imm13; 6113587Sgblack@eecs.umich.edu }}); 6123587Sgblack@eecs.umich.edu 0x14: Priv::wrsoftint_set({{SoftintSet = Rs1 ^ Rs2_or_imm13;}}); 6133587Sgblack@eecs.umich.edu 0x15: Priv::wrsoftint_clr({{SoftintClr = Rs1 ^ Rs2_or_imm13;}}); 6143587Sgblack@eecs.umich.edu 0x16: Priv::wrsoftint({{Softint = Rs1 ^ Rs2_or_imm13;}}); 6153823Ssaidi@eecs.umich.edu 0x17: Priv::wrtick_cmpr({{TickCmpr = Rs1 ^ Rs2_or_imm13;}}); 6163587Sgblack@eecs.umich.edu 0x18: NoPriv::wrstick({{ 6173587Sgblack@eecs.umich.edu if(!Hpstate<2:>) 6183587Sgblack@eecs.umich.edu return new IllegalInstruction; 6193823Ssaidi@eecs.umich.edu Stick = Rs1 ^ Rs2_or_imm13; 6203587Sgblack@eecs.umich.edu }}); 6213823Ssaidi@eecs.umich.edu 0x19: Priv::wrstick_cmpr({{StickCmpr = Rs1 ^ Rs2_or_imm13;}}); 6223598Sgblack@eecs.umich.edu 0x1A: Priv::wrstrand_sts_reg({{ 6233598Sgblack@eecs.umich.edu StrandStsReg = Rs1 ^ Rs2_or_imm13; 6243598Sgblack@eecs.umich.edu }}); 6253598Sgblack@eecs.umich.edu //0x1A is supposed to be reserved, but it writes the strand 6263598Sgblack@eecs.umich.edu //status register. 6273598Sgblack@eecs.umich.edu //0x1B-0x1F should cause an illegal instruction exception 6283587Sgblack@eecs.umich.edu } 6292526SN/A 0x31: decode FCN { 6303417Sgblack@eecs.umich.edu 0x0: Priv::saved({{ 6313417Sgblack@eecs.umich.edu assert(Cansave < NWindows - 2); 6323417Sgblack@eecs.umich.edu assert(Otherwin || Canrestore); 6333417Sgblack@eecs.umich.edu Cansave = Cansave + 1; 6343417Sgblack@eecs.umich.edu if(Otherwin == 0) 6353417Sgblack@eecs.umich.edu Canrestore = Canrestore - 1; 6363417Sgblack@eecs.umich.edu else 6373417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 6383417Sgblack@eecs.umich.edu }}); 6393598Sgblack@eecs.umich.edu 0x1: Priv::restored({{ 6403417Sgblack@eecs.umich.edu assert(Cansave || Otherwin); 6413417Sgblack@eecs.umich.edu assert(Canrestore < NWindows - 2); 6423417Sgblack@eecs.umich.edu Canrestore = Canrestore + 1; 6433417Sgblack@eecs.umich.edu if(Otherwin == 0) 6443417Sgblack@eecs.umich.edu Cansave = Cansave - 1; 6453417Sgblack@eecs.umich.edu else 6463417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 6473928Ssaidi@eecs.umich.edu 6483928Ssaidi@eecs.umich.edu if(Cleanwin < NWindows - 1) 6493928Ssaidi@eecs.umich.edu Cleanwin = Cleanwin + 1; 6503417Sgblack@eecs.umich.edu }}); 6512526SN/A } 6523587Sgblack@eecs.umich.edu 0x32: decode RD { 6533587Sgblack@eecs.umich.edu 0x00: Priv::wrprtpc({{ 6543587Sgblack@eecs.umich.edu if(Tl == 0) 6553587Sgblack@eecs.umich.edu return new IllegalInstruction; 6563587Sgblack@eecs.umich.edu else 6573587Sgblack@eecs.umich.edu Tpc = Rs1 ^ Rs2_or_imm13; 6583587Sgblack@eecs.umich.edu }}); 6593587Sgblack@eecs.umich.edu 0x01: Priv::wrprtnpc({{ 6603587Sgblack@eecs.umich.edu if(Tl == 0) 6613587Sgblack@eecs.umich.edu return new IllegalInstruction; 6623587Sgblack@eecs.umich.edu else 6633587Sgblack@eecs.umich.edu Tnpc = Rs1 ^ Rs2_or_imm13; 6643587Sgblack@eecs.umich.edu }}); 6653587Sgblack@eecs.umich.edu 0x02: Priv::wrprtstate({{ 6663587Sgblack@eecs.umich.edu if(Tl == 0) 6673587Sgblack@eecs.umich.edu return new IllegalInstruction; 6683587Sgblack@eecs.umich.edu else 6693587Sgblack@eecs.umich.edu Tstate = Rs1 ^ Rs2_or_imm13; 6703587Sgblack@eecs.umich.edu }}); 6713587Sgblack@eecs.umich.edu 0x03: Priv::wrprtt({{ 6723587Sgblack@eecs.umich.edu if(Tl == 0) 6733587Sgblack@eecs.umich.edu return new IllegalInstruction; 6743587Sgblack@eecs.umich.edu else 6753587Sgblack@eecs.umich.edu Tt = Rs1 ^ Rs2_or_imm13; 6763587Sgblack@eecs.umich.edu }}); 6773823Ssaidi@eecs.umich.edu 0x04: HPriv::wrprtick({{Tick = Rs1 ^ Rs2_or_imm13;}}); 6783587Sgblack@eecs.umich.edu 0x05: Priv::wrprtba({{Tba = Rs1 ^ Rs2_or_imm13;}}); 6793587Sgblack@eecs.umich.edu 0x06: Priv::wrprpstate({{Pstate = Rs1 ^ Rs2_or_imm13;}}); 6803587Sgblack@eecs.umich.edu 0x07: Priv::wrprtl({{ 6813587Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 6823587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPTL); 6833587Sgblack@eecs.umich.edu else 6843587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxTL); 6853587Sgblack@eecs.umich.edu }}); 6863587Sgblack@eecs.umich.edu 0x08: Priv::wrprpil({{Pil = Rs1 ^ Rs2_or_imm13;}}); 6873587Sgblack@eecs.umich.edu 0x09: Priv::wrprcwp({{Cwp = Rs1 ^ Rs2_or_imm13;}}); 6883587Sgblack@eecs.umich.edu 0x0A: Priv::wrprcansave({{Cansave = Rs1 ^ Rs2_or_imm13;}}); 6893587Sgblack@eecs.umich.edu 0x0B: Priv::wrprcanrestore({{Canrestore = Rs1 ^ Rs2_or_imm13;}}); 6903587Sgblack@eecs.umich.edu 0x0C: Priv::wrprcleanwin({{Cleanwin = Rs1 ^ Rs2_or_imm13;}}); 6913587Sgblack@eecs.umich.edu 0x0D: Priv::wrprotherwin({{Otherwin = Rs1 ^ Rs2_or_imm13;}}); 6923587Sgblack@eecs.umich.edu 0x0E: Priv::wrprwstate({{Wstate = Rs1 ^ Rs2_or_imm13;}}); 6933587Sgblack@eecs.umich.edu //0x0F should cause an illegal instruction exception 6943587Sgblack@eecs.umich.edu 0x10: Priv::wrprgl({{ 6953587Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 6963587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPGL); 6973587Sgblack@eecs.umich.edu else 6983587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxGL); 6993587Sgblack@eecs.umich.edu }}); 7003587Sgblack@eecs.umich.edu //0x11-0x1F should cause an illegal instruction exception 7013587Sgblack@eecs.umich.edu } 7023587Sgblack@eecs.umich.edu 0x33: decode RD { 7033587Sgblack@eecs.umich.edu 0x00: HPriv::wrhprhpstate({{Hpstate = Rs1 ^ Rs2_or_imm13;}}); 7043587Sgblack@eecs.umich.edu 0x01: HPriv::wrhprhtstate({{ 7053587Sgblack@eecs.umich.edu if(Tl == 0) 7063587Sgblack@eecs.umich.edu return new IllegalInstruction; 7073587Sgblack@eecs.umich.edu Htstate = Rs1 ^ Rs2_or_imm13; 7083587Sgblack@eecs.umich.edu }}); 7093587Sgblack@eecs.umich.edu //0x02 should cause an illegal instruction exception 7103587Sgblack@eecs.umich.edu 0x03: HPriv::wrhprhintp({{Hintp = Rs1 ^ Rs2_or_imm13;}}); 7113587Sgblack@eecs.umich.edu //0x04 should cause an illegal instruction exception 7123587Sgblack@eecs.umich.edu 0x05: HPriv::wrhprhtba({{Htba = Rs1 ^ Rs2_or_imm13;}}); 7133587Sgblack@eecs.umich.edu //0x06-0x01D should cause an illegal instruction exception 7143823Ssaidi@eecs.umich.edu 0x1F: HPriv::wrhprhstick_cmpr({{HstickCmpr = Rs1 ^ Rs2_or_imm13;}}); 7153587Sgblack@eecs.umich.edu } 7162954Sgblack@eecs.umich.edu 0x34: decode OPF{ 7174008Ssaidi@eecs.umich.edu format FpBasic{ 7182963Sgblack@eecs.umich.edu 0x01: fmovs({{ 7193279Sgblack@eecs.umich.edu Frds.uw = Frs2s.uw; 7202963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7212963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7222963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7232963Sgblack@eecs.umich.edu }}); 7242963Sgblack@eecs.umich.edu 0x02: fmovd({{ 7253057Sgblack@eecs.umich.edu Frd.udw = Frs2.udw; 7262963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7272963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7282963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7292963Sgblack@eecs.umich.edu }}); 7303995Sgblack@eecs.umich.edu 0x03: FpUnimpl::fmovq(); 7312963Sgblack@eecs.umich.edu 0x05: fnegs({{ 7323279Sgblack@eecs.umich.edu Frds.uw = Frs2s.uw ^ (1UL << 31); 7332963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7342963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7352963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7362963Sgblack@eecs.umich.edu }}); 7372963Sgblack@eecs.umich.edu 0x06: fnegd({{ 7383057Sgblack@eecs.umich.edu Frd.udw = Frs2.udw ^ (1ULL << 63); 7392963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7402963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7412963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7422963Sgblack@eecs.umich.edu }}); 7433995Sgblack@eecs.umich.edu 0x07: FpUnimpl::fnegq(); 7442963Sgblack@eecs.umich.edu 0x09: fabss({{ 7453279Sgblack@eecs.umich.edu Frds.uw = ((1UL << 31) - 1) & Frs2s.uw; 7462963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7472963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7482963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7492963Sgblack@eecs.umich.edu }}); 7502963Sgblack@eecs.umich.edu 0x0A: fabsd({{ 7513057Sgblack@eecs.umich.edu Frd.udw = ((1ULL << 63) - 1) & Frs2.udw; 7522963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7532963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7542963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7552963Sgblack@eecs.umich.edu }}); 7563995Sgblack@eecs.umich.edu 0x0B: FpUnimpl::fabsq(); 7573918Ssaidi@eecs.umich.edu 0x29: fsqrts({{Frds.sf = std::sqrt(Frs2s.sf);}}); 7583918Ssaidi@eecs.umich.edu 0x2A: fsqrtd({{Frd.df = std::sqrt(Frs2.df);}}); 7593995Sgblack@eecs.umich.edu 0x2B: FpUnimpl::fsqrtq(); 7603279Sgblack@eecs.umich.edu 0x41: fadds({{Frds.sf = Frs1s.sf + Frs2s.sf;}}); 7612963Sgblack@eecs.umich.edu 0x42: faddd({{Frd.df = Frs1.df + Frs2.df;}}); 7623995Sgblack@eecs.umich.edu 0x43: FpUnimpl::faddq(); 7633279Sgblack@eecs.umich.edu 0x45: fsubs({{Frds.sf = Frs1s.sf - Frs2s.sf;}}); 7644008Ssaidi@eecs.umich.edu 0x46: fsubd({{Frd.df = Frs1.df - Frs2.df; }}); 7653995Sgblack@eecs.umich.edu 0x47: FpUnimpl::fsubq(); 7663279Sgblack@eecs.umich.edu 0x49: fmuls({{Frds.sf = Frs1s.sf * Frs2s.sf;}}); 7672963Sgblack@eecs.umich.edu 0x4A: fmuld({{Frd.df = Frs1.df * Frs2.df;}}); 7683995Sgblack@eecs.umich.edu 0x4B: FpUnimpl::fmulq(); 7693279Sgblack@eecs.umich.edu 0x4D: fdivs({{Frds.sf = Frs1s.sf / Frs2s.sf;}}); 7702963Sgblack@eecs.umich.edu 0x4E: fdivd({{Frd.df = Frs1.df / Frs2.df;}}); 7713995Sgblack@eecs.umich.edu 0x4F: FpUnimpl::fdivq(); 7723279Sgblack@eecs.umich.edu 0x69: fsmuld({{Frd.df = Frs1s.sf * Frs2s.sf;}}); 7733995Sgblack@eecs.umich.edu 0x6E: FpUnimpl::fdmulq(); 7742963Sgblack@eecs.umich.edu 0x81: fstox({{ 7754008Ssaidi@eecs.umich.edu Frd.sdw = static_cast<int64_t>(Frs2s.sf); 7762963Sgblack@eecs.umich.edu }}); 7772963Sgblack@eecs.umich.edu 0x82: fdtox({{ 7784008Ssaidi@eecs.umich.edu Frd.sdw = static_cast<int64_t>(Frs2.df); 7792963Sgblack@eecs.umich.edu }}); 7803995Sgblack@eecs.umich.edu 0x83: FpUnimpl::fqtox(); 7812963Sgblack@eecs.umich.edu 0x84: fxtos({{ 7824008Ssaidi@eecs.umich.edu Frds.sf = static_cast<float>(Frs2.sdw); 7832963Sgblack@eecs.umich.edu }}); 7842963Sgblack@eecs.umich.edu 0x88: fxtod({{ 7854008Ssaidi@eecs.umich.edu Frd.df = static_cast<double>(Frs2.sdw); 7862963Sgblack@eecs.umich.edu }}); 7873995Sgblack@eecs.umich.edu 0x8C: FpUnimpl::fxtoq(); 7882963Sgblack@eecs.umich.edu 0xC4: fitos({{ 7894008Ssaidi@eecs.umich.edu Frds.sf = static_cast<float>(Frs2s.sw); 7902963Sgblack@eecs.umich.edu }}); 7913279Sgblack@eecs.umich.edu 0xC6: fdtos({{Frds.sf = Frs2.df;}}); 7923995Sgblack@eecs.umich.edu 0xC7: FpUnimpl::fqtos(); 7932963Sgblack@eecs.umich.edu 0xC8: fitod({{ 7944008Ssaidi@eecs.umich.edu Frd.df = static_cast<double>(Frs2s.sw); 7952963Sgblack@eecs.umich.edu }}); 7963279Sgblack@eecs.umich.edu 0xC9: fstod({{Frd.df = Frs2s.sf;}}); 7973995Sgblack@eecs.umich.edu 0xCB: FpUnimpl::fqtod(); 7983995Sgblack@eecs.umich.edu 0xCC: FpUnimpl::fitoq(); 7993995Sgblack@eecs.umich.edu 0xCD: FpUnimpl::fstoq(); 8003995Sgblack@eecs.umich.edu 0xCE: FpUnimpl::fdtoq(); 8012963Sgblack@eecs.umich.edu 0xD1: fstoi({{ 8024008Ssaidi@eecs.umich.edu Frds.sw = static_cast<int32_t>(Frs2s.sf); 8034008Ssaidi@eecs.umich.edu float t = Frds.sw; 8044008Ssaidi@eecs.umich.edu if (t != Frs2s.sf) 8054008Ssaidi@eecs.umich.edu Fsr = insertBits(Fsr, 4,0, 0x01); 8062963Sgblack@eecs.umich.edu }}); 8072963Sgblack@eecs.umich.edu 0xD2: fdtoi({{ 8084008Ssaidi@eecs.umich.edu Frds.sw = static_cast<int32_t>(Frs2.df); 8094008Ssaidi@eecs.umich.edu double t = Frds.sw; 8104008Ssaidi@eecs.umich.edu if (t != Frs2.df) 8114008Ssaidi@eecs.umich.edu Fsr = insertBits(Fsr, 4,0, 0x01); 8122963Sgblack@eecs.umich.edu }}); 8133995Sgblack@eecs.umich.edu 0xD3: FpUnimpl::fqtoi(); 8143941Ssaidi@eecs.umich.edu default: FailUnimpl::fpop1(); 8152963Sgblack@eecs.umich.edu } 8162954Sgblack@eecs.umich.edu } 8173992Sgblack@eecs.umich.edu 0x35: decode OPF{ 8184008Ssaidi@eecs.umich.edu format FpBasic{ 8194204Sgblack@eecs.umich.edu 0x01: fmovs_fcc0({{ 8204204Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<11:10>, COND4)) 8214204Sgblack@eecs.umich.edu Frds = Frs2s; 8224204Sgblack@eecs.umich.edu else 8234204Sgblack@eecs.umich.edu Frds = Frds; 8244204Sgblack@eecs.umich.edu }}); 8254204Sgblack@eecs.umich.edu 0x02: fmovd_fcc0({{ 8264204Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<11:10>, COND4)) 8274204Sgblack@eecs.umich.edu Frd = Frs2; 8284204Sgblack@eecs.umich.edu else 8294204Sgblack@eecs.umich.edu Frd = Frd; 8304204Sgblack@eecs.umich.edu }}); 8314204Sgblack@eecs.umich.edu 0x03: FpUnimpl::fmovq_fcc0(); 8324204Sgblack@eecs.umich.edu 0x25: fmovrsz({{ 8334204Sgblack@eecs.umich.edu if(Rs1 == 0) 8344204Sgblack@eecs.umich.edu Frds = Frs2s; 8354204Sgblack@eecs.umich.edu else 8364204Sgblack@eecs.umich.edu Frds = Frds; 8374204Sgblack@eecs.umich.edu }}); 8384204Sgblack@eecs.umich.edu 0x26: fmovrdz({{ 8394204Sgblack@eecs.umich.edu if(Rs1 == 0) 8404204Sgblack@eecs.umich.edu Frd = Frs2; 8414204Sgblack@eecs.umich.edu else 8424204Sgblack@eecs.umich.edu Frd = Frd; 8434204Sgblack@eecs.umich.edu }}); 8444204Sgblack@eecs.umich.edu 0x27: FpUnimpl::fmovrqz(); 8454204Sgblack@eecs.umich.edu 0x41: fmovs_fcc1({{ 8464204Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<33:32>, COND4)) 8474204Sgblack@eecs.umich.edu Frds = Frs2s; 8484204Sgblack@eecs.umich.edu else 8494204Sgblack@eecs.umich.edu Frds = Frds; 8504204Sgblack@eecs.umich.edu }}); 8514204Sgblack@eecs.umich.edu 0x42: fmovd_fcc1({{ 8524204Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<33:32>, COND4)) 8534204Sgblack@eecs.umich.edu Frd = Frs2; 8544204Sgblack@eecs.umich.edu else 8554204Sgblack@eecs.umich.edu Frd = Frd; 8564204Sgblack@eecs.umich.edu }}); 8574204Sgblack@eecs.umich.edu 0x43: FpUnimpl::fmovq_fcc1(); 8584204Sgblack@eecs.umich.edu 0x45: fmovrslez({{ 8594204Sgblack@eecs.umich.edu if(Rs1 <= 0) 8604204Sgblack@eecs.umich.edu Frds = Frs2s; 8614204Sgblack@eecs.umich.edu else 8624204Sgblack@eecs.umich.edu Frds = Frds; 8634204Sgblack@eecs.umich.edu }}); 8644204Sgblack@eecs.umich.edu 0x46: fmovrdlez({{ 8654204Sgblack@eecs.umich.edu if(Rs1 <= 0) 8664204Sgblack@eecs.umich.edu Frd = Frs2; 8674204Sgblack@eecs.umich.edu else 8684204Sgblack@eecs.umich.edu Frd = Frd; 8694204Sgblack@eecs.umich.edu }}); 8704204Sgblack@eecs.umich.edu 0x47: FpUnimpl::fmovrqlez(); 8713992Sgblack@eecs.umich.edu 0x51: fcmps({{ 8723992Sgblack@eecs.umich.edu uint8_t fcc; 8733998Ssaidi@eecs.umich.edu if(isnan(Frs1s) || isnan(Frs2s)) 8743992Sgblack@eecs.umich.edu fcc = 3; 8753992Sgblack@eecs.umich.edu else if(Frs1s < Frs2s) 8763992Sgblack@eecs.umich.edu fcc = 1; 8773992Sgblack@eecs.umich.edu else if(Frs1s > Frs2s) 8783992Sgblack@eecs.umich.edu fcc = 2; 8793992Sgblack@eecs.umich.edu else 8803992Sgblack@eecs.umich.edu fcc = 0; 8813992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 8823992Sgblack@eecs.umich.edu if(FCMPCC) 8833992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 8843992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 8853992Sgblack@eecs.umich.edu }}); 8863992Sgblack@eecs.umich.edu 0x52: fcmpd({{ 8873992Sgblack@eecs.umich.edu uint8_t fcc; 8884008Ssaidi@eecs.umich.edu if(isnan(Frs1) || isnan(Frs2)) 8893992Sgblack@eecs.umich.edu fcc = 3; 8904008Ssaidi@eecs.umich.edu else if(Frs1 < Frs2) 8913992Sgblack@eecs.umich.edu fcc = 1; 8924008Ssaidi@eecs.umich.edu else if(Frs1 > Frs2) 8933992Sgblack@eecs.umich.edu fcc = 2; 8943992Sgblack@eecs.umich.edu else 8953992Sgblack@eecs.umich.edu fcc = 0; 8963992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 8973992Sgblack@eecs.umich.edu if(FCMPCC) 8983992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 8993992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 9003992Sgblack@eecs.umich.edu }}); 9013995Sgblack@eecs.umich.edu 0x53: FpUnimpl::fcmpq(); 9023997Ssaidi@eecs.umich.edu 0x55: fcmpes({{ 9033992Sgblack@eecs.umich.edu uint8_t fcc = 0; 9043998Ssaidi@eecs.umich.edu if(isnan(Frs1s) || isnan(Frs2s)) 9053992Sgblack@eecs.umich.edu fault = new FpExceptionIEEE754; 9063992Sgblack@eecs.umich.edu if(Frs1s < Frs2s) 9073992Sgblack@eecs.umich.edu fcc = 1; 9083992Sgblack@eecs.umich.edu else if(Frs1s > Frs2s) 9093992Sgblack@eecs.umich.edu fcc = 2; 9103992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 9113992Sgblack@eecs.umich.edu if(FCMPCC) 9123992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 9133992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 9143992Sgblack@eecs.umich.edu }}); 9153997Ssaidi@eecs.umich.edu 0x56: fcmped({{ 9163992Sgblack@eecs.umich.edu uint8_t fcc = 0; 9174008Ssaidi@eecs.umich.edu if(isnan(Frs1) || isnan(Frs2)) 9183992Sgblack@eecs.umich.edu fault = new FpExceptionIEEE754; 9194008Ssaidi@eecs.umich.edu if(Frs1 < Frs2) 9203992Sgblack@eecs.umich.edu fcc = 1; 9214008Ssaidi@eecs.umich.edu else if(Frs1 > Frs2) 9223992Sgblack@eecs.umich.edu fcc = 2; 9233992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 9243992Sgblack@eecs.umich.edu if(FCMPCC) 9253992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 9263992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 9273992Sgblack@eecs.umich.edu }}); 9283997Ssaidi@eecs.umich.edu 0x57: FpUnimpl::fcmpeq(); 9294204Sgblack@eecs.umich.edu 0x65: fmovrslz({{ 9304204Sgblack@eecs.umich.edu if(Rs1 < 0) 9314204Sgblack@eecs.umich.edu Frds = Frs2s; 9324204Sgblack@eecs.umich.edu else 9334204Sgblack@eecs.umich.edu Frds = Frds; 9344204Sgblack@eecs.umich.edu }}); 9354204Sgblack@eecs.umich.edu 0x66: fmovrdlz({{ 9364204Sgblack@eecs.umich.edu if(Rs1 < 0) 9374204Sgblack@eecs.umich.edu Frd = Frs2; 9384204Sgblack@eecs.umich.edu else 9394204Sgblack@eecs.umich.edu Frd = Frd; 9404204Sgblack@eecs.umich.edu }}); 9414204Sgblack@eecs.umich.edu 0x67: FpUnimpl::fmovrqlz(); 9424204Sgblack@eecs.umich.edu 0x81: fmovs_fcc2({{ 9434204Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<35:34>, COND4)) 9444204Sgblack@eecs.umich.edu Frds = Frs2s; 9454204Sgblack@eecs.umich.edu else 9464204Sgblack@eecs.umich.edu Frds = Frds; 9474204Sgblack@eecs.umich.edu }}); 9484204Sgblack@eecs.umich.edu 0x82: fmovd_fcc2({{ 9494204Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<35:34>, COND4)) 9504204Sgblack@eecs.umich.edu Frd = Frs2; 9514204Sgblack@eecs.umich.edu else 9524204Sgblack@eecs.umich.edu Frd = Frd; 9534204Sgblack@eecs.umich.edu }}); 9544204Sgblack@eecs.umich.edu 0x83: FpUnimpl::fmovq_fcc2(); 9554204Sgblack@eecs.umich.edu 0xA5: fmovrsnz({{ 9564204Sgblack@eecs.umich.edu if(Rs1 != 0) 9574204Sgblack@eecs.umich.edu Frds = Frs2s; 9584204Sgblack@eecs.umich.edu else 9594204Sgblack@eecs.umich.edu Frds = Frds; 9604204Sgblack@eecs.umich.edu }}); 9614204Sgblack@eecs.umich.edu 0xA6: fmovrdnz({{ 9624204Sgblack@eecs.umich.edu if(Rs1 != 0) 9634204Sgblack@eecs.umich.edu Frd = Frs2; 9644204Sgblack@eecs.umich.edu else 9654204Sgblack@eecs.umich.edu Frd = Frd; 9664204Sgblack@eecs.umich.edu }}); 9674204Sgblack@eecs.umich.edu 0xA7: FpUnimpl::fmovrqnz(); 9684204Sgblack@eecs.umich.edu 0xC1: fmovs_fcc3({{ 9694204Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<37:36>, COND4)) 9704204Sgblack@eecs.umich.edu Frds = Frs2s; 9714204Sgblack@eecs.umich.edu else 9724204Sgblack@eecs.umich.edu Frds = Frds; 9734204Sgblack@eecs.umich.edu }}); 9744204Sgblack@eecs.umich.edu 0xC2: fmovd_fcc3({{ 9754204Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<37:36>, COND4)) 9764204Sgblack@eecs.umich.edu Frd = Frs2; 9774204Sgblack@eecs.umich.edu else 9784204Sgblack@eecs.umich.edu Frd = Frd; 9794204Sgblack@eecs.umich.edu }}); 9804204Sgblack@eecs.umich.edu 0xC3: FpUnimpl::fmovq_fcc3(); 9814204Sgblack@eecs.umich.edu 0xC5: fmovrsgz({{ 9824204Sgblack@eecs.umich.edu if(Rs1 > 0) 9834204Sgblack@eecs.umich.edu Frds = Frs2s; 9844204Sgblack@eecs.umich.edu else 9854204Sgblack@eecs.umich.edu Frds = Frds; 9864204Sgblack@eecs.umich.edu }}); 9874204Sgblack@eecs.umich.edu 0xC6: fmovrdgz({{ 9884204Sgblack@eecs.umich.edu if(Rs1 > 0) 9894204Sgblack@eecs.umich.edu Frd = Frs2; 9904204Sgblack@eecs.umich.edu else 9914204Sgblack@eecs.umich.edu Frd = Frd; 9924204Sgblack@eecs.umich.edu }}); 9934204Sgblack@eecs.umich.edu 0xC7: FpUnimpl::fmovrqgz(); 9944204Sgblack@eecs.umich.edu 0xE5: fmovrsgez({{ 9954204Sgblack@eecs.umich.edu if(Rs1 >= 0) 9964204Sgblack@eecs.umich.edu Frds = Frs2s; 9974204Sgblack@eecs.umich.edu else 9984204Sgblack@eecs.umich.edu Frds = Frds; 9994204Sgblack@eecs.umich.edu }}); 10004204Sgblack@eecs.umich.edu 0xE6: fmovrdgez({{ 10014204Sgblack@eecs.umich.edu if(Rs1 >= 0) 10024204Sgblack@eecs.umich.edu Frd = Frs2; 10034204Sgblack@eecs.umich.edu else 10044204Sgblack@eecs.umich.edu Frd = Frd; 10054204Sgblack@eecs.umich.edu }}); 10064204Sgblack@eecs.umich.edu 0xE7: FpUnimpl::fmovrqgez(); 10074204Sgblack@eecs.umich.edu 0x101: fmovs_icc({{ 10084204Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND4)) 10094204Sgblack@eecs.umich.edu Frds = Frs2s; 10104204Sgblack@eecs.umich.edu else 10114204Sgblack@eecs.umich.edu Frds = Frds; 10124204Sgblack@eecs.umich.edu }}); 10134204Sgblack@eecs.umich.edu 0x102: fmovd_icc({{ 10144204Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND4)) 10154204Sgblack@eecs.umich.edu Frd = Frs2; 10164204Sgblack@eecs.umich.edu else 10174204Sgblack@eecs.umich.edu Frd = Frd; 10184204Sgblack@eecs.umich.edu }}); 10194204Sgblack@eecs.umich.edu 0x103: FpUnimpl::fmovq_icc(); 10204204Sgblack@eecs.umich.edu 0x181: fmovs_xcc({{ 10214204Sgblack@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND4)) 10224204Sgblack@eecs.umich.edu Frds = Frs2s; 10234204Sgblack@eecs.umich.edu else 10244204Sgblack@eecs.umich.edu Frds = Frds; 10254204Sgblack@eecs.umich.edu }}); 10264204Sgblack@eecs.umich.edu 0x182: fmovd_xcc({{ 10274204Sgblack@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND4)) 10284204Sgblack@eecs.umich.edu Frd = Frs2; 10294204Sgblack@eecs.umich.edu else 10304204Sgblack@eecs.umich.edu Frd = Frd; 10314204Sgblack@eecs.umich.edu }}); 10324204Sgblack@eecs.umich.edu 0x183: FpUnimpl::fmovq_xcc(); 10333992Sgblack@eecs.umich.edu default: FailUnimpl::fpop2(); 10343992Sgblack@eecs.umich.edu } 10353992Sgblack@eecs.umich.edu } 10362954Sgblack@eecs.umich.edu //This used to be just impdep1, but now it's a whole bunch 10372954Sgblack@eecs.umich.edu //of instructions 10382954Sgblack@eecs.umich.edu 0x36: decode OPF{ 10393941Ssaidi@eecs.umich.edu 0x00: FailUnimpl::edge8(); 10403941Ssaidi@eecs.umich.edu 0x01: FailUnimpl::edge8n(); 10413941Ssaidi@eecs.umich.edu 0x02: FailUnimpl::edge8l(); 10423941Ssaidi@eecs.umich.edu 0x03: FailUnimpl::edge8ln(); 10433941Ssaidi@eecs.umich.edu 0x04: FailUnimpl::edge16(); 10443941Ssaidi@eecs.umich.edu 0x05: FailUnimpl::edge16n(); 10453941Ssaidi@eecs.umich.edu 0x06: FailUnimpl::edge16l(); 10463941Ssaidi@eecs.umich.edu 0x07: FailUnimpl::edge16ln(); 10473941Ssaidi@eecs.umich.edu 0x08: FailUnimpl::edge32(); 10483941Ssaidi@eecs.umich.edu 0x09: FailUnimpl::edge32n(); 10493941Ssaidi@eecs.umich.edu 0x0A: FailUnimpl::edge32l(); 10503941Ssaidi@eecs.umich.edu 0x0B: FailUnimpl::edge32ln(); 10513941Ssaidi@eecs.umich.edu 0x10: FailUnimpl::array8(); 10523941Ssaidi@eecs.umich.edu 0x12: FailUnimpl::array16(); 10533941Ssaidi@eecs.umich.edu 0x14: FailUnimpl::array32(); 10543042Sgblack@eecs.umich.edu 0x18: BasicOperate::alignaddr({{ 10552963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 10563042Sgblack@eecs.umich.edu Rd = sum & ~7; 10572963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | (sum & 7); 10582963Sgblack@eecs.umich.edu }}); 10593941Ssaidi@eecs.umich.edu 0x19: FailUnimpl::bmask(); 10602963Sgblack@eecs.umich.edu 0x1A: BasicOperate::alignaddresslittle({{ 10612963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 10623042Sgblack@eecs.umich.edu Rd = sum & ~7; 10632963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | ((~sum + 1) & 7); 10642963Sgblack@eecs.umich.edu }}); 10653941Ssaidi@eecs.umich.edu 0x20: FailUnimpl::fcmple16(); 10663941Ssaidi@eecs.umich.edu 0x22: FailUnimpl::fcmpne16(); 10673941Ssaidi@eecs.umich.edu 0x24: FailUnimpl::fcmple32(); 10683941Ssaidi@eecs.umich.edu 0x26: FailUnimpl::fcmpne32(); 10693941Ssaidi@eecs.umich.edu 0x28: FailUnimpl::fcmpgt16(); 10703941Ssaidi@eecs.umich.edu 0x2A: FailUnimpl::fcmpeq16(); 10713941Ssaidi@eecs.umich.edu 0x2C: FailUnimpl::fcmpgt32(); 10723941Ssaidi@eecs.umich.edu 0x2E: FailUnimpl::fcmpeq32(); 10733941Ssaidi@eecs.umich.edu 0x31: FailUnimpl::fmul8x16(); 10743941Ssaidi@eecs.umich.edu 0x33: FailUnimpl::fmul8x16au(); 10753941Ssaidi@eecs.umich.edu 0x35: FailUnimpl::fmul8x16al(); 10763941Ssaidi@eecs.umich.edu 0x36: FailUnimpl::fmul8sux16(); 10773941Ssaidi@eecs.umich.edu 0x37: FailUnimpl::fmul8ulx16(); 10783941Ssaidi@eecs.umich.edu 0x38: FailUnimpl::fmuld8sux16(); 10793941Ssaidi@eecs.umich.edu 0x39: FailUnimpl::fmuld8ulx16(); 10802954Sgblack@eecs.umich.edu 0x3A: Trap::fpack32({{fault = new IllegalInstruction;}}); 10812954Sgblack@eecs.umich.edu 0x3B: Trap::fpack16({{fault = new IllegalInstruction;}}); 10822954Sgblack@eecs.umich.edu 0x3D: Trap::fpackfix({{fault = new IllegalInstruction;}}); 10832954Sgblack@eecs.umich.edu 0x3E: Trap::pdist({{fault = new IllegalInstruction;}}); 10842963Sgblack@eecs.umich.edu 0x48: BasicOperate::faligndata({{ 10853057Sgblack@eecs.umich.edu uint64_t msbX = Frs1.udw; 10863057Sgblack@eecs.umich.edu uint64_t lsbX = Frs2.udw; 10873057Sgblack@eecs.umich.edu //Some special cases need to be split out, first 10883057Sgblack@eecs.umich.edu //because they're the most likely to be used, and 10893057Sgblack@eecs.umich.edu //second because otherwise, we end up shifting by 10903057Sgblack@eecs.umich.edu //greater than the width of the type being shifted, 10913057Sgblack@eecs.umich.edu //namely 64, which produces undefined results according 10923057Sgblack@eecs.umich.edu //to the C standard. 10933057Sgblack@eecs.umich.edu switch(Gsr<2:0>) 10943057Sgblack@eecs.umich.edu { 10953057Sgblack@eecs.umich.edu case 0: 10963057Sgblack@eecs.umich.edu Frd.udw = msbX; 10973057Sgblack@eecs.umich.edu break; 10983057Sgblack@eecs.umich.edu case 8: 10993057Sgblack@eecs.umich.edu Frd.udw = lsbX; 11003057Sgblack@eecs.umich.edu break; 11013057Sgblack@eecs.umich.edu default: 11023057Sgblack@eecs.umich.edu uint64_t msbShift = Gsr<2:0> * 8; 11033057Sgblack@eecs.umich.edu uint64_t lsbShift = (8 - Gsr<2:0>) * 8; 11043057Sgblack@eecs.umich.edu uint64_t msbMask = ((uint64_t)(-1)) >> msbShift; 11053057Sgblack@eecs.umich.edu uint64_t lsbMask = ((uint64_t)(-1)) << lsbShift; 11063057Sgblack@eecs.umich.edu Frd.udw = ((msbX & msbMask) << msbShift) | 11073057Sgblack@eecs.umich.edu ((lsbX & lsbMask) >> lsbShift); 11083057Sgblack@eecs.umich.edu } 11092963Sgblack@eecs.umich.edu }}); 11102954Sgblack@eecs.umich.edu 0x4B: Trap::fpmerge({{fault = new IllegalInstruction;}}); 11113941Ssaidi@eecs.umich.edu 0x4C: FailUnimpl::bshuffle(); 11123941Ssaidi@eecs.umich.edu 0x4D: FailUnimpl::fexpand(); 11133941Ssaidi@eecs.umich.edu 0x50: FailUnimpl::fpadd16(); 11143941Ssaidi@eecs.umich.edu 0x51: FailUnimpl::fpadd16s(); 11153941Ssaidi@eecs.umich.edu 0x52: FailUnimpl::fpadd32(); 11163941Ssaidi@eecs.umich.edu 0x53: FailUnimpl::fpadd32s(); 11173941Ssaidi@eecs.umich.edu 0x54: FailUnimpl::fpsub16(); 11183941Ssaidi@eecs.umich.edu 0x55: FailUnimpl::fpsub16s(); 11193941Ssaidi@eecs.umich.edu 0x56: FailUnimpl::fpsub32(); 11203941Ssaidi@eecs.umich.edu 0x57: FailUnimpl::fpsub32s(); 11214008Ssaidi@eecs.umich.edu 0x60: FpBasic::fzero({{Frd.df = 0;}}); 11224008Ssaidi@eecs.umich.edu 0x61: FpBasic::fzeros({{Frds.sf = 0;}}); 11233941Ssaidi@eecs.umich.edu 0x62: FailUnimpl::fnor(); 11243941Ssaidi@eecs.umich.edu 0x63: FailUnimpl::fnors(); 11253941Ssaidi@eecs.umich.edu 0x64: FailUnimpl::fandnot2(); 11263941Ssaidi@eecs.umich.edu 0x65: FailUnimpl::fandnot2s(); 11274008Ssaidi@eecs.umich.edu 0x66: FpBasic::fnot2({{ 11282963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs2.df)); 11292963Sgblack@eecs.umich.edu }}); 11304008Ssaidi@eecs.umich.edu 0x67: FpBasic::fnot2s({{ 11313279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs2s.sf)); 11322963Sgblack@eecs.umich.edu }}); 11333941Ssaidi@eecs.umich.edu 0x68: FailUnimpl::fandnot1(); 11343941Ssaidi@eecs.umich.edu 0x69: FailUnimpl::fandnot1s(); 11354008Ssaidi@eecs.umich.edu 0x6A: FpBasic::fnot1({{ 11362963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs1.df)); 11372963Sgblack@eecs.umich.edu }}); 11384008Ssaidi@eecs.umich.edu 0x6B: FpBasic::fnot1s({{ 11393279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs1s.sf)); 11402963Sgblack@eecs.umich.edu }}); 11413941Ssaidi@eecs.umich.edu 0x6C: FailUnimpl::fxor(); 11423941Ssaidi@eecs.umich.edu 0x6D: FailUnimpl::fxors(); 11433941Ssaidi@eecs.umich.edu 0x6E: FailUnimpl::fnand(); 11443941Ssaidi@eecs.umich.edu 0x6F: FailUnimpl::fnands(); 11453941Ssaidi@eecs.umich.edu 0x70: FailUnimpl::fand(); 11463941Ssaidi@eecs.umich.edu 0x71: FailUnimpl::fands(); 11473941Ssaidi@eecs.umich.edu 0x72: FailUnimpl::fxnor(); 11483941Ssaidi@eecs.umich.edu 0x73: FailUnimpl::fxnors(); 11494008Ssaidi@eecs.umich.edu 0x74: FpBasic::fsrc1({{Frd.udw = Frs1.udw;}}); 11504008Ssaidi@eecs.umich.edu 0x75: FpBasic::fsrc1s({{Frds.uw = Frs1s.uw;}}); 11513941Ssaidi@eecs.umich.edu 0x76: FailUnimpl::fornot2(); 11523941Ssaidi@eecs.umich.edu 0x77: FailUnimpl::fornot2s(); 11534008Ssaidi@eecs.umich.edu 0x78: FpBasic::fsrc2({{Frd.udw = Frs2.udw;}}); 11544008Ssaidi@eecs.umich.edu 0x79: FpBasic::fsrc2s({{Frds.uw = Frs2s.uw;}}); 11553941Ssaidi@eecs.umich.edu 0x7A: FailUnimpl::fornot1(); 11563941Ssaidi@eecs.umich.edu 0x7B: FailUnimpl::fornot1s(); 11573941Ssaidi@eecs.umich.edu 0x7C: FailUnimpl::for(); 11583941Ssaidi@eecs.umich.edu 0x7D: FailUnimpl::fors(); 11594008Ssaidi@eecs.umich.edu 0x7E: FpBasic::fone({{Frd.udw = std::numeric_limits<uint64_t>::max();}}); 11604008Ssaidi@eecs.umich.edu 0x7F: FpBasic::fones({{Frds.uw = std::numeric_limits<uint32_t>::max();}}); 11612954Sgblack@eecs.umich.edu 0x80: Trap::shutdown({{fault = new IllegalInstruction;}}); 11623941Ssaidi@eecs.umich.edu 0x81: FailUnimpl::siam(); 11632954Sgblack@eecs.umich.edu } 11644090Ssaidi@eecs.umich.edu // M5 special opcodes use the reserved IMPDEP2A opcode space 11654090Ssaidi@eecs.umich.edu 0x37: decode M5FUNC { 11664096Sgblack@eecs.umich.edu#if FULL_SYSTEM 11674113Sgblack@eecs.umich.edu format BasicOperate { 11684113Sgblack@eecs.umich.edu // we have 7 bits of space here to play with... 11694113Sgblack@eecs.umich.edu 0x21: m5exit({{PseudoInst::m5exit(xc->tcBase(), O0); 11704113Sgblack@eecs.umich.edu }}, No_OpClass, IsNonSpeculative); 11714113Sgblack@eecs.umich.edu 0x50: m5readfile({{ 11724113Sgblack@eecs.umich.edu O0 = PseudoInst::readfile(xc->tcBase(), O0, O1, O2); 11734113Sgblack@eecs.umich.edu }}, IsNonSpeculative); 11744113Sgblack@eecs.umich.edu 0x51: m5break({{PseudoInst::debugbreak(xc->tcBase()); 11754113Sgblack@eecs.umich.edu }}, IsNonSpeculative); 11764113Sgblack@eecs.umich.edu 0x54: m5panic({{ 11774113Sgblack@eecs.umich.edu panic("M5 panic instruction called at pc=%#x.", xc->readPC()); 11784113Sgblack@eecs.umich.edu }}, No_OpClass, IsNonSpeculative); 11794113Sgblack@eecs.umich.edu } 11804096Sgblack@eecs.umich.edu#endif 11814096Sgblack@eecs.umich.edu default: Trap::impdep2({{fault = new IllegalInstruction;}}); 11824090Ssaidi@eecs.umich.edu } 11832526SN/A 0x38: Branch::jmpl({{ 11842526SN/A Addr target = Rs1 + Rs2_or_imm13; 11852526SN/A if(target & 0x3) 11862526SN/A fault = new MemAddressNotAligned; 11872526SN/A else 11882526SN/A { 11893928Ssaidi@eecs.umich.edu if (Pstate<3:>) 11903929Ssaidi@eecs.umich.edu Rd = (xc->readPC())<31:0>; 11913928Ssaidi@eecs.umich.edu else 11923928Ssaidi@eecs.umich.edu Rd = xc->readPC(); 11932526SN/A NNPC = target; 11942526SN/A } 11952526SN/A }}); 11962526SN/A 0x39: Branch::return({{ 11972526SN/A Addr target = Rs1 + Rs2_or_imm13; 11982561SN/A if(fault == NoFault) 11992561SN/A { 12003765Sgblack@eecs.umich.edu //Check for fills which are higher priority than alignment 12013765Sgblack@eecs.umich.edu //faults. 12022561SN/A if(Canrestore == 0) 12032561SN/A { 12042561SN/A if(Otherwin) 12053909Ssaidi@eecs.umich.edu fault = new FillNOther(4*Wstate<5:3>); 12062561SN/A else 12073909Ssaidi@eecs.umich.edu fault = new FillNNormal(4*Wstate<2:0>); 12082561SN/A } 12093765Sgblack@eecs.umich.edu //Check for alignment faults 12103765Sgblack@eecs.umich.edu else if(target & 0x3) 12113765Sgblack@eecs.umich.edu fault = new MemAddressNotAligned; 12122561SN/A else 12132561SN/A { 12143765Sgblack@eecs.umich.edu NNPC = target; 12153417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 12162561SN/A Cansave = Cansave + 1; 12172561SN/A Canrestore = Canrestore - 1; 12182561SN/A } 12192561SN/A } 12202526SN/A }}); 12212526SN/A 0x3A: decode CC 12222526SN/A { 12232526SN/A 0x0: Trap::tcci({{ 12242646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 12252561SN/A { 12262561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 12272561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 12283531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 12292561SN/A } 12303765Sgblack@eecs.umich.edu }}, IsSerializeAfter, IsNonSpeculative); 12312526SN/A 0x2: Trap::tccx({{ 12322646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND2)) 12332561SN/A { 12342561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 12352561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 12363531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 12372526SN/A } 12383765Sgblack@eecs.umich.edu }}, IsSerializeAfter, IsNonSpeculative); 12392526SN/A } 12404090Ssaidi@eecs.umich.edu 0x3B: Nop::flush({{/*Instruction memory flush*/}}, IsWriteBarrier, 12414090Ssaidi@eecs.umich.edu MemWriteOp); 12422526SN/A 0x3C: save({{ 12432526SN/A if(Cansave == 0) 12442526SN/A { 12452526SN/A if(Otherwin) 12463909Ssaidi@eecs.umich.edu fault = new SpillNOther(4*Wstate<5:3>); 12472526SN/A else 12483909Ssaidi@eecs.umich.edu fault = new SpillNNormal(4*Wstate<2:0>); 12492526SN/A } 12502526SN/A else if(Cleanwin - Canrestore == 0) 12512526SN/A { 12522526SN/A fault = new CleanWindow; 12532526SN/A } 12542526SN/A else 12552526SN/A { 12562526SN/A Cwp = (Cwp + 1) % NWindows; 12573765Sgblack@eecs.umich.edu Rd_next = Rs1 + Rs2_or_imm13; 12582561SN/A Cansave = Cansave - 1; 12592561SN/A Canrestore = Canrestore + 1; 12602526SN/A } 12612526SN/A }}); 12622526SN/A 0x3D: restore({{ 12632526SN/A if(Canrestore == 0) 12642526SN/A { 12652526SN/A if(Otherwin) 12663909Ssaidi@eecs.umich.edu fault = new FillNOther(4*Wstate<5:3>); 12672526SN/A else 12683909Ssaidi@eecs.umich.edu fault = new FillNNormal(4*Wstate<2:0>); 12692526SN/A } 12702526SN/A else 12712526SN/A { 12723417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 12733765Sgblack@eecs.umich.edu Rd_prev = Rs1 + Rs2_or_imm13; 12742561SN/A Cansave = Cansave + 1; 12752561SN/A Canrestore = Canrestore - 1; 12762526SN/A } 12772526SN/A }}); 12782526SN/A 0x3E: decode FCN { 12792526SN/A 0x0: Priv::done({{ 12802526SN/A if(Tl == 0) 12812526SN/A return new IllegalInstruction; 12822646Ssaidi@eecs.umich.edu 12832646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 12842646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 12852646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 12862646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 12872646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 12883825Ssaidi@eecs.umich.edu Hpstate = Htstate; 12892646Ssaidi@eecs.umich.edu NPC = Tnpc; 12902646Ssaidi@eecs.umich.edu NNPC = Tnpc + 4; 12912526SN/A Tl = Tl - 1; 12922526SN/A }}); 12932938Sgblack@eecs.umich.edu 0x1: Priv::retry({{ 12942526SN/A if(Tl == 0) 12952526SN/A return new IllegalInstruction; 12962646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 12972646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 12982646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 12992646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 13002646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 13013826Ssaidi@eecs.umich.edu Hpstate = Htstate; 13022646Ssaidi@eecs.umich.edu NPC = Tpc; 13033417Sgblack@eecs.umich.edu NNPC = Tnpc; 13042526SN/A Tl = Tl - 1; 13052526SN/A }}); 13062526SN/A } 13072526SN/A } 13082469SN/A } 13092469SN/A 0x3: decode OP3 { 13102526SN/A format Load { 13113272Sgblack@eecs.umich.edu 0x00: lduw({{Rd = Mem.uw;}}); 13123272Sgblack@eecs.umich.edu 0x01: ldub({{Rd = Mem.ub;}}); 13133272Sgblack@eecs.umich.edu 0x02: lduh({{Rd = Mem.uhw;}}); 13143835Sgblack@eecs.umich.edu 0x03: ldtw({{ 13154115Ssaidi@eecs.umich.edu RdLow = (Mem.tuw).a; 13164115Ssaidi@eecs.umich.edu RdHigh = (Mem.tuw).b; 13173272Sgblack@eecs.umich.edu }}); 13182526SN/A } 13192526SN/A format Store { 13203272Sgblack@eecs.umich.edu 0x04: stw({{Mem.uw = Rd.sw;}}); 13213272Sgblack@eecs.umich.edu 0x05: stb({{Mem.ub = Rd.sb;}}); 13223272Sgblack@eecs.umich.edu 0x06: sth({{Mem.uhw = Rd.shw;}}); 13234224Sgblack@eecs.umich.edu 0x07: sttw({{ 13244224Sgblack@eecs.umich.edu (Mem.tuw).a = RdLow<31:0>; 13254224Sgblack@eecs.umich.edu (Mem.tuw).b = RdHigh<31:0>; 13264224Sgblack@eecs.umich.edu }}); 13272526SN/A } 13282526SN/A format Load { 13293272Sgblack@eecs.umich.edu 0x08: ldsw({{Rd = (int32_t)Mem.sw;}}); 13303272Sgblack@eecs.umich.edu 0x09: ldsb({{Rd = (int8_t)Mem.sb;}}); 13313272Sgblack@eecs.umich.edu 0x0A: ldsh({{Rd = (int16_t)Mem.shw;}}); 13323272Sgblack@eecs.umich.edu 0x0B: ldx({{Rd = (int64_t)Mem.sdw;}}); 13332526SN/A } 13344040Ssaidi@eecs.umich.edu 0x0D: Swap::ldstub({{Mem.ub = 0xFF;}}, 13354040Ssaidi@eecs.umich.edu {{ 13364040Ssaidi@eecs.umich.edu uint8_t tmp = mem_data; 13374040Ssaidi@eecs.umich.edu Rd.ub = tmp; 13384040Ssaidi@eecs.umich.edu }}, MEM_SWAP); 13393272Sgblack@eecs.umich.edu 0x0E: Store::stx({{Mem.udw = Rd}}); 13404040Ssaidi@eecs.umich.edu 0x0F: Swap::swap({{Mem.uw = Rd.uw}}, 13414040Ssaidi@eecs.umich.edu {{ 13424040Ssaidi@eecs.umich.edu uint32_t tmp = mem_data; 13434040Ssaidi@eecs.umich.edu Rd.uw = tmp; 13444040Ssaidi@eecs.umich.edu }}, MEM_SWAP); 13453810Sgblack@eecs.umich.edu format LoadAlt { 13463810Sgblack@eecs.umich.edu 0x10: lduwa({{Rd = Mem.uw;}}, {{EXT_ASI}}); 13473810Sgblack@eecs.umich.edu 0x11: lduba({{Rd = Mem.ub;}}, {{EXT_ASI}}); 13483810Sgblack@eecs.umich.edu 0x12: lduha({{Rd = Mem.uhw;}}, {{EXT_ASI}}); 13493856Ssaidi@eecs.umich.edu 0x13: decode EXT_ASI { 13503926Ssaidi@eecs.umich.edu //ASI_LDTD_AIUP 13513926Ssaidi@eecs.umich.edu 0x22: TwinLoad::ldtx_aiup( 13524040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13534040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13543926Ssaidi@eecs.umich.edu //ASI_LDTD_AIUS 13553926Ssaidi@eecs.umich.edu 0x23: TwinLoad::ldtx_aius( 13564040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13574040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13583856Ssaidi@eecs.umich.edu //ASI_QUAD_LDD 13593856Ssaidi@eecs.umich.edu 0x24: TwinLoad::ldtx_quad_ldd( 13604040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13614040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13623856Ssaidi@eecs.umich.edu //ASI_LDTX_REAL 13633856Ssaidi@eecs.umich.edu 0x26: TwinLoad::ldtx_real( 13644040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13654040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13664040Ssaidi@eecs.umich.edu //ASI_LDTX_N 13674040Ssaidi@eecs.umich.edu 0x27: TwinLoad::ldtx_n( 13684040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13694040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13704040Ssaidi@eecs.umich.edu //ASI_LDTX_AIUP_L 13714040Ssaidi@eecs.umich.edu 0x2A: TwinLoad::ldtx_aiup_l( 13724040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13734040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13744040Ssaidi@eecs.umich.edu //ASI_LDTX_AIUS_L 13754040Ssaidi@eecs.umich.edu 0x2B: TwinLoad::ldtx_aius_l( 13764040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13774040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13784040Ssaidi@eecs.umich.edu //ASI_LDTX_L 13794040Ssaidi@eecs.umich.edu 0x2C: TwinLoad::ldtx_l( 13804040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13814040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13823856Ssaidi@eecs.umich.edu //ASI_LDTX_REAL_L 13833856Ssaidi@eecs.umich.edu 0x2E: TwinLoad::ldtx_real_l( 13844040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13854040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13863856Ssaidi@eecs.umich.edu //ASI_LDTX_N_L 13873856Ssaidi@eecs.umich.edu 0x2F: TwinLoad::ldtx_n_l( 13884040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13894040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13903901Ssaidi@eecs.umich.edu //ASI_LDTX_P 13913901Ssaidi@eecs.umich.edu 0xE2: TwinLoad::ldtx_p( 13924040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13934040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13943926Ssaidi@eecs.umich.edu //ASI_LDTX_S 13953926Ssaidi@eecs.umich.edu 0xE3: TwinLoad::ldtx_s( 13964040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 13974040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 13984040Ssaidi@eecs.umich.edu //ASI_LDTX_PL 13994040Ssaidi@eecs.umich.edu 0xEA: TwinLoad::ldtx_pl( 14004040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 14014040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 14024040Ssaidi@eecs.umich.edu //ASI_LDTX_SL 14034040Ssaidi@eecs.umich.edu 0xEB: TwinLoad::ldtx_sl( 14044040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 14054040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 14063856Ssaidi@eecs.umich.edu default: ldtwa({{ 14074115Ssaidi@eecs.umich.edu RdLow = (Mem.tuw).a; 14084115Ssaidi@eecs.umich.edu RdHigh = (Mem.tuw).b; 14093856Ssaidi@eecs.umich.edu }}, {{EXT_ASI}}); 14103856Ssaidi@eecs.umich.edu } 14112526SN/A } 14123810Sgblack@eecs.umich.edu format StoreAlt { 14133810Sgblack@eecs.umich.edu 0x14: stwa({{Mem.uw = Rd;}}, {{EXT_ASI}}); 14143810Sgblack@eecs.umich.edu 0x15: stba({{Mem.ub = Rd;}}, {{EXT_ASI}}); 14153810Sgblack@eecs.umich.edu 0x16: stha({{Mem.uhw = Rd;}}, {{EXT_ASI}}); 14164224Sgblack@eecs.umich.edu 0x17: sttwa({{ 14174224Sgblack@eecs.umich.edu (Mem.tuw).a = RdLow<31:0>; 14184224Sgblack@eecs.umich.edu (Mem.tuw).b = RdHigh<31:0>; 14194224Sgblack@eecs.umich.edu }}, {{EXT_ASI}}); 14202526SN/A } 14213810Sgblack@eecs.umich.edu format LoadAlt { 14223810Sgblack@eecs.umich.edu 0x18: ldswa({{Rd = (int32_t)Mem.sw;}}, {{EXT_ASI}}); 14233810Sgblack@eecs.umich.edu 0x19: ldsba({{Rd = (int8_t)Mem.sb;}}, {{EXT_ASI}}); 14243810Sgblack@eecs.umich.edu 0x1A: ldsha({{Rd = (int16_t)Mem.shw;}}, {{EXT_ASI}}); 14253810Sgblack@eecs.umich.edu 0x1B: ldxa({{Rd = (int64_t)Mem.sdw;}}, {{EXT_ASI}}); 14262526SN/A } 14274040Ssaidi@eecs.umich.edu 0x1D: SwapAlt::ldstuba({{Mem.ub = 0xFF;}}, 14284040Ssaidi@eecs.umich.edu {{ 14294040Ssaidi@eecs.umich.edu uint8_t tmp = mem_data; 14304040Ssaidi@eecs.umich.edu Rd.ub = tmp; 14314040Ssaidi@eecs.umich.edu }}, {{EXT_ASI}}, MEM_SWAP); 14323810Sgblack@eecs.umich.edu 0x1E: StoreAlt::stxa({{Mem.udw = Rd}}, {{EXT_ASI}}); 14334040Ssaidi@eecs.umich.edu 0x1F: SwapAlt::swapa({{Mem.uw = Rd.uw}}, 14344040Ssaidi@eecs.umich.edu {{ 14354040Ssaidi@eecs.umich.edu uint32_t tmp = mem_data; 14364040Ssaidi@eecs.umich.edu Rd.uw = tmp; 14374040Ssaidi@eecs.umich.edu }}, {{EXT_ASI}}, MEM_SWAP); 14384040Ssaidi@eecs.umich.edu 14392526SN/A format Trap { 14403931Ssaidi@eecs.umich.edu 0x20: Load::ldf({{Frds.uw = Mem.uw;}}); 14414008Ssaidi@eecs.umich.edu 0x21: decode RD { 14424011Ssaidi@eecs.umich.edu 0x0: Load::ldfsr({{fault = checkFpEnableFault(xc); 14434011Ssaidi@eecs.umich.edu if (fault) 14444011Ssaidi@eecs.umich.edu return fault; 14454011Ssaidi@eecs.umich.edu Fsr = Mem.uw | Fsr<63:32>;}}); 14464011Ssaidi@eecs.umich.edu 0x1: Load::ldxfsr({{fault = checkFpEnableFault(xc); 14474011Ssaidi@eecs.umich.edu if (fault) 14484011Ssaidi@eecs.umich.edu return fault; 14494011Ssaidi@eecs.umich.edu Fsr = Mem.udw;}}); 14504008Ssaidi@eecs.umich.edu default: FailUnimpl::ldfsrOther(); 14512469SN/A } 14522526SN/A 0x22: ldqf({{fault = new FpDisabled;}}); 14533272Sgblack@eecs.umich.edu 0x23: Load::lddf({{Frd.udw = Mem.udw;}}); 14543931Ssaidi@eecs.umich.edu 0x24: Store::stf({{Mem.uw = Frds.uw;}}); 14554008Ssaidi@eecs.umich.edu 0x25: decode RD { 14564011Ssaidi@eecs.umich.edu 0x0: Store::stfsr({{fault = checkFpEnableFault(xc); 14574011Ssaidi@eecs.umich.edu if (fault) 14584011Ssaidi@eecs.umich.edu return fault; 14594011Ssaidi@eecs.umich.edu Mem.uw = Fsr<31:0>; 14604008Ssaidi@eecs.umich.edu Fsr = insertBits(Fsr,16,14,0);}}); 14614011Ssaidi@eecs.umich.edu 0x1: Store::stxfsr({{fault = checkFpEnableFault(xc); 14624011Ssaidi@eecs.umich.edu if (fault) 14634011Ssaidi@eecs.umich.edu return fault; 14644011Ssaidi@eecs.umich.edu Mem.udw = Fsr; 14654011Ssaidi@eecs.umich.edu Fsr = insertBits(Fsr,16,14,0);}}); 14664008Ssaidi@eecs.umich.edu default: FailUnimpl::stfsrOther(); 14672526SN/A } 14682526SN/A 0x26: stqf({{fault = new FpDisabled;}}); 14693272Sgblack@eecs.umich.edu 0x27: Store::stdf({{Mem.udw = Frd.udw;}}); 14702526SN/A 0x2D: Nop::prefetch({{ }}); 14713931Ssaidi@eecs.umich.edu 0x30: LoadAlt::ldfa({{Frds.uw = Mem.uw;}}, {{EXT_ASI}}); 14722526SN/A 0x32: ldqfa({{fault = new FpDisabled;}}); 14733272Sgblack@eecs.umich.edu format LoadAlt { 14743272Sgblack@eecs.umich.edu 0x33: decode EXT_ASI { 14753272Sgblack@eecs.umich.edu //ASI_NUCLEUS 14763272Sgblack@eecs.umich.edu 0x04: FailUnimpl::lddfa_n(); 14773272Sgblack@eecs.umich.edu //ASI_NUCLEUS_LITTLE 14783272Sgblack@eecs.umich.edu 0x0C: FailUnimpl::lddfa_nl(); 14793272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY 14803272Sgblack@eecs.umich.edu 0x10: FailUnimpl::lddfa_aiup(); 14813272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY_LITTLE 14823272Sgblack@eecs.umich.edu 0x18: FailUnimpl::lddfa_aiupl(); 14833272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY 14843272Sgblack@eecs.umich.edu 0x11: FailUnimpl::lddfa_aius(); 14853272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY_LITTLE 14863272Sgblack@eecs.umich.edu 0x19: FailUnimpl::lddfa_aiusl(); 14873272Sgblack@eecs.umich.edu //ASI_REAL 14883272Sgblack@eecs.umich.edu 0x14: FailUnimpl::lddfa_real(); 14893272Sgblack@eecs.umich.edu //ASI_REAL_LITTLE 14903272Sgblack@eecs.umich.edu 0x1C: FailUnimpl::lddfa_real_l(); 14913272Sgblack@eecs.umich.edu //ASI_REAL_IO 14923272Sgblack@eecs.umich.edu 0x15: FailUnimpl::lddfa_real_io(); 14933272Sgblack@eecs.umich.edu //ASI_REAL_IO_LITTLE 14943272Sgblack@eecs.umich.edu 0x1D: FailUnimpl::lddfa_real_io_l(); 14953272Sgblack@eecs.umich.edu //ASI_PRIMARY 14963272Sgblack@eecs.umich.edu 0x80: FailUnimpl::lddfa_p(); 14973272Sgblack@eecs.umich.edu //ASI_PRIMARY_LITTLE 14983272Sgblack@eecs.umich.edu 0x88: FailUnimpl::lddfa_pl(); 14993272Sgblack@eecs.umich.edu //ASI_SECONDARY 15003272Sgblack@eecs.umich.edu 0x81: FailUnimpl::lddfa_s(); 15013272Sgblack@eecs.umich.edu //ASI_SECONDARY_LITTLE 15023272Sgblack@eecs.umich.edu 0x89: FailUnimpl::lddfa_sl(); 15033272Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT 15043272Sgblack@eecs.umich.edu 0x82: FailUnimpl::lddfa_pnf(); 15053272Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT_LITTLE 15063272Sgblack@eecs.umich.edu 0x8A: FailUnimpl::lddfa_pnfl(); 15073272Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT 15083272Sgblack@eecs.umich.edu 0x83: FailUnimpl::lddfa_snf(); 15093272Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT_LITTLE 15103272Sgblack@eecs.umich.edu 0x8B: FailUnimpl::lddfa_snfl(); 15113272Sgblack@eecs.umich.edu 15123272Sgblack@eecs.umich.edu format BlockLoad { 15133272Sgblack@eecs.umich.edu // LDBLOCKF 15143272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY 15153272Sgblack@eecs.umich.edu 0x16: FailUnimpl::ldblockf_aiup(); 15163272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY 15173272Sgblack@eecs.umich.edu 0x17: FailUnimpl::ldblockf_aius(); 15183272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 15193272Sgblack@eecs.umich.edu 0x1E: FailUnimpl::ldblockf_aiupl(); 15203272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 15213272Sgblack@eecs.umich.edu 0x1F: FailUnimpl::ldblockf_aiusl(); 15223272Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY 15233810Sgblack@eecs.umich.edu 0xF0: ldblockf_p({{Frd_N.udw = Mem.udw;}}, {{EXT_ASI}}); 15243272Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY 15253272Sgblack@eecs.umich.edu 0xF1: FailUnimpl::ldblockf_s(); 15263272Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY_LITTLE 15273272Sgblack@eecs.umich.edu 0xF8: FailUnimpl::ldblockf_pl(); 15283272Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY_LITTLE 15293272Sgblack@eecs.umich.edu 0xF9: FailUnimpl::ldblockf_sl(); 15303272Sgblack@eecs.umich.edu } 15313272Sgblack@eecs.umich.edu 15323272Sgblack@eecs.umich.edu //LDSHORTF 15333272Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY 15343272Sgblack@eecs.umich.edu 0xD0: FailUnimpl::ldshortf_8p(); 15353272Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY 15363272Sgblack@eecs.umich.edu 0xD1: FailUnimpl::ldshortf_8s(); 15373272Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY_LITTLE 15383272Sgblack@eecs.umich.edu 0xD8: FailUnimpl::ldshortf_8pl(); 15393272Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY_LITTLE 15403272Sgblack@eecs.umich.edu 0xD9: FailUnimpl::ldshortf_8sl(); 15413272Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY 15423272Sgblack@eecs.umich.edu 0xD2: FailUnimpl::ldshortf_16p(); 15433272Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY 15443272Sgblack@eecs.umich.edu 0xD3: FailUnimpl::ldshortf_16s(); 15453272Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY_LITTLE 15463272Sgblack@eecs.umich.edu 0xDA: FailUnimpl::ldshortf_16pl(); 15473272Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY_LITTLE 15483272Sgblack@eecs.umich.edu 0xDB: FailUnimpl::ldshortf_16sl(); 15493272Sgblack@eecs.umich.edu //Not an ASI which is legal with lddfa 15503378Sgblack@eecs.umich.edu default: Trap::lddfa_bad_asi( 15513378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 15523272Sgblack@eecs.umich.edu } 15533272Sgblack@eecs.umich.edu } 15543931Ssaidi@eecs.umich.edu 0x34: Store::stfa({{Mem.uw = Frds.uw;}}); 15552954Sgblack@eecs.umich.edu 0x36: stqfa({{fault = new FpDisabled;}}); 15563378Sgblack@eecs.umich.edu format StoreAlt { 15573378Sgblack@eecs.umich.edu 0x37: decode EXT_ASI { 15583378Sgblack@eecs.umich.edu //ASI_NUCLEUS 15593378Sgblack@eecs.umich.edu 0x04: FailUnimpl::stdfa_n(); 15603378Sgblack@eecs.umich.edu //ASI_NUCLEUS_LITTLE 15613378Sgblack@eecs.umich.edu 0x0C: FailUnimpl::stdfa_nl(); 15623378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY 15633378Sgblack@eecs.umich.edu 0x10: FailUnimpl::stdfa_aiup(); 15643378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY_LITTLE 15653378Sgblack@eecs.umich.edu 0x18: FailUnimpl::stdfa_aiupl(); 15663378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY 15673378Sgblack@eecs.umich.edu 0x11: FailUnimpl::stdfa_aius(); 15683378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY_LITTLE 15693378Sgblack@eecs.umich.edu 0x19: FailUnimpl::stdfa_aiusl(); 15703378Sgblack@eecs.umich.edu //ASI_REAL 15713378Sgblack@eecs.umich.edu 0x14: FailUnimpl::stdfa_real(); 15723378Sgblack@eecs.umich.edu //ASI_REAL_LITTLE 15733378Sgblack@eecs.umich.edu 0x1C: FailUnimpl::stdfa_real_l(); 15743378Sgblack@eecs.umich.edu //ASI_REAL_IO 15753378Sgblack@eecs.umich.edu 0x15: FailUnimpl::stdfa_real_io(); 15763378Sgblack@eecs.umich.edu //ASI_REAL_IO_LITTLE 15773378Sgblack@eecs.umich.edu 0x1D: FailUnimpl::stdfa_real_io_l(); 15783378Sgblack@eecs.umich.edu //ASI_PRIMARY 15793378Sgblack@eecs.umich.edu 0x80: FailUnimpl::stdfa_p(); 15803378Sgblack@eecs.umich.edu //ASI_PRIMARY_LITTLE 15813378Sgblack@eecs.umich.edu 0x88: FailUnimpl::stdfa_pl(); 15823378Sgblack@eecs.umich.edu //ASI_SECONDARY 15833378Sgblack@eecs.umich.edu 0x81: FailUnimpl::stdfa_s(); 15843378Sgblack@eecs.umich.edu //ASI_SECONDARY_LITTLE 15853378Sgblack@eecs.umich.edu 0x89: FailUnimpl::stdfa_sl(); 15863378Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT 15873378Sgblack@eecs.umich.edu 0x82: FailUnimpl::stdfa_pnf(); 15883378Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT_LITTLE 15893378Sgblack@eecs.umich.edu 0x8A: FailUnimpl::stdfa_pnfl(); 15903378Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT 15913378Sgblack@eecs.umich.edu 0x83: FailUnimpl::stdfa_snf(); 15923378Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT_LITTLE 15933378Sgblack@eecs.umich.edu 0x8B: FailUnimpl::stdfa_snfl(); 15943378Sgblack@eecs.umich.edu 15953378Sgblack@eecs.umich.edu format BlockStore { 15963378Sgblack@eecs.umich.edu // STBLOCKF 15973378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY 15983378Sgblack@eecs.umich.edu 0x16: FailUnimpl::stblockf_aiup(); 15993378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY 16003378Sgblack@eecs.umich.edu 0x17: FailUnimpl::stblockf_aius(); 16013378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 16023378Sgblack@eecs.umich.edu 0x1E: FailUnimpl::stblockf_aiupl(); 16033378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 16043378Sgblack@eecs.umich.edu 0x1F: FailUnimpl::stblockf_aiusl(); 16053378Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY 16063810Sgblack@eecs.umich.edu 0xF0: stblockf_p({{Mem.udw = Frd_N.udw;}}, {{EXT_ASI}}); 16073378Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY 16083378Sgblack@eecs.umich.edu 0xF1: FailUnimpl::stblockf_s(); 16093378Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY_LITTLE 16103378Sgblack@eecs.umich.edu 0xF8: FailUnimpl::stblockf_pl(); 16113378Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY_LITTLE 16123378Sgblack@eecs.umich.edu 0xF9: FailUnimpl::stblockf_sl(); 16133378Sgblack@eecs.umich.edu } 16143378Sgblack@eecs.umich.edu 16153378Sgblack@eecs.umich.edu //STSHORTF 16163378Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY 16173378Sgblack@eecs.umich.edu 0xD0: FailUnimpl::stshortf_8p(); 16183378Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY 16193378Sgblack@eecs.umich.edu 0xD1: FailUnimpl::stshortf_8s(); 16203378Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY_LITTLE 16213378Sgblack@eecs.umich.edu 0xD8: FailUnimpl::stshortf_8pl(); 16223378Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY_LITTLE 16233378Sgblack@eecs.umich.edu 0xD9: FailUnimpl::stshortf_8sl(); 16243378Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY 16253378Sgblack@eecs.umich.edu 0xD2: FailUnimpl::stshortf_16p(); 16263378Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY 16273378Sgblack@eecs.umich.edu 0xD3: FailUnimpl::stshortf_16s(); 16283378Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY_LITTLE 16293378Sgblack@eecs.umich.edu 0xDA: FailUnimpl::stshortf_16pl(); 16303378Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY_LITTLE 16313378Sgblack@eecs.umich.edu 0xDB: FailUnimpl::stshortf_16sl(); 16323378Sgblack@eecs.umich.edu //Not an ASI which is legal with lddfa 16333378Sgblack@eecs.umich.edu default: Trap::stdfa_bad_asi( 16343378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 16353378Sgblack@eecs.umich.edu } 16363378Sgblack@eecs.umich.edu } 16374040Ssaidi@eecs.umich.edu 0x3C: CasAlt::casa({{ 16384040Ssaidi@eecs.umich.edu mem_data = htog(Rs2.uw); 16394040Ssaidi@eecs.umich.edu Mem.uw = Rd.uw;}}, 16404040Ssaidi@eecs.umich.edu {{ 16414040Ssaidi@eecs.umich.edu uint32_t tmp = mem_data; 16424040Ssaidi@eecs.umich.edu Rd.uw = tmp; 16434040Ssaidi@eecs.umich.edu }}, {{EXT_ASI}}, MEM_SWAP_COND); 16442526SN/A 0x3D: Nop::prefetcha({{ }}); 16454040Ssaidi@eecs.umich.edu 0x3E: CasAlt::casxa({{mem_data = gtoh(Rs2); 16464040Ssaidi@eecs.umich.edu Mem.udw = Rd.udw; }}, 16474040Ssaidi@eecs.umich.edu {{ Rd.udw = mem_data; }}, {{EXT_ASI}}, MEM_SWAP_COND); 16482526SN/A } 16492469SN/A } 16502022SN/A} 1651