decoder.isa revision 4113
13900Ssaidi@eecs.umich.edu// Copyright (c) 2006-2007 The Regents of The University of Michigan 22632Sstever@eecs.umich.edu// All rights reserved. 32632Sstever@eecs.umich.edu// 42632Sstever@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 52632Sstever@eecs.umich.edu// modification, are permitted provided that the following conditions are 62632Sstever@eecs.umich.edu// met: redistributions of source code must retain the above copyright 72632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 82632Sstever@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 92632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 102632Sstever@eecs.umich.edu// documentation and/or other materials provided with the distribution; 112632Sstever@eecs.umich.edu// neither the name of the copyright holders nor the names of its 122632Sstever@eecs.umich.edu// contributors may be used to endorse or promote products derived from 132632Sstever@eecs.umich.edu// this software without specific prior written permission. 142632Sstever@eecs.umich.edu// 152632Sstever@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 162632Sstever@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 172632Sstever@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 182632Sstever@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 192632Sstever@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 202632Sstever@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 212632Sstever@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 222632Sstever@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 232632Sstever@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 242632Sstever@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 252632Sstever@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 262632Sstever@eecs.umich.edu// 272632Sstever@eecs.umich.edu// Authors: Ali Saidi 282632Sstever@eecs.umich.edu// Gabe Black 292632Sstever@eecs.umich.edu// Steve Reinhardt 302632Sstever@eecs.umich.edu 312022SN/A//////////////////////////////////////////////////////////////////// 322022SN/A// 332022SN/A// The actual decoder specification 342022SN/A// 352022SN/A 362469SN/Adecode OP default Unknown::unknown() 372469SN/A{ 382469SN/A 0x0: decode OP2 392469SN/A { 402516SN/A //Throw an illegal instruction acception 412516SN/A 0x0: Trap::illtrap({{fault = new IllegalInstruction;}}); 422944Sgblack@eecs.umich.edu format BranchN 432482SN/A { 443598Sgblack@eecs.umich.edu //bpcc 453056Sgblack@eecs.umich.edu 0x1: decode COND2 462469SN/A { 473056Sgblack@eecs.umich.edu //Branch Always 483056Sgblack@eecs.umich.edu 0x8: decode A 493056Sgblack@eecs.umich.edu { 503598Sgblack@eecs.umich.edu 0x0: bpa(19, {{ 512516SN/A NNPC = xc->readPC() + disp; 523056Sgblack@eecs.umich.edu }}); 533598Sgblack@eecs.umich.edu 0x1: bpa(19, {{ 543056Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 553056Sgblack@eecs.umich.edu NNPC = NPC + 4; 563056Sgblack@eecs.umich.edu }}, ',a'); 573056Sgblack@eecs.umich.edu } 583056Sgblack@eecs.umich.edu //Branch Never 593056Sgblack@eecs.umich.edu 0x0: decode A 603056Sgblack@eecs.umich.edu { 613598Sgblack@eecs.umich.edu 0x0: bpn(19, {{ 623056Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 633056Sgblack@eecs.umich.edu }}); 643598Sgblack@eecs.umich.edu 0x1: bpn(19, {{ 654004Sgblack@eecs.umich.edu NNPC = NPC + 8; 664004Sgblack@eecs.umich.edu NPC = NPC + 4; 673056Sgblack@eecs.umich.edu }}, ',a'); 683056Sgblack@eecs.umich.edu } 693056Sgblack@eecs.umich.edu default: decode BPCC 703056Sgblack@eecs.umich.edu { 713056Sgblack@eecs.umich.edu 0x0: bpcci(19, {{ 723056Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 733056Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 743056Sgblack@eecs.umich.edu else 753056Sgblack@eecs.umich.edu handle_annul 763056Sgblack@eecs.umich.edu }}); 773056Sgblack@eecs.umich.edu 0x2: bpccx(19, {{ 783056Sgblack@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND2)) 793056Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 803056Sgblack@eecs.umich.edu else 813056Sgblack@eecs.umich.edu handle_annul 823056Sgblack@eecs.umich.edu }}); 833056Sgblack@eecs.umich.edu } 842482SN/A } 853598Sgblack@eecs.umich.edu //bicc 863598Sgblack@eecs.umich.edu 0x2: decode COND2 873598Sgblack@eecs.umich.edu { 883598Sgblack@eecs.umich.edu //Branch Always 893598Sgblack@eecs.umich.edu 0x8: decode A 903598Sgblack@eecs.umich.edu { 913598Sgblack@eecs.umich.edu 0x0: ba(22, {{ 923598Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 933598Sgblack@eecs.umich.edu }}); 943598Sgblack@eecs.umich.edu 0x1: ba(22, {{ 953598Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 963598Sgblack@eecs.umich.edu NNPC = NPC + 4; 973598Sgblack@eecs.umich.edu }}, ',a'); 983598Sgblack@eecs.umich.edu } 993598Sgblack@eecs.umich.edu //Branch Never 1003598Sgblack@eecs.umich.edu 0x0: decode A 1013598Sgblack@eecs.umich.edu { 1023598Sgblack@eecs.umich.edu 0x0: bn(22, {{ 1033598Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 1043598Sgblack@eecs.umich.edu }}); 1053598Sgblack@eecs.umich.edu 0x1: bn(22, {{ 1064004Sgblack@eecs.umich.edu NNPC = NPC + 8; 1074004Sgblack@eecs.umich.edu NPC = NPC + 4; 1083598Sgblack@eecs.umich.edu }}, ',a'); 1093598Sgblack@eecs.umich.edu } 1103598Sgblack@eecs.umich.edu default: bicc(22, {{ 1113598Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 1123598Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 1133598Sgblack@eecs.umich.edu else 1143598Sgblack@eecs.umich.edu handle_annul 1153598Sgblack@eecs.umich.edu }}); 1163598Sgblack@eecs.umich.edu } 1172516SN/A } 1182516SN/A 0x3: decode RCOND2 1192516SN/A { 1202516SN/A format BranchSplit 1212482SN/A { 1222482SN/A 0x1: bpreq({{ 1232591SN/A if(Rs1.sdw == 0) 1242516SN/A NNPC = xc->readPC() + disp; 1252580SN/A else 1262580SN/A handle_annul 1272482SN/A }}); 1282482SN/A 0x2: bprle({{ 1292591SN/A if(Rs1.sdw <= 0) 1302516SN/A NNPC = xc->readPC() + disp; 1312580SN/A else 1322580SN/A handle_annul 1332482SN/A }}); 1342482SN/A 0x3: bprl({{ 1352591SN/A if(Rs1.sdw < 0) 1362516SN/A NNPC = xc->readPC() + disp; 1372580SN/A else 1382580SN/A handle_annul 1392482SN/A }}); 1402482SN/A 0x5: bprne({{ 1412591SN/A if(Rs1.sdw != 0) 1422516SN/A NNPC = xc->readPC() + disp; 1432580SN/A else 1442580SN/A handle_annul 1452482SN/A }}); 1462482SN/A 0x6: bprg({{ 1472591SN/A if(Rs1.sdw > 0) 1482516SN/A NNPC = xc->readPC() + disp; 1492580SN/A else 1502580SN/A handle_annul 1512482SN/A }}); 1522482SN/A 0x7: bprge({{ 1532591SN/A if(Rs1.sdw >= 0) 1542516SN/A NNPC = xc->readPC() + disp; 1552580SN/A else 1562580SN/A handle_annul 1572482SN/A }}); 1582469SN/A } 1592482SN/A } 1602516SN/A //SETHI (or NOP if rd == 0 and imm == 0) 1613042Sgblack@eecs.umich.edu 0x4: SetHi::sethi({{Rd.udw = imm;}}); 1624004Sgblack@eecs.umich.edu //fbpfcc 1634004Sgblack@eecs.umich.edu 0x5: decode COND2 { 1644004Sgblack@eecs.umich.edu format BranchN { 1654004Sgblack@eecs.umich.edu //Branch Always 1664004Sgblack@eecs.umich.edu 0x8: decode A 1674004Sgblack@eecs.umich.edu { 1684004Sgblack@eecs.umich.edu 0x0: fbpa(22, {{ 1694004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 1704004Sgblack@eecs.umich.edu }}); 1714004Sgblack@eecs.umich.edu 0x1: fbpa(22, {{ 1724004Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 1734004Sgblack@eecs.umich.edu NNPC = NPC + 4; 1744004Sgblack@eecs.umich.edu }}, ',a'); 1754004Sgblack@eecs.umich.edu } 1764004Sgblack@eecs.umich.edu //Branch Never 1774004Sgblack@eecs.umich.edu 0x0: decode A 1784004Sgblack@eecs.umich.edu { 1794004Sgblack@eecs.umich.edu 0x0: fbpn(22, {{ 1804004Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 1814004Sgblack@eecs.umich.edu }}); 1824004Sgblack@eecs.umich.edu 0x1: fbpn(22, {{ 1834004Sgblack@eecs.umich.edu NNPC = NPC + 8; 1844004Sgblack@eecs.umich.edu NPC = NPC + 4; 1854004Sgblack@eecs.umich.edu }}, ',a'); 1864004Sgblack@eecs.umich.edu } 1874004Sgblack@eecs.umich.edu default: decode BPCC { 1884004Sgblack@eecs.umich.edu 0x0: fbpcc0(22, {{ 1894004Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<11:10>, COND2)) 1904004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 1914004Sgblack@eecs.umich.edu else 1924004Sgblack@eecs.umich.edu handle_annul 1934004Sgblack@eecs.umich.edu }}); 1944004Sgblack@eecs.umich.edu 0x1: fbpcc1(22, {{ 1954004Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<33:32>, COND2)) 1964004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 1974004Sgblack@eecs.umich.edu else 1984004Sgblack@eecs.umich.edu handle_annul 1994004Sgblack@eecs.umich.edu }}); 2004004Sgblack@eecs.umich.edu 0x2: fbpcc2(22, {{ 2014004Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<35:34>, COND2)) 2024004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 2034004Sgblack@eecs.umich.edu else 2044004Sgblack@eecs.umich.edu handle_annul 2054004Sgblack@eecs.umich.edu }}); 2064004Sgblack@eecs.umich.edu 0x3: fbpcc3(22, {{ 2074004Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<37:36>, COND2)) 2084004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 2094004Sgblack@eecs.umich.edu else 2104004Sgblack@eecs.umich.edu handle_annul 2114004Sgblack@eecs.umich.edu }}); 2124004Sgblack@eecs.umich.edu } 2134004Sgblack@eecs.umich.edu } 2144004Sgblack@eecs.umich.edu } 2154004Sgblack@eecs.umich.edu //fbfcc 2164004Sgblack@eecs.umich.edu 0x6: decode COND2 { 2174004Sgblack@eecs.umich.edu format BranchN { 2184004Sgblack@eecs.umich.edu //Branch Always 2194004Sgblack@eecs.umich.edu 0x8: decode A 2204004Sgblack@eecs.umich.edu { 2214004Sgblack@eecs.umich.edu 0x0: fba(22, {{ 2224004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 2234004Sgblack@eecs.umich.edu }}); 2244004Sgblack@eecs.umich.edu 0x1: fba(22, {{ 2254004Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 2264004Sgblack@eecs.umich.edu NNPC = NPC + 4; 2274004Sgblack@eecs.umich.edu }}, ',a'); 2284004Sgblack@eecs.umich.edu } 2294004Sgblack@eecs.umich.edu //Branch Never 2304004Sgblack@eecs.umich.edu 0x0: decode A 2314004Sgblack@eecs.umich.edu { 2324004Sgblack@eecs.umich.edu 0x0: fbn(22, {{ 2334004Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 2344004Sgblack@eecs.umich.edu }}); 2354004Sgblack@eecs.umich.edu 0x1: fbn(22, {{ 2364004Sgblack@eecs.umich.edu NNPC = NPC + 8; 2374004Sgblack@eecs.umich.edu NPC = NPC + 4; 2384004Sgblack@eecs.umich.edu }}, ',a'); 2394004Sgblack@eecs.umich.edu } 2404004Sgblack@eecs.umich.edu default: fbfcc(22, {{ 2414004Sgblack@eecs.umich.edu if(passesFpCondition(Fsr<11:10>, COND2)) 2424004Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 2434004Sgblack@eecs.umich.edu else 2444004Sgblack@eecs.umich.edu handle_annul 2454004Sgblack@eecs.umich.edu }}); 2464004Sgblack@eecs.umich.edu } 2474004Sgblack@eecs.umich.edu } 2482469SN/A } 2492944Sgblack@eecs.umich.edu 0x1: BranchN::call(30, {{ 2503928Ssaidi@eecs.umich.edu if (Pstate<3:>) 2513928Ssaidi@eecs.umich.edu R15 = (xc->readPC())<31:0>; 2523928Ssaidi@eecs.umich.edu else 2533928Ssaidi@eecs.umich.edu R15 = xc->readPC(); 2542516SN/A NNPC = R15 + disp; 2552469SN/A }}); 2562469SN/A 0x2: decode OP3 { 2572482SN/A format IntOp { 2582482SN/A 0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}}); 2592974Sgblack@eecs.umich.edu 0x01: and({{Rd = Rs1.sdw & Rs2_or_imm13;}}); 2602974Sgblack@eecs.umich.edu 0x02: or({{Rd = Rs1.sdw | Rs2_or_imm13;}}); 2612974Sgblack@eecs.umich.edu 0x03: xor({{Rd = Rs1.sdw ^ Rs2_or_imm13;}}); 2622526SN/A 0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}}); 2632974Sgblack@eecs.umich.edu 0x05: andn({{Rd = Rs1.sdw & ~Rs2_or_imm13;}}); 2642974Sgblack@eecs.umich.edu 0x06: orn({{Rd = Rs1.sdw | ~Rs2_or_imm13;}}); 2652974Sgblack@eecs.umich.edu 0x07: xnor({{Rd = ~(Rs1.sdw ^ Rs2_or_imm13);}}); 2662646Ssaidi@eecs.umich.edu 0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + Ccr<0:0>;}}); 2672974Sgblack@eecs.umich.edu 0x09: mulx({{Rd = Rs1.sdw * Rs2_or_imm13;}}); 2682469SN/A 0x0A: umul({{ 2692516SN/A Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>; 2702646Ssaidi@eecs.umich.edu Y = Rd<63:32>; 2712482SN/A }}); 2722469SN/A 0x0B: smul({{ 2733931Ssaidi@eecs.umich.edu Rd.sdw = sext<32>(Rs1.sdw<31:0>) * sext<32>(Rs2_or_imm13<31:0>); 2743900Ssaidi@eecs.umich.edu Y = Rd.sdw<63:32>; 2752482SN/A }}); 2762954Sgblack@eecs.umich.edu 0x0C: subc({{Rd.sdw = Rs1.sdw + (~Rs2_or_imm13) + 1 - Ccr<0:0>}}); 2772469SN/A 0x0D: udivx({{ 2782516SN/A if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 2792516SN/A else Rd.udw = Rs1.udw / Rs2_or_imm13; 2802482SN/A }}); 2812469SN/A 0x0E: udiv({{ 2822516SN/A if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 2832482SN/A else 2842482SN/A { 2852646Ssaidi@eecs.umich.edu Rd.udw = ((Y << 32) | Rs1.udw<31:0>) / Rs2_or_imm13; 2862482SN/A if(Rd.udw >> 32 != 0) 2872482SN/A Rd.udw = 0xFFFFFFFF; 2882482SN/A } 2892482SN/A }}); 2902482SN/A 0x0F: sdiv({{ 2912615SN/A if(Rs2_or_imm13.sdw == 0) 2922469SN/A fault = new DivisionByZero; 2932469SN/A else 2942482SN/A { 2952646Ssaidi@eecs.umich.edu Rd.udw = ((int64_t)((Y << 32) | Rs1.sdw<31:0>)) / Rs2_or_imm13.sdw; 2963929Ssaidi@eecs.umich.edu if((int64_t)Rd.udw >= std::numeric_limits<int32_t>::max()) 2972482SN/A Rd.udw = 0x7FFFFFFF; 2983929Ssaidi@eecs.umich.edu else if((int64_t)Rd.udw <= std::numeric_limits<int32_t>::min()) 2993929Ssaidi@eecs.umich.edu Rd.udw = ULL(0xFFFFFFFF80000000); 3002482SN/A } 3012526SN/A }}); 3022469SN/A } 3032482SN/A format IntOpCc { 3042469SN/A 0x10: addcc({{ 3052516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3062469SN/A Rd = resTemp = Rs1 + val2;}}, 3072580SN/A {{(Rs1<31:0> + val2<31:0>)<32:>}}, 3082469SN/A {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 3092580SN/A {{(Rs1<63:1> + val2<63:1> + (Rs1 & val2)<0:>)<63:>}}, 3102469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3112526SN/A ); 3122482SN/A 0x11: IntOpCcRes::andcc({{Rd = Rs1 & Rs2_or_imm13;}}); 3132482SN/A 0x12: IntOpCcRes::orcc({{Rd = Rs1 | Rs2_or_imm13;}}); 3142482SN/A 0x13: IntOpCcRes::xorcc({{Rd = Rs1 ^ Rs2_or_imm13;}}); 3152469SN/A 0x14: subcc({{ 3162580SN/A int64_t val2 = Rs2_or_imm13; 3172580SN/A Rd = Rs1 - val2;}}, 3182580SN/A {{(~(Rs1<31:0> + (~val2)<31:0> + 1))<32:>}}, 3192580SN/A {{(Rs1<31:> != val2<31:>) && (Rs1<31:> != Rd<31:>)}}, 3202580SN/A {{(~(Rs1<63:1> + (~val2)<63:1> + 3212580SN/A (Rs1 | ~val2)<0:>))<63:>}}, 3222580SN/A {{Rs1<63:> != val2<63:> && Rs1<63:> != Rd<63:>}} 3232526SN/A ); 3242482SN/A 0x15: IntOpCcRes::andncc({{Rd = Rs1 & ~Rs2_or_imm13;}}); 3252482SN/A 0x16: IntOpCcRes::orncc({{Rd = Rs1 | ~Rs2_or_imm13;}}); 3262482SN/A 0x17: IntOpCcRes::xnorcc({{Rd = ~(Rs1 ^ Rs2_or_imm13);}}); 3272469SN/A 0x18: addccc({{ 3282516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3292646Ssaidi@eecs.umich.edu int64_t carryin = Ccr<0:0>; 3302469SN/A Rd = resTemp = Rs1 + val2 + carryin;}}, 3312580SN/A {{(Rs1<31:0> + val2<31:0> + carryin)<32:>}}, 3322469SN/A {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 3333931Ssaidi@eecs.umich.edu {{((Rs1 & val2) | (~resTemp & (Rs1 | val2)))<63:>}}, 3342469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3352526SN/A ); 3363765Sgblack@eecs.umich.edu 0x1A: IntOpCcRes::umulcc({{ 3372615SN/A uint64_t resTemp; 3382615SN/A Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>; 3393765Sgblack@eecs.umich.edu Y = resTemp<63:32>;}}); 3403765Sgblack@eecs.umich.edu 0x1B: IntOpCcRes::smulcc({{ 3412615SN/A int64_t resTemp; 3423931Ssaidi@eecs.umich.edu Rd = resTemp = sext<32>(Rs1.sdw<31:0>) * sext<32>(Rs2_or_imm13<31:0>); 3433765Sgblack@eecs.umich.edu Y = resTemp<63:32>;}}); 3442469SN/A 0x1C: subccc({{ 3452516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3462646Ssaidi@eecs.umich.edu int64_t carryin = Ccr<0:0>; 3472954Sgblack@eecs.umich.edu Rd = resTemp = Rs1 + ~val2 + 1 - carryin;}}, 3483931Ssaidi@eecs.umich.edu {{((~Rs1 & val2) | (resTemp & (~Rs1 | val2)))<31:>}}, 3492469SN/A {{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}}, 3503931Ssaidi@eecs.umich.edu {{((~Rs1 & val2) | (resTemp & (~Rs1 | val2)))<63:>}}, 3512469SN/A {{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}} 3522526SN/A ); 3533765Sgblack@eecs.umich.edu 0x1D: IntOpCcRes::udivxcc({{ 3542615SN/A if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero; 3553765Sgblack@eecs.umich.edu else Rd = Rs1.udw / Rs2_or_imm13.udw;}}); 3562469SN/A 0x1E: udivcc({{ 3572615SN/A uint32_t resTemp, val2 = Rs2_or_imm13.udw; 3582989Ssaidi@eecs.umich.edu int32_t overflow = 0; 3592469SN/A if(val2 == 0) fault = new DivisionByZero; 3602469SN/A else 3612224SN/A { 3622646Ssaidi@eecs.umich.edu resTemp = (uint64_t)((Y << 32) | Rs1.udw<31:0>) / val2; 3632516SN/A overflow = (resTemp<63:32> != 0); 3642516SN/A if(overflow) Rd = resTemp = 0xFFFFFFFF; 3652516SN/A else Rd = resTemp; 3662469SN/A } }}, 3672469SN/A {{0}}, 3682469SN/A {{overflow}}, 3692469SN/A {{0}}, 3702469SN/A {{0}} 3712526SN/A ); 3722469SN/A 0x1F: sdivcc({{ 3732996Sgblack@eecs.umich.edu int64_t val2 = Rs2_or_imm13.sdw<31:0>; 3742996Sgblack@eecs.umich.edu bool overflow = false, underflow = false; 3752469SN/A if(val2 == 0) fault = new DivisionByZero; 3762469SN/A else 3772469SN/A { 3782996Sgblack@eecs.umich.edu Rd = (int64_t)((Y << 32) | Rs1.sdw<31:0>) / val2; 3793929Ssaidi@eecs.umich.edu overflow = ((int64_t)Rd >= std::numeric_limits<int32_t>::max()); 3803929Ssaidi@eecs.umich.edu underflow = ((int64_t)Rd <= std::numeric_limits<int32_t>::min()); 3812996Sgblack@eecs.umich.edu if(overflow) Rd = 0x7FFFFFFF; 3823929Ssaidi@eecs.umich.edu else if(underflow) Rd = ULL(0xFFFFFFFF80000000); 3832469SN/A } }}, 3842469SN/A {{0}}, 3852469SN/A {{overflow || underflow}}, 3862469SN/A {{0}}, 3872469SN/A {{0}} 3882526SN/A ); 3892469SN/A 0x20: taddcc({{ 3902516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3912469SN/A Rd = resTemp = Rs1 + val2; 3922469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}}, 3933753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 3942469SN/A {{overflow}}, 3952469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3962469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3972526SN/A ); 3982469SN/A 0x21: tsubcc({{ 3992516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 4002469SN/A Rd = resTemp = Rs1 + val2; 4012469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}}, 4023753Sgblack@eecs.umich.edu {{(Rs1<31:0> + val2<31:0>)<32:0>}}, 4032469SN/A {{overflow}}, 4042469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 4052469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 4062526SN/A ); 4072469SN/A 0x22: taddcctv({{ 4082996Sgblack@eecs.umich.edu int64_t val2 = Rs2_or_imm13; 4092996Sgblack@eecs.umich.edu Rd = Rs1 + val2; 4102954Sgblack@eecs.umich.edu int32_t overflow = Rs1<1:0> || val2<1:0> || 4112954Sgblack@eecs.umich.edu (Rs1<31:> == val2<31:> && val2<31:> != Rd<31:>); 4122469SN/A if(overflow) fault = new TagOverflow;}}, 4133753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 4142469SN/A {{overflow}}, 4152469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 4162996Sgblack@eecs.umich.edu {{Rs1<63:> == val2<63:> && val2<63:> != Rd<63:>}} 4172526SN/A ); 4182469SN/A 0x23: tsubcctv({{ 4192516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 4202469SN/A Rd = resTemp = Rs1 + val2; 4212469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>); 4222469SN/A if(overflow) fault = new TagOverflow;}}, 4233753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 4242469SN/A {{overflow}}, 4252469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 4262469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 4272526SN/A ); 4282469SN/A 0x24: mulscc({{ 4292516SN/A int64_t resTemp, multiplicand = Rs2_or_imm13; 4302469SN/A int32_t multiplier = Rs1<31:0>; 4312469SN/A int32_t savedLSB = Rs1<0:>; 4322516SN/A multiplier = multiplier<31:1> | 4333753Sgblack@eecs.umich.edu ((Ccr<3:3> ^ Ccr<1:1>) << 32); 4342646Ssaidi@eecs.umich.edu if(!Y<0:>) 4352469SN/A multiplicand = 0; 4362469SN/A Rd = resTemp = multiplicand + multiplier; 4372646Ssaidi@eecs.umich.edu Y = Y<31:1> | (savedLSB << 31);}}, 4383753Sgblack@eecs.umich.edu {{((multiplicand<31:0> + multiplier<31:0>)<32:0>)}}, 4392469SN/A {{multiplicand<31:> == multiplier<31:> && multiplier<31:> != resTemp<31:>}}, 4402469SN/A {{((multiplicand >> 1) + (multiplier >> 1) + (multiplicand & multiplier & 0x1))<63:>}}, 4412469SN/A {{multiplicand<63:> == multiplier<63:> && multiplier<63:> != resTemp<63:>}} 4422526SN/A ); 4432526SN/A } 4442526SN/A format IntOp 4452526SN/A { 4462526SN/A 0x25: decode X { 4472526SN/A 0x0: sll({{Rd = Rs1 << (I ? SHCNT32 : Rs2<4:0>);}}); 4482526SN/A 0x1: sllx({{Rd = Rs1 << (I ? SHCNT64 : Rs2<5:0>);}}); 4492469SN/A } 4502526SN/A 0x26: decode X { 4512526SN/A 0x0: srl({{Rd = Rs1.uw >> (I ? SHCNT32 : Rs2<4:0>);}}); 4522526SN/A 0x1: srlx({{Rd = Rs1.udw >> (I ? SHCNT64 : Rs2<5:0>);}}); 4532526SN/A } 4542526SN/A 0x27: decode X { 4552526SN/A 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}}); 4562526SN/A 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}}); 4572526SN/A } 4582954Sgblack@eecs.umich.edu 0x28: decode RS1 { 4593929Ssaidi@eecs.umich.edu 0x00: NoPriv::rdy({{Rd = Y<31:0>;}}); 4603587Sgblack@eecs.umich.edu //1 should cause an illegal instruction exception 4613587Sgblack@eecs.umich.edu 0x02: NoPriv::rdccr({{Rd = Ccr;}}); 4623587Sgblack@eecs.umich.edu 0x03: NoPriv::rdasi({{Rd = Asi;}}); 4633823Ssaidi@eecs.umich.edu 0x04: PrivCheck::rdtick({{Rd = Tick;}}, {{Tick<63:>}}); 4643587Sgblack@eecs.umich.edu 0x05: NoPriv::rdpc({{ 4653587Sgblack@eecs.umich.edu if(Pstate<3:>) 4663587Sgblack@eecs.umich.edu Rd = (xc->readPC())<31:0>; 4673587Sgblack@eecs.umich.edu else 4683587Sgblack@eecs.umich.edu Rd = xc->readPC();}}); 4693587Sgblack@eecs.umich.edu 0x06: NoPriv::rdfprs({{ 4703587Sgblack@eecs.umich.edu //Wait for all fpops to finish. 4713587Sgblack@eecs.umich.edu Rd = Fprs; 4723587Sgblack@eecs.umich.edu }}); 4733587Sgblack@eecs.umich.edu //7-14 should cause an illegal instruction exception 4743587Sgblack@eecs.umich.edu 0x0F: decode I { 4754040Ssaidi@eecs.umich.edu 0x0: Nop::stbar({{/*stuff*/}}, IsWriteBarrier, MemWriteOp); 4764040Ssaidi@eecs.umich.edu 0x1: Nop::membar({{/*stuff*/}}, IsMemBarrier, MemReadOp); 4772954Sgblack@eecs.umich.edu } 4783587Sgblack@eecs.umich.edu 0x10: Priv::rdpcr({{Rd = Pcr;}}); 4793587Sgblack@eecs.umich.edu 0x11: PrivCheck::rdpic({{Rd = Pic;}}, {{Pcr<0:>}}); 4803587Sgblack@eecs.umich.edu //0x12 should cause an illegal instruction exception 4813587Sgblack@eecs.umich.edu 0x13: NoPriv::rdgsr({{ 4824010Ssaidi@eecs.umich.edu fault = checkFpEnableFault(xc); 4834010Ssaidi@eecs.umich.edu if (fault) 4844010Ssaidi@eecs.umich.edu return fault; 4854010Ssaidi@eecs.umich.edu Rd = Gsr; 4862954Sgblack@eecs.umich.edu }}); 4873587Sgblack@eecs.umich.edu //0x14-0x15 should cause an illegal instruction exception 4883587Sgblack@eecs.umich.edu 0x16: Priv::rdsoftint({{Rd = Softint;}}); 4893823Ssaidi@eecs.umich.edu 0x17: Priv::rdtick_cmpr({{Rd = TickCmpr;}}); 4903823Ssaidi@eecs.umich.edu 0x18: PrivCheck::rdstick({{Rd = Stick}}, {{Stick<63:>}}); 4913823Ssaidi@eecs.umich.edu 0x19: Priv::rdstick_cmpr({{Rd = StickCmpr;}}); 4923598Sgblack@eecs.umich.edu 0x1A: Priv::rdstrand_sts_reg({{ 4933598Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 4943598Sgblack@eecs.umich.edu Rd = StrandStsReg<0:>; 4953598Sgblack@eecs.umich.edu else 4963598Sgblack@eecs.umich.edu Rd = StrandStsReg; 4973598Sgblack@eecs.umich.edu }}); 4983598Sgblack@eecs.umich.edu //0x1A is supposed to be reserved, but it reads the strand 4993598Sgblack@eecs.umich.edu //status register. 5003598Sgblack@eecs.umich.edu //0x1B-0x1F should cause an illegal instruction exception 5012954Sgblack@eecs.umich.edu } 5023587Sgblack@eecs.umich.edu 0x29: decode RS1 { 5033587Sgblack@eecs.umich.edu 0x00: HPriv::rdhprhpstate({{Rd = Hpstate;}}); 5043587Sgblack@eecs.umich.edu 0x01: HPriv::rdhprhtstate({{ 5053587Sgblack@eecs.umich.edu if(Tl == 0) 5063587Sgblack@eecs.umich.edu return new IllegalInstruction; 5073587Sgblack@eecs.umich.edu Rd = Htstate; 5083587Sgblack@eecs.umich.edu }}); 5093587Sgblack@eecs.umich.edu //0x02 should cause an illegal instruction exception 5103587Sgblack@eecs.umich.edu 0x03: HPriv::rdhprhintp({{Rd = Hintp;}}); 5113587Sgblack@eecs.umich.edu //0x04 should cause an illegal instruction exception 5123587Sgblack@eecs.umich.edu 0x05: HPriv::rdhprhtba({{Rd = Htba;}}); 5133587Sgblack@eecs.umich.edu 0x06: HPriv::rdhprhver({{Rd = Hver;}}); 5143587Sgblack@eecs.umich.edu //0x07-0x1E should cause an illegal instruction exception 5153823Ssaidi@eecs.umich.edu 0x1F: HPriv::rdhprhstick_cmpr({{Rd = HstickCmpr;}}); 5163587Sgblack@eecs.umich.edu } 5173587Sgblack@eecs.umich.edu 0x2A: decode RS1 { 5183587Sgblack@eecs.umich.edu 0x00: Priv::rdprtpc({{ 5193587Sgblack@eecs.umich.edu if(Tl == 0) 5203587Sgblack@eecs.umich.edu return new IllegalInstruction; 5213587Sgblack@eecs.umich.edu Rd = Tpc; 5223587Sgblack@eecs.umich.edu }}); 5233587Sgblack@eecs.umich.edu 0x01: Priv::rdprtnpc({{ 5243587Sgblack@eecs.umich.edu if(Tl == 0) 5253587Sgblack@eecs.umich.edu return new IllegalInstruction; 5263587Sgblack@eecs.umich.edu Rd = Tnpc; 5273587Sgblack@eecs.umich.edu }}); 5283587Sgblack@eecs.umich.edu 0x02: Priv::rdprtstate({{ 5293587Sgblack@eecs.umich.edu if(Tl == 0) 5303587Sgblack@eecs.umich.edu return new IllegalInstruction; 5313587Sgblack@eecs.umich.edu Rd = Tstate; 5323587Sgblack@eecs.umich.edu }}); 5333587Sgblack@eecs.umich.edu 0x03: Priv::rdprtt({{ 5343587Sgblack@eecs.umich.edu if(Tl == 0) 5353587Sgblack@eecs.umich.edu return new IllegalInstruction; 5363587Sgblack@eecs.umich.edu Rd = Tt; 5373587Sgblack@eecs.umich.edu }}); 5383823Ssaidi@eecs.umich.edu 0x04: Priv::rdprtick({{Rd = Tick;}}); 5393587Sgblack@eecs.umich.edu 0x05: Priv::rdprtba({{Rd = Tba;}}); 5403587Sgblack@eecs.umich.edu 0x06: Priv::rdprpstate({{Rd = Pstate;}}); 5413587Sgblack@eecs.umich.edu 0x07: Priv::rdprtl({{Rd = Tl;}}); 5423587Sgblack@eecs.umich.edu 0x08: Priv::rdprpil({{Rd = Pil;}}); 5433587Sgblack@eecs.umich.edu 0x09: Priv::rdprcwp({{Rd = Cwp;}}); 5443587Sgblack@eecs.umich.edu 0x0A: Priv::rdprcansave({{Rd = Cansave;}}); 5453587Sgblack@eecs.umich.edu 0x0B: Priv::rdprcanrestore({{Rd = Canrestore;}}); 5463587Sgblack@eecs.umich.edu 0x0C: Priv::rdprcleanwin({{Rd = Cleanwin;}}); 5473587Sgblack@eecs.umich.edu 0x0D: Priv::rdprotherwin({{Rd = Otherwin;}}); 5483587Sgblack@eecs.umich.edu 0x0E: Priv::rdprwstate({{Rd = Wstate;}}); 5493587Sgblack@eecs.umich.edu //0x0F should cause an illegal instruction exception 5503587Sgblack@eecs.umich.edu 0x10: Priv::rdprgl({{Rd = Gl;}}); 5513587Sgblack@eecs.umich.edu //0x11-0x1F should cause an illegal instruction exception 5523587Sgblack@eecs.umich.edu } 5532526SN/A 0x2B: BasicOperate::flushw({{ 5543911Ssaidi@eecs.umich.edu if(NWindows - 2 - Cansave != 0) 5552526SN/A { 5562526SN/A if(Otherwin) 5573909Ssaidi@eecs.umich.edu fault = new SpillNOther(4*Wstate<5:3>); 5582526SN/A else 5593909Ssaidi@eecs.umich.edu fault = new SpillNNormal(4*Wstate<2:0>); 5602526SN/A } 5612526SN/A }}); 5622526SN/A 0x2C: decode MOVCC3 5632469SN/A { 5642526SN/A 0x0: Trap::movccfcc({{fault = new FpDisabled;}}); 5652526SN/A 0x1: decode CC 5662526SN/A { 5672526SN/A 0x0: movcci({{ 5682646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND4)) 5692591SN/A Rd = Rs2_or_imm11; 5702591SN/A else 5712591SN/A Rd = Rd; 5722526SN/A }}); 5732526SN/A 0x2: movccx({{ 5742646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND4)) 5752591SN/A Rd = Rs2_or_imm11; 5762591SN/A else 5772591SN/A Rd = Rd; 5782526SN/A }}); 5792224SN/A } 5802526SN/A } 5812526SN/A 0x2D: sdivx({{ 5822615SN/A if(Rs2_or_imm13.sdw == 0) fault = new DivisionByZero; 5832615SN/A else Rd.sdw = Rs1.sdw / Rs2_or_imm13.sdw; 5842526SN/A }}); 5853941Ssaidi@eecs.umich.edu 0x2E: Trap::popc({{fault = new IllegalInstruction;}}); 5862526SN/A 0x2F: decode RCOND3 5872526SN/A { 5882615SN/A 0x1: movreq({{Rd = (Rs1.sdw == 0) ? Rs2_or_imm10 : Rd;}}); 5892615SN/A 0x2: movrle({{Rd = (Rs1.sdw <= 0) ? Rs2_or_imm10 : Rd;}}); 5902615SN/A 0x3: movrl({{Rd = (Rs1.sdw < 0) ? Rs2_or_imm10 : Rd;}}); 5912615SN/A 0x5: movrne({{Rd = (Rs1.sdw != 0) ? Rs2_or_imm10 : Rd;}}); 5922615SN/A 0x6: movrg({{Rd = (Rs1.sdw > 0) ? Rs2_or_imm10 : Rd;}}); 5932615SN/A 0x7: movrge({{Rd = (Rs1.sdw >= 0) ? Rs2_or_imm10 : Rd;}}); 5942526SN/A } 5953587Sgblack@eecs.umich.edu 0x30: decode RD { 5963929Ssaidi@eecs.umich.edu 0x00: NoPriv::wry({{Y = (Rs1 ^ Rs2_or_imm13)<31:0>;}}); 5973587Sgblack@eecs.umich.edu //0x01 should cause an illegal instruction exception 5983587Sgblack@eecs.umich.edu 0x02: NoPriv::wrccr({{Ccr = Rs1 ^ Rs2_or_imm13;}}); 5993826Ssaidi@eecs.umich.edu 0x03: NoPriv::wrasi({{Asi = Rs1 ^ Rs2_or_imm13;}}); 6003587Sgblack@eecs.umich.edu //0x04-0x05 should cause an illegal instruction exception 6013587Sgblack@eecs.umich.edu 0x06: NoPriv::wrfprs({{Fprs = Rs1 ^ Rs2_or_imm13;}}); 6023587Sgblack@eecs.umich.edu //0x07-0x0E should cause an illegal instruction exception 6033587Sgblack@eecs.umich.edu 0x0F: Trap::softreset({{fault = new SoftwareInitiatedReset;}}); 6043587Sgblack@eecs.umich.edu 0x10: Priv::wrpcr({{Pcr = Rs1 ^ Rs2_or_imm13;}}); 6053587Sgblack@eecs.umich.edu 0x11: PrivCheck::wrpic({{Pic = Rs1 ^ Rs2_or_imm13;}}, {{Pcr<0:>}}); 6063587Sgblack@eecs.umich.edu //0x12 should cause an illegal instruction exception 6073587Sgblack@eecs.umich.edu 0x13: NoPriv::wrgsr({{ 6083587Sgblack@eecs.umich.edu if(Fprs<2:> == 0 || Pstate<4:> == 0) 6093587Sgblack@eecs.umich.edu return new FpDisabled; 6103587Sgblack@eecs.umich.edu Gsr = Rs1 ^ Rs2_or_imm13; 6113587Sgblack@eecs.umich.edu }}); 6123587Sgblack@eecs.umich.edu 0x14: Priv::wrsoftint_set({{SoftintSet = Rs1 ^ Rs2_or_imm13;}}); 6133587Sgblack@eecs.umich.edu 0x15: Priv::wrsoftint_clr({{SoftintClr = Rs1 ^ Rs2_or_imm13;}}); 6143587Sgblack@eecs.umich.edu 0x16: Priv::wrsoftint({{Softint = Rs1 ^ Rs2_or_imm13;}}); 6153823Ssaidi@eecs.umich.edu 0x17: Priv::wrtick_cmpr({{TickCmpr = Rs1 ^ Rs2_or_imm13;}}); 6163587Sgblack@eecs.umich.edu 0x18: NoPriv::wrstick({{ 6173587Sgblack@eecs.umich.edu if(!Hpstate<2:>) 6183587Sgblack@eecs.umich.edu return new IllegalInstruction; 6193823Ssaidi@eecs.umich.edu Stick = Rs1 ^ Rs2_or_imm13; 6203587Sgblack@eecs.umich.edu }}); 6213823Ssaidi@eecs.umich.edu 0x19: Priv::wrstick_cmpr({{StickCmpr = Rs1 ^ Rs2_or_imm13;}}); 6223598Sgblack@eecs.umich.edu 0x1A: Priv::wrstrand_sts_reg({{ 6233598Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 6243598Sgblack@eecs.umich.edu StrandStsReg = StrandStsReg<63:1> | 6253598Sgblack@eecs.umich.edu (Rs1 ^ Rs2_or_imm13)<0:>; 6263598Sgblack@eecs.umich.edu else 6273598Sgblack@eecs.umich.edu StrandStsReg = Rs1 ^ Rs2_or_imm13; 6283598Sgblack@eecs.umich.edu }}); 6293598Sgblack@eecs.umich.edu //0x1A is supposed to be reserved, but it writes the strand 6303598Sgblack@eecs.umich.edu //status register. 6313598Sgblack@eecs.umich.edu //0x1B-0x1F should cause an illegal instruction exception 6323587Sgblack@eecs.umich.edu } 6332526SN/A 0x31: decode FCN { 6343417Sgblack@eecs.umich.edu 0x0: Priv::saved({{ 6353417Sgblack@eecs.umich.edu assert(Cansave < NWindows - 2); 6363417Sgblack@eecs.umich.edu assert(Otherwin || Canrestore); 6373417Sgblack@eecs.umich.edu Cansave = Cansave + 1; 6383417Sgblack@eecs.umich.edu if(Otherwin == 0) 6393417Sgblack@eecs.umich.edu Canrestore = Canrestore - 1; 6403417Sgblack@eecs.umich.edu else 6413417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 6423417Sgblack@eecs.umich.edu }}); 6433598Sgblack@eecs.umich.edu 0x1: Priv::restored({{ 6443417Sgblack@eecs.umich.edu assert(Cansave || Otherwin); 6453417Sgblack@eecs.umich.edu assert(Canrestore < NWindows - 2); 6463417Sgblack@eecs.umich.edu Canrestore = Canrestore + 1; 6473417Sgblack@eecs.umich.edu if(Otherwin == 0) 6483417Sgblack@eecs.umich.edu Cansave = Cansave - 1; 6493417Sgblack@eecs.umich.edu else 6503417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 6513928Ssaidi@eecs.umich.edu 6523928Ssaidi@eecs.umich.edu if(Cleanwin < NWindows - 1) 6533928Ssaidi@eecs.umich.edu Cleanwin = Cleanwin + 1; 6543417Sgblack@eecs.umich.edu }}); 6552526SN/A } 6563587Sgblack@eecs.umich.edu 0x32: decode RD { 6573587Sgblack@eecs.umich.edu 0x00: Priv::wrprtpc({{ 6583587Sgblack@eecs.umich.edu if(Tl == 0) 6593587Sgblack@eecs.umich.edu return new IllegalInstruction; 6603587Sgblack@eecs.umich.edu else 6613587Sgblack@eecs.umich.edu Tpc = Rs1 ^ Rs2_or_imm13; 6623587Sgblack@eecs.umich.edu }}); 6633587Sgblack@eecs.umich.edu 0x01: Priv::wrprtnpc({{ 6643587Sgblack@eecs.umich.edu if(Tl == 0) 6653587Sgblack@eecs.umich.edu return new IllegalInstruction; 6663587Sgblack@eecs.umich.edu else 6673587Sgblack@eecs.umich.edu Tnpc = Rs1 ^ Rs2_or_imm13; 6683587Sgblack@eecs.umich.edu }}); 6693587Sgblack@eecs.umich.edu 0x02: Priv::wrprtstate({{ 6703587Sgblack@eecs.umich.edu if(Tl == 0) 6713587Sgblack@eecs.umich.edu return new IllegalInstruction; 6723587Sgblack@eecs.umich.edu else 6733587Sgblack@eecs.umich.edu Tstate = Rs1 ^ Rs2_or_imm13; 6743587Sgblack@eecs.umich.edu }}); 6753587Sgblack@eecs.umich.edu 0x03: Priv::wrprtt({{ 6763587Sgblack@eecs.umich.edu if(Tl == 0) 6773587Sgblack@eecs.umich.edu return new IllegalInstruction; 6783587Sgblack@eecs.umich.edu else 6793587Sgblack@eecs.umich.edu Tt = Rs1 ^ Rs2_or_imm13; 6803587Sgblack@eecs.umich.edu }}); 6813823Ssaidi@eecs.umich.edu 0x04: HPriv::wrprtick({{Tick = Rs1 ^ Rs2_or_imm13;}}); 6823587Sgblack@eecs.umich.edu 0x05: Priv::wrprtba({{Tba = Rs1 ^ Rs2_or_imm13;}}); 6833587Sgblack@eecs.umich.edu 0x06: Priv::wrprpstate({{Pstate = Rs1 ^ Rs2_or_imm13;}}); 6843587Sgblack@eecs.umich.edu 0x07: Priv::wrprtl({{ 6853587Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 6863587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPTL); 6873587Sgblack@eecs.umich.edu else 6883587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxTL); 6893587Sgblack@eecs.umich.edu }}); 6903587Sgblack@eecs.umich.edu 0x08: Priv::wrprpil({{Pil = Rs1 ^ Rs2_or_imm13;}}); 6913587Sgblack@eecs.umich.edu 0x09: Priv::wrprcwp({{Cwp = Rs1 ^ Rs2_or_imm13;}}); 6923587Sgblack@eecs.umich.edu 0x0A: Priv::wrprcansave({{Cansave = Rs1 ^ Rs2_or_imm13;}}); 6933587Sgblack@eecs.umich.edu 0x0B: Priv::wrprcanrestore({{Canrestore = Rs1 ^ Rs2_or_imm13;}}); 6943587Sgblack@eecs.umich.edu 0x0C: Priv::wrprcleanwin({{Cleanwin = Rs1 ^ Rs2_or_imm13;}}); 6953587Sgblack@eecs.umich.edu 0x0D: Priv::wrprotherwin({{Otherwin = Rs1 ^ Rs2_or_imm13;}}); 6963587Sgblack@eecs.umich.edu 0x0E: Priv::wrprwstate({{Wstate = Rs1 ^ Rs2_or_imm13;}}); 6973587Sgblack@eecs.umich.edu //0x0F should cause an illegal instruction exception 6983587Sgblack@eecs.umich.edu 0x10: Priv::wrprgl({{ 6993587Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 7003587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPGL); 7013587Sgblack@eecs.umich.edu else 7023587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxGL); 7033587Sgblack@eecs.umich.edu }}); 7043587Sgblack@eecs.umich.edu //0x11-0x1F should cause an illegal instruction exception 7053587Sgblack@eecs.umich.edu } 7063587Sgblack@eecs.umich.edu 0x33: decode RD { 7073587Sgblack@eecs.umich.edu 0x00: HPriv::wrhprhpstate({{Hpstate = Rs1 ^ Rs2_or_imm13;}}); 7083587Sgblack@eecs.umich.edu 0x01: HPriv::wrhprhtstate({{ 7093587Sgblack@eecs.umich.edu if(Tl == 0) 7103587Sgblack@eecs.umich.edu return new IllegalInstruction; 7113587Sgblack@eecs.umich.edu Htstate = Rs1 ^ Rs2_or_imm13; 7123587Sgblack@eecs.umich.edu }}); 7133587Sgblack@eecs.umich.edu //0x02 should cause an illegal instruction exception 7143587Sgblack@eecs.umich.edu 0x03: HPriv::wrhprhintp({{Hintp = Rs1 ^ Rs2_or_imm13;}}); 7153587Sgblack@eecs.umich.edu //0x04 should cause an illegal instruction exception 7163587Sgblack@eecs.umich.edu 0x05: HPriv::wrhprhtba({{Htba = Rs1 ^ Rs2_or_imm13;}}); 7173587Sgblack@eecs.umich.edu //0x06-0x01D should cause an illegal instruction exception 7183823Ssaidi@eecs.umich.edu 0x1F: HPriv::wrhprhstick_cmpr({{HstickCmpr = Rs1 ^ Rs2_or_imm13;}}); 7193587Sgblack@eecs.umich.edu } 7202954Sgblack@eecs.umich.edu 0x34: decode OPF{ 7214008Ssaidi@eecs.umich.edu format FpBasic{ 7222963Sgblack@eecs.umich.edu 0x01: fmovs({{ 7233279Sgblack@eecs.umich.edu Frds.uw = Frs2s.uw; 7242963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7252963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7262963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7272963Sgblack@eecs.umich.edu }}); 7282963Sgblack@eecs.umich.edu 0x02: fmovd({{ 7293057Sgblack@eecs.umich.edu Frd.udw = Frs2.udw; 7302963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7312963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7322963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7332963Sgblack@eecs.umich.edu }}); 7343995Sgblack@eecs.umich.edu 0x03: FpUnimpl::fmovq(); 7352963Sgblack@eecs.umich.edu 0x05: fnegs({{ 7363279Sgblack@eecs.umich.edu Frds.uw = Frs2s.uw ^ (1UL << 31); 7372963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7382963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7392963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7402963Sgblack@eecs.umich.edu }}); 7412963Sgblack@eecs.umich.edu 0x06: fnegd({{ 7423057Sgblack@eecs.umich.edu Frd.udw = Frs2.udw ^ (1ULL << 63); 7432963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7442963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7452963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7462963Sgblack@eecs.umich.edu }}); 7473995Sgblack@eecs.umich.edu 0x07: FpUnimpl::fnegq(); 7482963Sgblack@eecs.umich.edu 0x09: fabss({{ 7493279Sgblack@eecs.umich.edu Frds.uw = ((1UL << 31) - 1) & Frs2s.uw; 7502963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7512963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7522963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7532963Sgblack@eecs.umich.edu }}); 7542963Sgblack@eecs.umich.edu 0x0A: fabsd({{ 7553057Sgblack@eecs.umich.edu Frd.udw = ((1ULL << 63) - 1) & Frs2.udw; 7562963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 7572963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 7582963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 7592963Sgblack@eecs.umich.edu }}); 7603995Sgblack@eecs.umich.edu 0x0B: FpUnimpl::fabsq(); 7613918Ssaidi@eecs.umich.edu 0x29: fsqrts({{Frds.sf = std::sqrt(Frs2s.sf);}}); 7623918Ssaidi@eecs.umich.edu 0x2A: fsqrtd({{Frd.df = std::sqrt(Frs2.df);}}); 7633995Sgblack@eecs.umich.edu 0x2B: FpUnimpl::fsqrtq(); 7643279Sgblack@eecs.umich.edu 0x41: fadds({{Frds.sf = Frs1s.sf + Frs2s.sf;}}); 7652963Sgblack@eecs.umich.edu 0x42: faddd({{Frd.df = Frs1.df + Frs2.df;}}); 7663995Sgblack@eecs.umich.edu 0x43: FpUnimpl::faddq(); 7673279Sgblack@eecs.umich.edu 0x45: fsubs({{Frds.sf = Frs1s.sf - Frs2s.sf;}}); 7684008Ssaidi@eecs.umich.edu 0x46: fsubd({{Frd.df = Frs1.df - Frs2.df; }}); 7693995Sgblack@eecs.umich.edu 0x47: FpUnimpl::fsubq(); 7703279Sgblack@eecs.umich.edu 0x49: fmuls({{Frds.sf = Frs1s.sf * Frs2s.sf;}}); 7712963Sgblack@eecs.umich.edu 0x4A: fmuld({{Frd.df = Frs1.df * Frs2.df;}}); 7723995Sgblack@eecs.umich.edu 0x4B: FpUnimpl::fmulq(); 7733279Sgblack@eecs.umich.edu 0x4D: fdivs({{Frds.sf = Frs1s.sf / Frs2s.sf;}}); 7742963Sgblack@eecs.umich.edu 0x4E: fdivd({{Frd.df = Frs1.df / Frs2.df;}}); 7753995Sgblack@eecs.umich.edu 0x4F: FpUnimpl::fdivq(); 7763279Sgblack@eecs.umich.edu 0x69: fsmuld({{Frd.df = Frs1s.sf * Frs2s.sf;}}); 7773995Sgblack@eecs.umich.edu 0x6E: FpUnimpl::fdmulq(); 7782963Sgblack@eecs.umich.edu 0x81: fstox({{ 7794008Ssaidi@eecs.umich.edu Frd.sdw = static_cast<int64_t>(Frs2s.sf); 7802963Sgblack@eecs.umich.edu }}); 7812963Sgblack@eecs.umich.edu 0x82: fdtox({{ 7824008Ssaidi@eecs.umich.edu Frd.sdw = static_cast<int64_t>(Frs2.df); 7832963Sgblack@eecs.umich.edu }}); 7843995Sgblack@eecs.umich.edu 0x83: FpUnimpl::fqtox(); 7852963Sgblack@eecs.umich.edu 0x84: fxtos({{ 7864008Ssaidi@eecs.umich.edu Frds.sf = static_cast<float>(Frs2.sdw); 7872963Sgblack@eecs.umich.edu }}); 7882963Sgblack@eecs.umich.edu 0x88: fxtod({{ 7894008Ssaidi@eecs.umich.edu Frd.df = static_cast<double>(Frs2.sdw); 7902963Sgblack@eecs.umich.edu }}); 7913995Sgblack@eecs.umich.edu 0x8C: FpUnimpl::fxtoq(); 7922963Sgblack@eecs.umich.edu 0xC4: fitos({{ 7934008Ssaidi@eecs.umich.edu Frds.sf = static_cast<float>(Frs2s.sw); 7942963Sgblack@eecs.umich.edu }}); 7953279Sgblack@eecs.umich.edu 0xC6: fdtos({{Frds.sf = Frs2.df;}}); 7963995Sgblack@eecs.umich.edu 0xC7: FpUnimpl::fqtos(); 7972963Sgblack@eecs.umich.edu 0xC8: fitod({{ 7984008Ssaidi@eecs.umich.edu Frd.df = static_cast<double>(Frs2s.sw); 7992963Sgblack@eecs.umich.edu }}); 8003279Sgblack@eecs.umich.edu 0xC9: fstod({{Frd.df = Frs2s.sf;}}); 8013995Sgblack@eecs.umich.edu 0xCB: FpUnimpl::fqtod(); 8023995Sgblack@eecs.umich.edu 0xCC: FpUnimpl::fitoq(); 8033995Sgblack@eecs.umich.edu 0xCD: FpUnimpl::fstoq(); 8043995Sgblack@eecs.umich.edu 0xCE: FpUnimpl::fdtoq(); 8052963Sgblack@eecs.umich.edu 0xD1: fstoi({{ 8064008Ssaidi@eecs.umich.edu Frds.sw = static_cast<int32_t>(Frs2s.sf); 8074008Ssaidi@eecs.umich.edu float t = Frds.sw; 8084008Ssaidi@eecs.umich.edu if (t != Frs2s.sf) 8094008Ssaidi@eecs.umich.edu Fsr = insertBits(Fsr, 4,0, 0x01); 8102963Sgblack@eecs.umich.edu }}); 8112963Sgblack@eecs.umich.edu 0xD2: fdtoi({{ 8124008Ssaidi@eecs.umich.edu Frds.sw = static_cast<int32_t>(Frs2.df); 8134008Ssaidi@eecs.umich.edu double t = Frds.sw; 8144008Ssaidi@eecs.umich.edu if (t != Frs2.df) 8154008Ssaidi@eecs.umich.edu Fsr = insertBits(Fsr, 4,0, 0x01); 8162963Sgblack@eecs.umich.edu }}); 8173995Sgblack@eecs.umich.edu 0xD3: FpUnimpl::fqtoi(); 8183941Ssaidi@eecs.umich.edu default: FailUnimpl::fpop1(); 8192963Sgblack@eecs.umich.edu } 8202954Sgblack@eecs.umich.edu } 8213992Sgblack@eecs.umich.edu 0x35: decode OPF{ 8224008Ssaidi@eecs.umich.edu format FpBasic{ 8233992Sgblack@eecs.umich.edu 0x51: fcmps({{ 8243992Sgblack@eecs.umich.edu uint8_t fcc; 8253998Ssaidi@eecs.umich.edu if(isnan(Frs1s) || isnan(Frs2s)) 8263992Sgblack@eecs.umich.edu fcc = 3; 8273992Sgblack@eecs.umich.edu else if(Frs1s < Frs2s) 8283992Sgblack@eecs.umich.edu fcc = 1; 8293992Sgblack@eecs.umich.edu else if(Frs1s > Frs2s) 8303992Sgblack@eecs.umich.edu fcc = 2; 8313992Sgblack@eecs.umich.edu else 8323992Sgblack@eecs.umich.edu fcc = 0; 8333992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 8343992Sgblack@eecs.umich.edu if(FCMPCC) 8353992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 8363992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 8373992Sgblack@eecs.umich.edu }}); 8383992Sgblack@eecs.umich.edu 0x52: fcmpd({{ 8393992Sgblack@eecs.umich.edu uint8_t fcc; 8404008Ssaidi@eecs.umich.edu if(isnan(Frs1) || isnan(Frs2)) 8413992Sgblack@eecs.umich.edu fcc = 3; 8424008Ssaidi@eecs.umich.edu else if(Frs1 < Frs2) 8433992Sgblack@eecs.umich.edu fcc = 1; 8444008Ssaidi@eecs.umich.edu else if(Frs1 > Frs2) 8453992Sgblack@eecs.umich.edu fcc = 2; 8463992Sgblack@eecs.umich.edu else 8473992Sgblack@eecs.umich.edu fcc = 0; 8483992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 8493992Sgblack@eecs.umich.edu if(FCMPCC) 8503992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 8513992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 8523992Sgblack@eecs.umich.edu }}); 8533995Sgblack@eecs.umich.edu 0x53: FpUnimpl::fcmpq(); 8543997Ssaidi@eecs.umich.edu 0x55: fcmpes({{ 8553992Sgblack@eecs.umich.edu uint8_t fcc = 0; 8563998Ssaidi@eecs.umich.edu if(isnan(Frs1s) || isnan(Frs2s)) 8573992Sgblack@eecs.umich.edu fault = new FpExceptionIEEE754; 8583992Sgblack@eecs.umich.edu if(Frs1s < Frs2s) 8593992Sgblack@eecs.umich.edu fcc = 1; 8603992Sgblack@eecs.umich.edu else if(Frs1s > Frs2s) 8613992Sgblack@eecs.umich.edu fcc = 2; 8623992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 8633992Sgblack@eecs.umich.edu if(FCMPCC) 8643992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 8653992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 8663992Sgblack@eecs.umich.edu }}); 8673997Ssaidi@eecs.umich.edu 0x56: fcmped({{ 8683992Sgblack@eecs.umich.edu uint8_t fcc = 0; 8694008Ssaidi@eecs.umich.edu if(isnan(Frs1) || isnan(Frs2)) 8703992Sgblack@eecs.umich.edu fault = new FpExceptionIEEE754; 8714008Ssaidi@eecs.umich.edu if(Frs1 < Frs2) 8723992Sgblack@eecs.umich.edu fcc = 1; 8734008Ssaidi@eecs.umich.edu else if(Frs1 > Frs2) 8743992Sgblack@eecs.umich.edu fcc = 2; 8753992Sgblack@eecs.umich.edu uint8_t firstbit = 10; 8763992Sgblack@eecs.umich.edu if(FCMPCC) 8773992Sgblack@eecs.umich.edu firstbit = FCMPCC * 2 + 30; 8783992Sgblack@eecs.umich.edu Fsr = insertBits(Fsr, firstbit +1, firstbit, fcc); 8793992Sgblack@eecs.umich.edu }}); 8803997Ssaidi@eecs.umich.edu 0x57: FpUnimpl::fcmpeq(); 8813992Sgblack@eecs.umich.edu default: FailUnimpl::fpop2(); 8823992Sgblack@eecs.umich.edu } 8833992Sgblack@eecs.umich.edu } 8842954Sgblack@eecs.umich.edu //This used to be just impdep1, but now it's a whole bunch 8852954Sgblack@eecs.umich.edu //of instructions 8862954Sgblack@eecs.umich.edu 0x36: decode OPF{ 8873941Ssaidi@eecs.umich.edu 0x00: FailUnimpl::edge8(); 8883941Ssaidi@eecs.umich.edu 0x01: FailUnimpl::edge8n(); 8893941Ssaidi@eecs.umich.edu 0x02: FailUnimpl::edge8l(); 8903941Ssaidi@eecs.umich.edu 0x03: FailUnimpl::edge8ln(); 8913941Ssaidi@eecs.umich.edu 0x04: FailUnimpl::edge16(); 8923941Ssaidi@eecs.umich.edu 0x05: FailUnimpl::edge16n(); 8933941Ssaidi@eecs.umich.edu 0x06: FailUnimpl::edge16l(); 8943941Ssaidi@eecs.umich.edu 0x07: FailUnimpl::edge16ln(); 8953941Ssaidi@eecs.umich.edu 0x08: FailUnimpl::edge32(); 8963941Ssaidi@eecs.umich.edu 0x09: FailUnimpl::edge32n(); 8973941Ssaidi@eecs.umich.edu 0x0A: FailUnimpl::edge32l(); 8983941Ssaidi@eecs.umich.edu 0x0B: FailUnimpl::edge32ln(); 8993941Ssaidi@eecs.umich.edu 0x10: FailUnimpl::array8(); 9003941Ssaidi@eecs.umich.edu 0x12: FailUnimpl::array16(); 9013941Ssaidi@eecs.umich.edu 0x14: FailUnimpl::array32(); 9023042Sgblack@eecs.umich.edu 0x18: BasicOperate::alignaddr({{ 9032963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 9043042Sgblack@eecs.umich.edu Rd = sum & ~7; 9052963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | (sum & 7); 9062963Sgblack@eecs.umich.edu }}); 9073941Ssaidi@eecs.umich.edu 0x19: FailUnimpl::bmask(); 9082963Sgblack@eecs.umich.edu 0x1A: BasicOperate::alignaddresslittle({{ 9092963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 9103042Sgblack@eecs.umich.edu Rd = sum & ~7; 9112963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | ((~sum + 1) & 7); 9122963Sgblack@eecs.umich.edu }}); 9133941Ssaidi@eecs.umich.edu 0x20: FailUnimpl::fcmple16(); 9143941Ssaidi@eecs.umich.edu 0x22: FailUnimpl::fcmpne16(); 9153941Ssaidi@eecs.umich.edu 0x24: FailUnimpl::fcmple32(); 9163941Ssaidi@eecs.umich.edu 0x26: FailUnimpl::fcmpne32(); 9173941Ssaidi@eecs.umich.edu 0x28: FailUnimpl::fcmpgt16(); 9183941Ssaidi@eecs.umich.edu 0x2A: FailUnimpl::fcmpeq16(); 9193941Ssaidi@eecs.umich.edu 0x2C: FailUnimpl::fcmpgt32(); 9203941Ssaidi@eecs.umich.edu 0x2E: FailUnimpl::fcmpeq32(); 9213941Ssaidi@eecs.umich.edu 0x31: FailUnimpl::fmul8x16(); 9223941Ssaidi@eecs.umich.edu 0x33: FailUnimpl::fmul8x16au(); 9233941Ssaidi@eecs.umich.edu 0x35: FailUnimpl::fmul8x16al(); 9243941Ssaidi@eecs.umich.edu 0x36: FailUnimpl::fmul8sux16(); 9253941Ssaidi@eecs.umich.edu 0x37: FailUnimpl::fmul8ulx16(); 9263941Ssaidi@eecs.umich.edu 0x38: FailUnimpl::fmuld8sux16(); 9273941Ssaidi@eecs.umich.edu 0x39: FailUnimpl::fmuld8ulx16(); 9282954Sgblack@eecs.umich.edu 0x3A: Trap::fpack32({{fault = new IllegalInstruction;}}); 9292954Sgblack@eecs.umich.edu 0x3B: Trap::fpack16({{fault = new IllegalInstruction;}}); 9302954Sgblack@eecs.umich.edu 0x3D: Trap::fpackfix({{fault = new IllegalInstruction;}}); 9312954Sgblack@eecs.umich.edu 0x3E: Trap::pdist({{fault = new IllegalInstruction;}}); 9322963Sgblack@eecs.umich.edu 0x48: BasicOperate::faligndata({{ 9333057Sgblack@eecs.umich.edu uint64_t msbX = Frs1.udw; 9343057Sgblack@eecs.umich.edu uint64_t lsbX = Frs2.udw; 9353057Sgblack@eecs.umich.edu //Some special cases need to be split out, first 9363057Sgblack@eecs.umich.edu //because they're the most likely to be used, and 9373057Sgblack@eecs.umich.edu //second because otherwise, we end up shifting by 9383057Sgblack@eecs.umich.edu //greater than the width of the type being shifted, 9393057Sgblack@eecs.umich.edu //namely 64, which produces undefined results according 9403057Sgblack@eecs.umich.edu //to the C standard. 9413057Sgblack@eecs.umich.edu switch(Gsr<2:0>) 9423057Sgblack@eecs.umich.edu { 9433057Sgblack@eecs.umich.edu case 0: 9443057Sgblack@eecs.umich.edu Frd.udw = msbX; 9453057Sgblack@eecs.umich.edu break; 9463057Sgblack@eecs.umich.edu case 8: 9473057Sgblack@eecs.umich.edu Frd.udw = lsbX; 9483057Sgblack@eecs.umich.edu break; 9493057Sgblack@eecs.umich.edu default: 9503057Sgblack@eecs.umich.edu uint64_t msbShift = Gsr<2:0> * 8; 9513057Sgblack@eecs.umich.edu uint64_t lsbShift = (8 - Gsr<2:0>) * 8; 9523057Sgblack@eecs.umich.edu uint64_t msbMask = ((uint64_t)(-1)) >> msbShift; 9533057Sgblack@eecs.umich.edu uint64_t lsbMask = ((uint64_t)(-1)) << lsbShift; 9543057Sgblack@eecs.umich.edu Frd.udw = ((msbX & msbMask) << msbShift) | 9553057Sgblack@eecs.umich.edu ((lsbX & lsbMask) >> lsbShift); 9563057Sgblack@eecs.umich.edu } 9572963Sgblack@eecs.umich.edu }}); 9582954Sgblack@eecs.umich.edu 0x4B: Trap::fpmerge({{fault = new IllegalInstruction;}}); 9593941Ssaidi@eecs.umich.edu 0x4C: FailUnimpl::bshuffle(); 9603941Ssaidi@eecs.umich.edu 0x4D: FailUnimpl::fexpand(); 9613941Ssaidi@eecs.umich.edu 0x50: FailUnimpl::fpadd16(); 9623941Ssaidi@eecs.umich.edu 0x51: FailUnimpl::fpadd16s(); 9633941Ssaidi@eecs.umich.edu 0x52: FailUnimpl::fpadd32(); 9643941Ssaidi@eecs.umich.edu 0x53: FailUnimpl::fpadd32s(); 9653941Ssaidi@eecs.umich.edu 0x54: FailUnimpl::fpsub16(); 9663941Ssaidi@eecs.umich.edu 0x55: FailUnimpl::fpsub16s(); 9673941Ssaidi@eecs.umich.edu 0x56: FailUnimpl::fpsub32(); 9683941Ssaidi@eecs.umich.edu 0x57: FailUnimpl::fpsub32s(); 9694008Ssaidi@eecs.umich.edu 0x60: FpBasic::fzero({{Frd.df = 0;}}); 9704008Ssaidi@eecs.umich.edu 0x61: FpBasic::fzeros({{Frds.sf = 0;}}); 9713941Ssaidi@eecs.umich.edu 0x62: FailUnimpl::fnor(); 9723941Ssaidi@eecs.umich.edu 0x63: FailUnimpl::fnors(); 9733941Ssaidi@eecs.umich.edu 0x64: FailUnimpl::fandnot2(); 9743941Ssaidi@eecs.umich.edu 0x65: FailUnimpl::fandnot2s(); 9754008Ssaidi@eecs.umich.edu 0x66: FpBasic::fnot2({{ 9762963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs2.df)); 9772963Sgblack@eecs.umich.edu }}); 9784008Ssaidi@eecs.umich.edu 0x67: FpBasic::fnot2s({{ 9793279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs2s.sf)); 9802963Sgblack@eecs.umich.edu }}); 9813941Ssaidi@eecs.umich.edu 0x68: FailUnimpl::fandnot1(); 9823941Ssaidi@eecs.umich.edu 0x69: FailUnimpl::fandnot1s(); 9834008Ssaidi@eecs.umich.edu 0x6A: FpBasic::fnot1({{ 9842963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs1.df)); 9852963Sgblack@eecs.umich.edu }}); 9864008Ssaidi@eecs.umich.edu 0x6B: FpBasic::fnot1s({{ 9873279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs1s.sf)); 9882963Sgblack@eecs.umich.edu }}); 9893941Ssaidi@eecs.umich.edu 0x6C: FailUnimpl::fxor(); 9903941Ssaidi@eecs.umich.edu 0x6D: FailUnimpl::fxors(); 9913941Ssaidi@eecs.umich.edu 0x6E: FailUnimpl::fnand(); 9923941Ssaidi@eecs.umich.edu 0x6F: FailUnimpl::fnands(); 9933941Ssaidi@eecs.umich.edu 0x70: FailUnimpl::fand(); 9943941Ssaidi@eecs.umich.edu 0x71: FailUnimpl::fands(); 9953941Ssaidi@eecs.umich.edu 0x72: FailUnimpl::fxnor(); 9963941Ssaidi@eecs.umich.edu 0x73: FailUnimpl::fxnors(); 9974008Ssaidi@eecs.umich.edu 0x74: FpBasic::fsrc1({{Frd.udw = Frs1.udw;}}); 9984008Ssaidi@eecs.umich.edu 0x75: FpBasic::fsrc1s({{Frds.uw = Frs1s.uw;}}); 9993941Ssaidi@eecs.umich.edu 0x76: FailUnimpl::fornot2(); 10003941Ssaidi@eecs.umich.edu 0x77: FailUnimpl::fornot2s(); 10014008Ssaidi@eecs.umich.edu 0x78: FpBasic::fsrc2({{Frd.udw = Frs2.udw;}}); 10024008Ssaidi@eecs.umich.edu 0x79: FpBasic::fsrc2s({{Frds.uw = Frs2s.uw;}}); 10033941Ssaidi@eecs.umich.edu 0x7A: FailUnimpl::fornot1(); 10043941Ssaidi@eecs.umich.edu 0x7B: FailUnimpl::fornot1s(); 10053941Ssaidi@eecs.umich.edu 0x7C: FailUnimpl::for(); 10063941Ssaidi@eecs.umich.edu 0x7D: FailUnimpl::fors(); 10074008Ssaidi@eecs.umich.edu 0x7E: FpBasic::fone({{Frd.udw = std::numeric_limits<uint64_t>::max();}}); 10084008Ssaidi@eecs.umich.edu 0x7F: FpBasic::fones({{Frds.uw = std::numeric_limits<uint32_t>::max();}}); 10092954Sgblack@eecs.umich.edu 0x80: Trap::shutdown({{fault = new IllegalInstruction;}}); 10103941Ssaidi@eecs.umich.edu 0x81: FailUnimpl::siam(); 10112954Sgblack@eecs.umich.edu } 10124090Ssaidi@eecs.umich.edu // M5 special opcodes use the reserved IMPDEP2A opcode space 10134090Ssaidi@eecs.umich.edu 0x37: decode M5FUNC { 10144096Sgblack@eecs.umich.edu#if FULL_SYSTEM 10154113Sgblack@eecs.umich.edu format BasicOperate { 10164113Sgblack@eecs.umich.edu // we have 7 bits of space here to play with... 10174113Sgblack@eecs.umich.edu 0x21: m5exit({{PseudoInst::m5exit(xc->tcBase(), O0); 10184113Sgblack@eecs.umich.edu }}, No_OpClass, IsNonSpeculative); 10194113Sgblack@eecs.umich.edu 0x50: m5readfile({{ 10204113Sgblack@eecs.umich.edu O0 = PseudoInst::readfile(xc->tcBase(), O0, O1, O2); 10214113Sgblack@eecs.umich.edu }}, IsNonSpeculative); 10224113Sgblack@eecs.umich.edu 0x51: m5break({{PseudoInst::debugbreak(xc->tcBase()); 10234113Sgblack@eecs.umich.edu }}, IsNonSpeculative); 10244113Sgblack@eecs.umich.edu 0x54: m5panic({{ 10254113Sgblack@eecs.umich.edu panic("M5 panic instruction called at pc=%#x.", xc->readPC()); 10264113Sgblack@eecs.umich.edu }}, No_OpClass, IsNonSpeculative); 10274113Sgblack@eecs.umich.edu } 10284096Sgblack@eecs.umich.edu#endif 10294096Sgblack@eecs.umich.edu default: Trap::impdep2({{fault = new IllegalInstruction;}}); 10304090Ssaidi@eecs.umich.edu } 10312526SN/A 0x38: Branch::jmpl({{ 10322526SN/A Addr target = Rs1 + Rs2_or_imm13; 10332526SN/A if(target & 0x3) 10342526SN/A fault = new MemAddressNotAligned; 10352526SN/A else 10362526SN/A { 10373928Ssaidi@eecs.umich.edu if (Pstate<3:>) 10383929Ssaidi@eecs.umich.edu Rd = (xc->readPC())<31:0>; 10393928Ssaidi@eecs.umich.edu else 10403928Ssaidi@eecs.umich.edu Rd = xc->readPC(); 10412526SN/A NNPC = target; 10422526SN/A } 10432526SN/A }}); 10442526SN/A 0x39: Branch::return({{ 10452526SN/A Addr target = Rs1 + Rs2_or_imm13; 10462561SN/A if(fault == NoFault) 10472561SN/A { 10483765Sgblack@eecs.umich.edu //Check for fills which are higher priority than alignment 10493765Sgblack@eecs.umich.edu //faults. 10502561SN/A if(Canrestore == 0) 10512561SN/A { 10522561SN/A if(Otherwin) 10533909Ssaidi@eecs.umich.edu fault = new FillNOther(4*Wstate<5:3>); 10542561SN/A else 10553909Ssaidi@eecs.umich.edu fault = new FillNNormal(4*Wstate<2:0>); 10562561SN/A } 10573765Sgblack@eecs.umich.edu //Check for alignment faults 10583765Sgblack@eecs.umich.edu else if(target & 0x3) 10593765Sgblack@eecs.umich.edu fault = new MemAddressNotAligned; 10602561SN/A else 10612561SN/A { 10623765Sgblack@eecs.umich.edu NNPC = target; 10633417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 10642561SN/A Cansave = Cansave + 1; 10652561SN/A Canrestore = Canrestore - 1; 10662561SN/A } 10672561SN/A } 10682526SN/A }}); 10692526SN/A 0x3A: decode CC 10702526SN/A { 10712526SN/A 0x0: Trap::tcci({{ 10722646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 10732561SN/A { 10742561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 10752561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 10763531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 10772561SN/A } 10783765Sgblack@eecs.umich.edu }}, IsSerializeAfter, IsNonSpeculative); 10792526SN/A 0x2: Trap::tccx({{ 10802646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND2)) 10812561SN/A { 10822561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 10832561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 10843531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 10852526SN/A } 10863765Sgblack@eecs.umich.edu }}, IsSerializeAfter, IsNonSpeculative); 10872526SN/A } 10884090Ssaidi@eecs.umich.edu 0x3B: Nop::flush({{/*Instruction memory flush*/}}, IsWriteBarrier, 10894090Ssaidi@eecs.umich.edu MemWriteOp); 10902526SN/A 0x3C: save({{ 10912526SN/A if(Cansave == 0) 10922526SN/A { 10932526SN/A if(Otherwin) 10943909Ssaidi@eecs.umich.edu fault = new SpillNOther(4*Wstate<5:3>); 10952526SN/A else 10963909Ssaidi@eecs.umich.edu fault = new SpillNNormal(4*Wstate<2:0>); 10972526SN/A } 10982526SN/A else if(Cleanwin - Canrestore == 0) 10992526SN/A { 11002526SN/A fault = new CleanWindow; 11012526SN/A } 11022526SN/A else 11032526SN/A { 11042526SN/A Cwp = (Cwp + 1) % NWindows; 11053765Sgblack@eecs.umich.edu Rd_next = Rs1 + Rs2_or_imm13; 11062561SN/A Cansave = Cansave - 1; 11072561SN/A Canrestore = Canrestore + 1; 11082526SN/A } 11092526SN/A }}); 11102526SN/A 0x3D: restore({{ 11112526SN/A if(Canrestore == 0) 11122526SN/A { 11132526SN/A if(Otherwin) 11143909Ssaidi@eecs.umich.edu fault = new FillNOther(4*Wstate<5:3>); 11152526SN/A else 11163909Ssaidi@eecs.umich.edu fault = new FillNNormal(4*Wstate<2:0>); 11172526SN/A } 11182526SN/A else 11192526SN/A { 11203417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 11213765Sgblack@eecs.umich.edu Rd_prev = Rs1 + Rs2_or_imm13; 11222561SN/A Cansave = Cansave + 1; 11232561SN/A Canrestore = Canrestore - 1; 11242526SN/A } 11252526SN/A }}); 11262526SN/A 0x3E: decode FCN { 11272526SN/A 0x0: Priv::done({{ 11282526SN/A if(Tl == 0) 11292526SN/A return new IllegalInstruction; 11302646Ssaidi@eecs.umich.edu 11312646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 11322646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 11332646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 11342646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 11352646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 11363825Ssaidi@eecs.umich.edu Hpstate = Htstate; 11372646Ssaidi@eecs.umich.edu NPC = Tnpc; 11382646Ssaidi@eecs.umich.edu NNPC = Tnpc + 4; 11392526SN/A Tl = Tl - 1; 11402526SN/A }}); 11412938Sgblack@eecs.umich.edu 0x1: Priv::retry({{ 11422526SN/A if(Tl == 0) 11432526SN/A return new IllegalInstruction; 11442646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 11452646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 11462646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 11472646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 11482646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 11493826Ssaidi@eecs.umich.edu Hpstate = Htstate; 11502646Ssaidi@eecs.umich.edu NPC = Tpc; 11513417Sgblack@eecs.umich.edu NNPC = Tnpc; 11522526SN/A Tl = Tl - 1; 11532526SN/A }}); 11542526SN/A } 11552526SN/A } 11562469SN/A } 11572469SN/A 0x3: decode OP3 { 11582526SN/A format Load { 11593272Sgblack@eecs.umich.edu 0x00: lduw({{Rd = Mem.uw;}}); 11603272Sgblack@eecs.umich.edu 0x01: ldub({{Rd = Mem.ub;}}); 11613272Sgblack@eecs.umich.edu 0x02: lduh({{Rd = Mem.uhw;}}); 11623835Sgblack@eecs.umich.edu 0x03: ldtw({{ 11633272Sgblack@eecs.umich.edu uint64_t val = Mem.udw; 11642526SN/A RdLow = val<31:0>; 11652526SN/A RdHigh = val<63:32>; 11663272Sgblack@eecs.umich.edu }}); 11672526SN/A } 11682526SN/A format Store { 11693272Sgblack@eecs.umich.edu 0x04: stw({{Mem.uw = Rd.sw;}}); 11703272Sgblack@eecs.umich.edu 0x05: stb({{Mem.ub = Rd.sb;}}); 11713272Sgblack@eecs.umich.edu 0x06: sth({{Mem.uhw = Rd.shw;}}); 11723835Sgblack@eecs.umich.edu 0x07: sttw({{Mem.udw = RdLow<31:0> | (RdHigh<31:0> << 32);}}); 11732526SN/A } 11742526SN/A format Load { 11753272Sgblack@eecs.umich.edu 0x08: ldsw({{Rd = (int32_t)Mem.sw;}}); 11763272Sgblack@eecs.umich.edu 0x09: ldsb({{Rd = (int8_t)Mem.sb;}}); 11773272Sgblack@eecs.umich.edu 0x0A: ldsh({{Rd = (int16_t)Mem.shw;}}); 11783272Sgblack@eecs.umich.edu 0x0B: ldx({{Rd = (int64_t)Mem.sdw;}}); 11792526SN/A } 11804040Ssaidi@eecs.umich.edu 0x0D: Swap::ldstub({{Mem.ub = 0xFF;}}, 11814040Ssaidi@eecs.umich.edu {{ 11824040Ssaidi@eecs.umich.edu uint8_t tmp = mem_data; 11834040Ssaidi@eecs.umich.edu Rd.ub = tmp; 11844040Ssaidi@eecs.umich.edu }}, MEM_SWAP); 11853272Sgblack@eecs.umich.edu 0x0E: Store::stx({{Mem.udw = Rd}}); 11864040Ssaidi@eecs.umich.edu 0x0F: Swap::swap({{Mem.uw = Rd.uw}}, 11874040Ssaidi@eecs.umich.edu {{ 11884040Ssaidi@eecs.umich.edu uint32_t tmp = mem_data; 11894040Ssaidi@eecs.umich.edu Rd.uw = tmp; 11904040Ssaidi@eecs.umich.edu }}, MEM_SWAP); 11913810Sgblack@eecs.umich.edu format LoadAlt { 11923810Sgblack@eecs.umich.edu 0x10: lduwa({{Rd = Mem.uw;}}, {{EXT_ASI}}); 11933810Sgblack@eecs.umich.edu 0x11: lduba({{Rd = Mem.ub;}}, {{EXT_ASI}}); 11943810Sgblack@eecs.umich.edu 0x12: lduha({{Rd = Mem.uhw;}}, {{EXT_ASI}}); 11953856Ssaidi@eecs.umich.edu 0x13: decode EXT_ASI { 11963926Ssaidi@eecs.umich.edu //ASI_LDTD_AIUP 11973926Ssaidi@eecs.umich.edu 0x22: TwinLoad::ldtx_aiup( 11984040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 11994040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12003926Ssaidi@eecs.umich.edu //ASI_LDTD_AIUS 12013926Ssaidi@eecs.umich.edu 0x23: TwinLoad::ldtx_aius( 12024040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12034040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12043856Ssaidi@eecs.umich.edu //ASI_QUAD_LDD 12053856Ssaidi@eecs.umich.edu 0x24: TwinLoad::ldtx_quad_ldd( 12064040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12074040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12083856Ssaidi@eecs.umich.edu //ASI_LDTX_REAL 12093856Ssaidi@eecs.umich.edu 0x26: TwinLoad::ldtx_real( 12104040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12114040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12124040Ssaidi@eecs.umich.edu //ASI_LDTX_N 12134040Ssaidi@eecs.umich.edu 0x27: TwinLoad::ldtx_n( 12144040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12154040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12164040Ssaidi@eecs.umich.edu //ASI_LDTX_AIUP_L 12174040Ssaidi@eecs.umich.edu 0x2A: TwinLoad::ldtx_aiup_l( 12184040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12194040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12204040Ssaidi@eecs.umich.edu //ASI_LDTX_AIUS_L 12214040Ssaidi@eecs.umich.edu 0x2B: TwinLoad::ldtx_aius_l( 12224040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12234040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12244040Ssaidi@eecs.umich.edu //ASI_LDTX_L 12254040Ssaidi@eecs.umich.edu 0x2C: TwinLoad::ldtx_l( 12264040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12274040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12283856Ssaidi@eecs.umich.edu //ASI_LDTX_REAL_L 12293856Ssaidi@eecs.umich.edu 0x2E: TwinLoad::ldtx_real_l( 12304040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12314040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12323856Ssaidi@eecs.umich.edu //ASI_LDTX_N_L 12333856Ssaidi@eecs.umich.edu 0x2F: TwinLoad::ldtx_n_l( 12344040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12354040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12363901Ssaidi@eecs.umich.edu //ASI_LDTX_P 12373901Ssaidi@eecs.umich.edu 0xE2: TwinLoad::ldtx_p( 12384040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12394040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12403926Ssaidi@eecs.umich.edu //ASI_LDTX_S 12413926Ssaidi@eecs.umich.edu 0xE3: TwinLoad::ldtx_s( 12424040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12434040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12444040Ssaidi@eecs.umich.edu //ASI_LDTX_PL 12454040Ssaidi@eecs.umich.edu 0xEA: TwinLoad::ldtx_pl( 12464040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12474040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12484040Ssaidi@eecs.umich.edu //ASI_LDTX_SL 12494040Ssaidi@eecs.umich.edu 0xEB: TwinLoad::ldtx_sl( 12504040Ssaidi@eecs.umich.edu {{RdLow.udw = (Mem.tudw).a; 12514040Ssaidi@eecs.umich.edu RdHigh.udw = (Mem.tudw).b;}}, {{EXT_ASI}}); 12523856Ssaidi@eecs.umich.edu default: ldtwa({{ 12533856Ssaidi@eecs.umich.edu uint64_t val = Mem.udw; 12543856Ssaidi@eecs.umich.edu RdLow = val<31:0>; 12553856Ssaidi@eecs.umich.edu RdHigh = val<63:32>; 12563856Ssaidi@eecs.umich.edu }}, {{EXT_ASI}}); 12573856Ssaidi@eecs.umich.edu } 12582526SN/A } 12593810Sgblack@eecs.umich.edu format StoreAlt { 12603810Sgblack@eecs.umich.edu 0x14: stwa({{Mem.uw = Rd;}}, {{EXT_ASI}}); 12613810Sgblack@eecs.umich.edu 0x15: stba({{Mem.ub = Rd;}}, {{EXT_ASI}}); 12623810Sgblack@eecs.umich.edu 0x16: stha({{Mem.uhw = Rd;}}, {{EXT_ASI}}); 12633835Sgblack@eecs.umich.edu 0x17: sttwa({{Mem.udw = RdLow<31:0> | RdHigh<31:0> << 32;}}, {{EXT_ASI}}); 12642526SN/A } 12653810Sgblack@eecs.umich.edu format LoadAlt { 12663810Sgblack@eecs.umich.edu 0x18: ldswa({{Rd = (int32_t)Mem.sw;}}, {{EXT_ASI}}); 12673810Sgblack@eecs.umich.edu 0x19: ldsba({{Rd = (int8_t)Mem.sb;}}, {{EXT_ASI}}); 12683810Sgblack@eecs.umich.edu 0x1A: ldsha({{Rd = (int16_t)Mem.shw;}}, {{EXT_ASI}}); 12693810Sgblack@eecs.umich.edu 0x1B: ldxa({{Rd = (int64_t)Mem.sdw;}}, {{EXT_ASI}}); 12702526SN/A } 12714040Ssaidi@eecs.umich.edu 0x1D: SwapAlt::ldstuba({{Mem.ub = 0xFF;}}, 12724040Ssaidi@eecs.umich.edu {{ 12734040Ssaidi@eecs.umich.edu uint8_t tmp = mem_data; 12744040Ssaidi@eecs.umich.edu Rd.ub = tmp; 12754040Ssaidi@eecs.umich.edu }}, {{EXT_ASI}}, MEM_SWAP); 12763810Sgblack@eecs.umich.edu 0x1E: StoreAlt::stxa({{Mem.udw = Rd}}, {{EXT_ASI}}); 12774040Ssaidi@eecs.umich.edu 0x1F: SwapAlt::swapa({{Mem.uw = Rd.uw}}, 12784040Ssaidi@eecs.umich.edu {{ 12794040Ssaidi@eecs.umich.edu uint32_t tmp = mem_data; 12804040Ssaidi@eecs.umich.edu Rd.uw = tmp; 12814040Ssaidi@eecs.umich.edu }}, {{EXT_ASI}}, MEM_SWAP); 12824040Ssaidi@eecs.umich.edu 12832526SN/A format Trap { 12843931Ssaidi@eecs.umich.edu 0x20: Load::ldf({{Frds.uw = Mem.uw;}}); 12854008Ssaidi@eecs.umich.edu 0x21: decode RD { 12864011Ssaidi@eecs.umich.edu 0x0: Load::ldfsr({{fault = checkFpEnableFault(xc); 12874011Ssaidi@eecs.umich.edu if (fault) 12884011Ssaidi@eecs.umich.edu return fault; 12894011Ssaidi@eecs.umich.edu Fsr = Mem.uw | Fsr<63:32>;}}); 12904011Ssaidi@eecs.umich.edu 0x1: Load::ldxfsr({{fault = checkFpEnableFault(xc); 12914011Ssaidi@eecs.umich.edu if (fault) 12924011Ssaidi@eecs.umich.edu return fault; 12934011Ssaidi@eecs.umich.edu Fsr = Mem.udw;}}); 12944008Ssaidi@eecs.umich.edu default: FailUnimpl::ldfsrOther(); 12952469SN/A } 12962526SN/A 0x22: ldqf({{fault = new FpDisabled;}}); 12973272Sgblack@eecs.umich.edu 0x23: Load::lddf({{Frd.udw = Mem.udw;}}); 12983931Ssaidi@eecs.umich.edu 0x24: Store::stf({{Mem.uw = Frds.uw;}}); 12994008Ssaidi@eecs.umich.edu 0x25: decode RD { 13004011Ssaidi@eecs.umich.edu 0x0: Store::stfsr({{fault = checkFpEnableFault(xc); 13014011Ssaidi@eecs.umich.edu if (fault) 13024011Ssaidi@eecs.umich.edu return fault; 13034011Ssaidi@eecs.umich.edu Mem.uw = Fsr<31:0>; 13044008Ssaidi@eecs.umich.edu Fsr = insertBits(Fsr,16,14,0);}}); 13054011Ssaidi@eecs.umich.edu 0x1: Store::stxfsr({{fault = checkFpEnableFault(xc); 13064011Ssaidi@eecs.umich.edu if (fault) 13074011Ssaidi@eecs.umich.edu return fault; 13084011Ssaidi@eecs.umich.edu Mem.udw = Fsr; 13094011Ssaidi@eecs.umich.edu Fsr = insertBits(Fsr,16,14,0);}}); 13104008Ssaidi@eecs.umich.edu default: FailUnimpl::stfsrOther(); 13112526SN/A } 13122526SN/A 0x26: stqf({{fault = new FpDisabled;}}); 13133272Sgblack@eecs.umich.edu 0x27: Store::stdf({{Mem.udw = Frd.udw;}}); 13142526SN/A 0x2D: Nop::prefetch({{ }}); 13153931Ssaidi@eecs.umich.edu 0x30: LoadAlt::ldfa({{Frds.uw = Mem.uw;}}, {{EXT_ASI}}); 13162526SN/A 0x32: ldqfa({{fault = new FpDisabled;}}); 13173272Sgblack@eecs.umich.edu format LoadAlt { 13183272Sgblack@eecs.umich.edu 0x33: decode EXT_ASI { 13193272Sgblack@eecs.umich.edu //ASI_NUCLEUS 13203272Sgblack@eecs.umich.edu 0x04: FailUnimpl::lddfa_n(); 13213272Sgblack@eecs.umich.edu //ASI_NUCLEUS_LITTLE 13223272Sgblack@eecs.umich.edu 0x0C: FailUnimpl::lddfa_nl(); 13233272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY 13243272Sgblack@eecs.umich.edu 0x10: FailUnimpl::lddfa_aiup(); 13253272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY_LITTLE 13263272Sgblack@eecs.umich.edu 0x18: FailUnimpl::lddfa_aiupl(); 13273272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY 13283272Sgblack@eecs.umich.edu 0x11: FailUnimpl::lddfa_aius(); 13293272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY_LITTLE 13303272Sgblack@eecs.umich.edu 0x19: FailUnimpl::lddfa_aiusl(); 13313272Sgblack@eecs.umich.edu //ASI_REAL 13323272Sgblack@eecs.umich.edu 0x14: FailUnimpl::lddfa_real(); 13333272Sgblack@eecs.umich.edu //ASI_REAL_LITTLE 13343272Sgblack@eecs.umich.edu 0x1C: FailUnimpl::lddfa_real_l(); 13353272Sgblack@eecs.umich.edu //ASI_REAL_IO 13363272Sgblack@eecs.umich.edu 0x15: FailUnimpl::lddfa_real_io(); 13373272Sgblack@eecs.umich.edu //ASI_REAL_IO_LITTLE 13383272Sgblack@eecs.umich.edu 0x1D: FailUnimpl::lddfa_real_io_l(); 13393272Sgblack@eecs.umich.edu //ASI_PRIMARY 13403272Sgblack@eecs.umich.edu 0x80: FailUnimpl::lddfa_p(); 13413272Sgblack@eecs.umich.edu //ASI_PRIMARY_LITTLE 13423272Sgblack@eecs.umich.edu 0x88: FailUnimpl::lddfa_pl(); 13433272Sgblack@eecs.umich.edu //ASI_SECONDARY 13443272Sgblack@eecs.umich.edu 0x81: FailUnimpl::lddfa_s(); 13453272Sgblack@eecs.umich.edu //ASI_SECONDARY_LITTLE 13463272Sgblack@eecs.umich.edu 0x89: FailUnimpl::lddfa_sl(); 13473272Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT 13483272Sgblack@eecs.umich.edu 0x82: FailUnimpl::lddfa_pnf(); 13493272Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT_LITTLE 13503272Sgblack@eecs.umich.edu 0x8A: FailUnimpl::lddfa_pnfl(); 13513272Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT 13523272Sgblack@eecs.umich.edu 0x83: FailUnimpl::lddfa_snf(); 13533272Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT_LITTLE 13543272Sgblack@eecs.umich.edu 0x8B: FailUnimpl::lddfa_snfl(); 13553272Sgblack@eecs.umich.edu 13563272Sgblack@eecs.umich.edu format BlockLoad { 13573272Sgblack@eecs.umich.edu // LDBLOCKF 13583272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY 13593272Sgblack@eecs.umich.edu 0x16: FailUnimpl::ldblockf_aiup(); 13603272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY 13613272Sgblack@eecs.umich.edu 0x17: FailUnimpl::ldblockf_aius(); 13623272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 13633272Sgblack@eecs.umich.edu 0x1E: FailUnimpl::ldblockf_aiupl(); 13643272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 13653272Sgblack@eecs.umich.edu 0x1F: FailUnimpl::ldblockf_aiusl(); 13663272Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY 13673810Sgblack@eecs.umich.edu 0xF0: ldblockf_p({{Frd_N.udw = Mem.udw;}}, {{EXT_ASI}}); 13683272Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY 13693272Sgblack@eecs.umich.edu 0xF1: FailUnimpl::ldblockf_s(); 13703272Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY_LITTLE 13713272Sgblack@eecs.umich.edu 0xF8: FailUnimpl::ldblockf_pl(); 13723272Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY_LITTLE 13733272Sgblack@eecs.umich.edu 0xF9: FailUnimpl::ldblockf_sl(); 13743272Sgblack@eecs.umich.edu } 13753272Sgblack@eecs.umich.edu 13763272Sgblack@eecs.umich.edu //LDSHORTF 13773272Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY 13783272Sgblack@eecs.umich.edu 0xD0: FailUnimpl::ldshortf_8p(); 13793272Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY 13803272Sgblack@eecs.umich.edu 0xD1: FailUnimpl::ldshortf_8s(); 13813272Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY_LITTLE 13823272Sgblack@eecs.umich.edu 0xD8: FailUnimpl::ldshortf_8pl(); 13833272Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY_LITTLE 13843272Sgblack@eecs.umich.edu 0xD9: FailUnimpl::ldshortf_8sl(); 13853272Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY 13863272Sgblack@eecs.umich.edu 0xD2: FailUnimpl::ldshortf_16p(); 13873272Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY 13883272Sgblack@eecs.umich.edu 0xD3: FailUnimpl::ldshortf_16s(); 13893272Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY_LITTLE 13903272Sgblack@eecs.umich.edu 0xDA: FailUnimpl::ldshortf_16pl(); 13913272Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY_LITTLE 13923272Sgblack@eecs.umich.edu 0xDB: FailUnimpl::ldshortf_16sl(); 13933272Sgblack@eecs.umich.edu //Not an ASI which is legal with lddfa 13943378Sgblack@eecs.umich.edu default: Trap::lddfa_bad_asi( 13953378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 13963272Sgblack@eecs.umich.edu } 13973272Sgblack@eecs.umich.edu } 13983931Ssaidi@eecs.umich.edu 0x34: Store::stfa({{Mem.uw = Frds.uw;}}); 13992954Sgblack@eecs.umich.edu 0x36: stqfa({{fault = new FpDisabled;}}); 14003378Sgblack@eecs.umich.edu format StoreAlt { 14013378Sgblack@eecs.umich.edu 0x37: decode EXT_ASI { 14023378Sgblack@eecs.umich.edu //ASI_NUCLEUS 14033378Sgblack@eecs.umich.edu 0x04: FailUnimpl::stdfa_n(); 14043378Sgblack@eecs.umich.edu //ASI_NUCLEUS_LITTLE 14053378Sgblack@eecs.umich.edu 0x0C: FailUnimpl::stdfa_nl(); 14063378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY 14073378Sgblack@eecs.umich.edu 0x10: FailUnimpl::stdfa_aiup(); 14083378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY_LITTLE 14093378Sgblack@eecs.umich.edu 0x18: FailUnimpl::stdfa_aiupl(); 14103378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY 14113378Sgblack@eecs.umich.edu 0x11: FailUnimpl::stdfa_aius(); 14123378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY_LITTLE 14133378Sgblack@eecs.umich.edu 0x19: FailUnimpl::stdfa_aiusl(); 14143378Sgblack@eecs.umich.edu //ASI_REAL 14153378Sgblack@eecs.umich.edu 0x14: FailUnimpl::stdfa_real(); 14163378Sgblack@eecs.umich.edu //ASI_REAL_LITTLE 14173378Sgblack@eecs.umich.edu 0x1C: FailUnimpl::stdfa_real_l(); 14183378Sgblack@eecs.umich.edu //ASI_REAL_IO 14193378Sgblack@eecs.umich.edu 0x15: FailUnimpl::stdfa_real_io(); 14203378Sgblack@eecs.umich.edu //ASI_REAL_IO_LITTLE 14213378Sgblack@eecs.umich.edu 0x1D: FailUnimpl::stdfa_real_io_l(); 14223378Sgblack@eecs.umich.edu //ASI_PRIMARY 14233378Sgblack@eecs.umich.edu 0x80: FailUnimpl::stdfa_p(); 14243378Sgblack@eecs.umich.edu //ASI_PRIMARY_LITTLE 14253378Sgblack@eecs.umich.edu 0x88: FailUnimpl::stdfa_pl(); 14263378Sgblack@eecs.umich.edu //ASI_SECONDARY 14273378Sgblack@eecs.umich.edu 0x81: FailUnimpl::stdfa_s(); 14283378Sgblack@eecs.umich.edu //ASI_SECONDARY_LITTLE 14293378Sgblack@eecs.umich.edu 0x89: FailUnimpl::stdfa_sl(); 14303378Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT 14313378Sgblack@eecs.umich.edu 0x82: FailUnimpl::stdfa_pnf(); 14323378Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT_LITTLE 14333378Sgblack@eecs.umich.edu 0x8A: FailUnimpl::stdfa_pnfl(); 14343378Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT 14353378Sgblack@eecs.umich.edu 0x83: FailUnimpl::stdfa_snf(); 14363378Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT_LITTLE 14373378Sgblack@eecs.umich.edu 0x8B: FailUnimpl::stdfa_snfl(); 14383378Sgblack@eecs.umich.edu 14393378Sgblack@eecs.umich.edu format BlockStore { 14403378Sgblack@eecs.umich.edu // STBLOCKF 14413378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY 14423378Sgblack@eecs.umich.edu 0x16: FailUnimpl::stblockf_aiup(); 14433378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY 14443378Sgblack@eecs.umich.edu 0x17: FailUnimpl::stblockf_aius(); 14453378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 14463378Sgblack@eecs.umich.edu 0x1E: FailUnimpl::stblockf_aiupl(); 14473378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 14483378Sgblack@eecs.umich.edu 0x1F: FailUnimpl::stblockf_aiusl(); 14493378Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY 14503810Sgblack@eecs.umich.edu 0xF0: stblockf_p({{Mem.udw = Frd_N.udw;}}, {{EXT_ASI}}); 14513378Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY 14523378Sgblack@eecs.umich.edu 0xF1: FailUnimpl::stblockf_s(); 14533378Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY_LITTLE 14543378Sgblack@eecs.umich.edu 0xF8: FailUnimpl::stblockf_pl(); 14553378Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY_LITTLE 14563378Sgblack@eecs.umich.edu 0xF9: FailUnimpl::stblockf_sl(); 14573378Sgblack@eecs.umich.edu } 14583378Sgblack@eecs.umich.edu 14593378Sgblack@eecs.umich.edu //STSHORTF 14603378Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY 14613378Sgblack@eecs.umich.edu 0xD0: FailUnimpl::stshortf_8p(); 14623378Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY 14633378Sgblack@eecs.umich.edu 0xD1: FailUnimpl::stshortf_8s(); 14643378Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY_LITTLE 14653378Sgblack@eecs.umich.edu 0xD8: FailUnimpl::stshortf_8pl(); 14663378Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY_LITTLE 14673378Sgblack@eecs.umich.edu 0xD9: FailUnimpl::stshortf_8sl(); 14683378Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY 14693378Sgblack@eecs.umich.edu 0xD2: FailUnimpl::stshortf_16p(); 14703378Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY 14713378Sgblack@eecs.umich.edu 0xD3: FailUnimpl::stshortf_16s(); 14723378Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY_LITTLE 14733378Sgblack@eecs.umich.edu 0xDA: FailUnimpl::stshortf_16pl(); 14743378Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY_LITTLE 14753378Sgblack@eecs.umich.edu 0xDB: FailUnimpl::stshortf_16sl(); 14763378Sgblack@eecs.umich.edu //Not an ASI which is legal with lddfa 14773378Sgblack@eecs.umich.edu default: Trap::stdfa_bad_asi( 14783378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 14793378Sgblack@eecs.umich.edu } 14803378Sgblack@eecs.umich.edu } 14814040Ssaidi@eecs.umich.edu 0x3C: CasAlt::casa({{ 14824040Ssaidi@eecs.umich.edu mem_data = htog(Rs2.uw); 14834040Ssaidi@eecs.umich.edu Mem.uw = Rd.uw;}}, 14844040Ssaidi@eecs.umich.edu {{ 14854040Ssaidi@eecs.umich.edu uint32_t tmp = mem_data; 14864040Ssaidi@eecs.umich.edu Rd.uw = tmp; 14874040Ssaidi@eecs.umich.edu }}, {{EXT_ASI}}, MEM_SWAP_COND); 14882526SN/A 0x3D: Nop::prefetcha({{ }}); 14894040Ssaidi@eecs.umich.edu 0x3E: CasAlt::casxa({{mem_data = gtoh(Rs2); 14904040Ssaidi@eecs.umich.edu Mem.udw = Rd.udw; }}, 14914040Ssaidi@eecs.umich.edu {{ Rd.udw = mem_data; }}, {{EXT_ASI}}, MEM_SWAP_COND); 14922526SN/A } 14932469SN/A } 14942022SN/A} 1495