decoder.isa revision 3941
13900Ssaidi@eecs.umich.edu// Copyright (c) 2006-2007 The Regents of The University of Michigan 22632Sstever@eecs.umich.edu// All rights reserved. 32632Sstever@eecs.umich.edu// 42632Sstever@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 52632Sstever@eecs.umich.edu// modification, are permitted provided that the following conditions are 62632Sstever@eecs.umich.edu// met: redistributions of source code must retain the above copyright 72632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 82632Sstever@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 92632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 102632Sstever@eecs.umich.edu// documentation and/or other materials provided with the distribution; 112632Sstever@eecs.umich.edu// neither the name of the copyright holders nor the names of its 122632Sstever@eecs.umich.edu// contributors may be used to endorse or promote products derived from 132632Sstever@eecs.umich.edu// this software without specific prior written permission. 142632Sstever@eecs.umich.edu// 152632Sstever@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 162632Sstever@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 172632Sstever@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 182632Sstever@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 192632Sstever@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 202632Sstever@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 212632Sstever@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 222632Sstever@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 232632Sstever@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 242632Sstever@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 252632Sstever@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 262632Sstever@eecs.umich.edu// 272632Sstever@eecs.umich.edu// Authors: Ali Saidi 282632Sstever@eecs.umich.edu// Gabe Black 292632Sstever@eecs.umich.edu// Steve Reinhardt 302632Sstever@eecs.umich.edu 312022SN/A//////////////////////////////////////////////////////////////////// 322022SN/A// 332022SN/A// The actual decoder specification 342022SN/A// 352022SN/A 362469SN/Adecode OP default Unknown::unknown() 372469SN/A{ 382469SN/A 0x0: decode OP2 392469SN/A { 402516SN/A //Throw an illegal instruction acception 412516SN/A 0x0: Trap::illtrap({{fault = new IllegalInstruction;}}); 422944Sgblack@eecs.umich.edu format BranchN 432482SN/A { 443598Sgblack@eecs.umich.edu //bpcc 453056Sgblack@eecs.umich.edu 0x1: decode COND2 462469SN/A { 473056Sgblack@eecs.umich.edu //Branch Always 483056Sgblack@eecs.umich.edu 0x8: decode A 493056Sgblack@eecs.umich.edu { 503598Sgblack@eecs.umich.edu 0x0: bpa(19, {{ 512516SN/A NNPC = xc->readPC() + disp; 523056Sgblack@eecs.umich.edu }}); 533598Sgblack@eecs.umich.edu 0x1: bpa(19, {{ 543056Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 553056Sgblack@eecs.umich.edu NNPC = NPC + 4; 563056Sgblack@eecs.umich.edu }}, ',a'); 573056Sgblack@eecs.umich.edu } 583056Sgblack@eecs.umich.edu //Branch Never 593056Sgblack@eecs.umich.edu 0x0: decode A 603056Sgblack@eecs.umich.edu { 613598Sgblack@eecs.umich.edu 0x0: bpn(19, {{ 623056Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 633056Sgblack@eecs.umich.edu }}); 643598Sgblack@eecs.umich.edu 0x1: bpn(19, {{ 653056Sgblack@eecs.umich.edu NPC = xc->readNextPC() + 4; 663056Sgblack@eecs.umich.edu NNPC = NPC + 4; 673056Sgblack@eecs.umich.edu }}, ',a'); 683056Sgblack@eecs.umich.edu } 693056Sgblack@eecs.umich.edu default: decode BPCC 703056Sgblack@eecs.umich.edu { 713056Sgblack@eecs.umich.edu 0x0: bpcci(19, {{ 723056Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 733056Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 743056Sgblack@eecs.umich.edu else 753056Sgblack@eecs.umich.edu handle_annul 763056Sgblack@eecs.umich.edu }}); 773056Sgblack@eecs.umich.edu 0x2: bpccx(19, {{ 783056Sgblack@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND2)) 793056Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 803056Sgblack@eecs.umich.edu else 813056Sgblack@eecs.umich.edu handle_annul 823056Sgblack@eecs.umich.edu }}); 833056Sgblack@eecs.umich.edu } 842482SN/A } 853598Sgblack@eecs.umich.edu //bicc 863598Sgblack@eecs.umich.edu 0x2: decode COND2 873598Sgblack@eecs.umich.edu { 883598Sgblack@eecs.umich.edu //Branch Always 893598Sgblack@eecs.umich.edu 0x8: decode A 903598Sgblack@eecs.umich.edu { 913598Sgblack@eecs.umich.edu 0x0: ba(22, {{ 923598Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 933598Sgblack@eecs.umich.edu }}); 943598Sgblack@eecs.umich.edu 0x1: ba(22, {{ 953598Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 963598Sgblack@eecs.umich.edu NNPC = NPC + 4; 973598Sgblack@eecs.umich.edu }}, ',a'); 983598Sgblack@eecs.umich.edu } 993598Sgblack@eecs.umich.edu //Branch Never 1003598Sgblack@eecs.umich.edu 0x0: decode A 1013598Sgblack@eecs.umich.edu { 1023598Sgblack@eecs.umich.edu 0x0: bn(22, {{ 1033598Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 1043598Sgblack@eecs.umich.edu }}); 1053598Sgblack@eecs.umich.edu 0x1: bn(22, {{ 1063598Sgblack@eecs.umich.edu NPC = xc->readNextPC() + 4; 1073598Sgblack@eecs.umich.edu NNPC = NPC + 4; 1083598Sgblack@eecs.umich.edu }}, ',a'); 1093598Sgblack@eecs.umich.edu } 1103598Sgblack@eecs.umich.edu default: bicc(22, {{ 1113598Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 1123598Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 1133598Sgblack@eecs.umich.edu else 1143598Sgblack@eecs.umich.edu handle_annul 1153598Sgblack@eecs.umich.edu }}); 1163598Sgblack@eecs.umich.edu } 1172516SN/A } 1182516SN/A 0x3: decode RCOND2 1192516SN/A { 1202516SN/A format BranchSplit 1212482SN/A { 1222482SN/A 0x1: bpreq({{ 1232591SN/A if(Rs1.sdw == 0) 1242516SN/A NNPC = xc->readPC() + disp; 1252580SN/A else 1262580SN/A handle_annul 1272482SN/A }}); 1282482SN/A 0x2: bprle({{ 1292591SN/A if(Rs1.sdw <= 0) 1302516SN/A NNPC = xc->readPC() + disp; 1312580SN/A else 1322580SN/A handle_annul 1332482SN/A }}); 1342482SN/A 0x3: bprl({{ 1352591SN/A if(Rs1.sdw < 0) 1362516SN/A NNPC = xc->readPC() + disp; 1372580SN/A else 1382580SN/A handle_annul 1392482SN/A }}); 1402482SN/A 0x5: bprne({{ 1412591SN/A if(Rs1.sdw != 0) 1422516SN/A NNPC = xc->readPC() + disp; 1432580SN/A else 1442580SN/A handle_annul 1452482SN/A }}); 1462482SN/A 0x6: bprg({{ 1472591SN/A if(Rs1.sdw > 0) 1482516SN/A NNPC = xc->readPC() + disp; 1492580SN/A else 1502580SN/A handle_annul 1512482SN/A }}); 1522482SN/A 0x7: bprge({{ 1532591SN/A if(Rs1.sdw >= 0) 1542516SN/A NNPC = xc->readPC() + disp; 1552580SN/A else 1562580SN/A handle_annul 1572482SN/A }}); 1582469SN/A } 1592482SN/A } 1602516SN/A //SETHI (or NOP if rd == 0 and imm == 0) 1613042Sgblack@eecs.umich.edu 0x4: SetHi::sethi({{Rd.udw = imm;}}); 1623941Ssaidi@eecs.umich.edu 0x5: FailUnimpl::fbpfcc(); 1633941Ssaidi@eecs.umich.edu 0x6: FailUnimpl::fbfcc(); 1642469SN/A } 1652944Sgblack@eecs.umich.edu 0x1: BranchN::call(30, {{ 1663928Ssaidi@eecs.umich.edu if (Pstate<3:>) 1673928Ssaidi@eecs.umich.edu R15 = (xc->readPC())<31:0>; 1683928Ssaidi@eecs.umich.edu else 1693928Ssaidi@eecs.umich.edu R15 = xc->readPC(); 1702516SN/A NNPC = R15 + disp; 1712469SN/A }}); 1722469SN/A 0x2: decode OP3 { 1732482SN/A format IntOp { 1742482SN/A 0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}}); 1752974Sgblack@eecs.umich.edu 0x01: and({{Rd = Rs1.sdw & Rs2_or_imm13;}}); 1762974Sgblack@eecs.umich.edu 0x02: or({{Rd = Rs1.sdw | Rs2_or_imm13;}}); 1772974Sgblack@eecs.umich.edu 0x03: xor({{Rd = Rs1.sdw ^ Rs2_or_imm13;}}); 1782526SN/A 0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}}); 1792974Sgblack@eecs.umich.edu 0x05: andn({{Rd = Rs1.sdw & ~Rs2_or_imm13;}}); 1802974Sgblack@eecs.umich.edu 0x06: orn({{Rd = Rs1.sdw | ~Rs2_or_imm13;}}); 1812974Sgblack@eecs.umich.edu 0x07: xnor({{Rd = ~(Rs1.sdw ^ Rs2_or_imm13);}}); 1822646Ssaidi@eecs.umich.edu 0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + Ccr<0:0>;}}); 1832974Sgblack@eecs.umich.edu 0x09: mulx({{Rd = Rs1.sdw * Rs2_or_imm13;}}); 1842469SN/A 0x0A: umul({{ 1852516SN/A Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>; 1862646Ssaidi@eecs.umich.edu Y = Rd<63:32>; 1872482SN/A }}); 1882469SN/A 0x0B: smul({{ 1893931Ssaidi@eecs.umich.edu Rd.sdw = sext<32>(Rs1.sdw<31:0>) * sext<32>(Rs2_or_imm13<31:0>); 1903900Ssaidi@eecs.umich.edu Y = Rd.sdw<63:32>; 1912482SN/A }}); 1922954Sgblack@eecs.umich.edu 0x0C: subc({{Rd.sdw = Rs1.sdw + (~Rs2_or_imm13) + 1 - Ccr<0:0>}}); 1932469SN/A 0x0D: udivx({{ 1942516SN/A if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 1952516SN/A else Rd.udw = Rs1.udw / Rs2_or_imm13; 1962482SN/A }}); 1972469SN/A 0x0E: udiv({{ 1982516SN/A if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 1992482SN/A else 2002482SN/A { 2012646Ssaidi@eecs.umich.edu Rd.udw = ((Y << 32) | Rs1.udw<31:0>) / Rs2_or_imm13; 2022482SN/A if(Rd.udw >> 32 != 0) 2032482SN/A Rd.udw = 0xFFFFFFFF; 2042482SN/A } 2052482SN/A }}); 2062482SN/A 0x0F: sdiv({{ 2072615SN/A if(Rs2_or_imm13.sdw == 0) 2082469SN/A fault = new DivisionByZero; 2092469SN/A else 2102482SN/A { 2112646Ssaidi@eecs.umich.edu Rd.udw = ((int64_t)((Y << 32) | Rs1.sdw<31:0>)) / Rs2_or_imm13.sdw; 2123929Ssaidi@eecs.umich.edu if((int64_t)Rd.udw >= std::numeric_limits<int32_t>::max()) 2132482SN/A Rd.udw = 0x7FFFFFFF; 2143929Ssaidi@eecs.umich.edu else if((int64_t)Rd.udw <= std::numeric_limits<int32_t>::min()) 2153929Ssaidi@eecs.umich.edu Rd.udw = ULL(0xFFFFFFFF80000000); 2162482SN/A } 2172526SN/A }}); 2182469SN/A } 2192482SN/A format IntOpCc { 2202469SN/A 0x10: addcc({{ 2212516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 2222469SN/A Rd = resTemp = Rs1 + val2;}}, 2232580SN/A {{(Rs1<31:0> + val2<31:0>)<32:>}}, 2242469SN/A {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 2252580SN/A {{(Rs1<63:1> + val2<63:1> + (Rs1 & val2)<0:>)<63:>}}, 2262469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 2272526SN/A ); 2282482SN/A 0x11: IntOpCcRes::andcc({{Rd = Rs1 & Rs2_or_imm13;}}); 2292482SN/A 0x12: IntOpCcRes::orcc({{Rd = Rs1 | Rs2_or_imm13;}}); 2302482SN/A 0x13: IntOpCcRes::xorcc({{Rd = Rs1 ^ Rs2_or_imm13;}}); 2312469SN/A 0x14: subcc({{ 2322580SN/A int64_t val2 = Rs2_or_imm13; 2332580SN/A Rd = Rs1 - val2;}}, 2342580SN/A {{(~(Rs1<31:0> + (~val2)<31:0> + 1))<32:>}}, 2352580SN/A {{(Rs1<31:> != val2<31:>) && (Rs1<31:> != Rd<31:>)}}, 2362580SN/A {{(~(Rs1<63:1> + (~val2)<63:1> + 2372580SN/A (Rs1 | ~val2)<0:>))<63:>}}, 2382580SN/A {{Rs1<63:> != val2<63:> && Rs1<63:> != Rd<63:>}} 2392526SN/A ); 2402482SN/A 0x15: IntOpCcRes::andncc({{Rd = Rs1 & ~Rs2_or_imm13;}}); 2412482SN/A 0x16: IntOpCcRes::orncc({{Rd = Rs1 | ~Rs2_or_imm13;}}); 2422482SN/A 0x17: IntOpCcRes::xnorcc({{Rd = ~(Rs1 ^ Rs2_or_imm13);}}); 2432469SN/A 0x18: addccc({{ 2442516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 2452646Ssaidi@eecs.umich.edu int64_t carryin = Ccr<0:0>; 2462469SN/A Rd = resTemp = Rs1 + val2 + carryin;}}, 2472580SN/A {{(Rs1<31:0> + val2<31:0> + carryin)<32:>}}, 2482469SN/A {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 2493931Ssaidi@eecs.umich.edu {{((Rs1 & val2) | (~resTemp & (Rs1 | val2)))<63:>}}, 2502469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 2512526SN/A ); 2522469SN/A 0x1A: umulcc({{ 2532615SN/A uint64_t resTemp; 2542615SN/A Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>; 2552646Ssaidi@eecs.umich.edu Y = resTemp<63:32>;}}, 2562526SN/A {{0}},{{0}},{{0}},{{0}}); 2572469SN/A 0x1B: smulcc({{ 2582615SN/A int64_t resTemp; 2593931Ssaidi@eecs.umich.edu Rd = resTemp = sext<32>(Rs1.sdw<31:0>) * sext<32>(Rs2_or_imm13<31:0>); 2602646Ssaidi@eecs.umich.edu Y = resTemp<63:32>;}}, 2612526SN/A {{0}},{{0}},{{0}},{{0}}); 2622469SN/A 0x1C: subccc({{ 2632516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 2642646Ssaidi@eecs.umich.edu int64_t carryin = Ccr<0:0>; 2652954Sgblack@eecs.umich.edu Rd = resTemp = Rs1 + ~val2 + 1 - carryin;}}, 2663931Ssaidi@eecs.umich.edu {{((~Rs1 & val2) | (resTemp & (~Rs1 | val2)))<31:>}}, 2672469SN/A {{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}}, 2683931Ssaidi@eecs.umich.edu {{((~Rs1 & val2) | (resTemp & (~Rs1 | val2)))<63:>}}, 2692469SN/A {{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}} 2702526SN/A ); 2712469SN/A 0x1D: udivxcc({{ 2722615SN/A if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero; 2732615SN/A else Rd = Rs1.udw / Rs2_or_imm13.udw;}} 2742526SN/A ,{{0}},{{0}},{{0}},{{0}}); 2752469SN/A 0x1E: udivcc({{ 2762615SN/A uint32_t resTemp, val2 = Rs2_or_imm13.udw; 2772989Ssaidi@eecs.umich.edu int32_t overflow = 0; 2782469SN/A if(val2 == 0) fault = new DivisionByZero; 2792469SN/A else 2802224SN/A { 2812646Ssaidi@eecs.umich.edu resTemp = (uint64_t)((Y << 32) | Rs1.udw<31:0>) / val2; 2822516SN/A overflow = (resTemp<63:32> != 0); 2832516SN/A if(overflow) Rd = resTemp = 0xFFFFFFFF; 2842516SN/A else Rd = resTemp; 2852469SN/A } }}, 2862469SN/A {{0}}, 2872469SN/A {{overflow}}, 2882469SN/A {{0}}, 2892469SN/A {{0}} 2902526SN/A ); 2912469SN/A 0x1F: sdivcc({{ 2922996Sgblack@eecs.umich.edu int64_t val2 = Rs2_or_imm13.sdw<31:0>; 2932996Sgblack@eecs.umich.edu bool overflow = false, underflow = false; 2942469SN/A if(val2 == 0) fault = new DivisionByZero; 2952469SN/A else 2962469SN/A { 2972996Sgblack@eecs.umich.edu Rd = (int64_t)((Y << 32) | Rs1.sdw<31:0>) / val2; 2983929Ssaidi@eecs.umich.edu overflow = ((int64_t)Rd >= std::numeric_limits<int32_t>::max()); 2993929Ssaidi@eecs.umich.edu underflow = ((int64_t)Rd <= std::numeric_limits<int32_t>::min()); 3002996Sgblack@eecs.umich.edu if(overflow) Rd = 0x7FFFFFFF; 3013929Ssaidi@eecs.umich.edu else if(underflow) Rd = ULL(0xFFFFFFFF80000000); 3022469SN/A } }}, 3032469SN/A {{0}}, 3042469SN/A {{overflow || underflow}}, 3052469SN/A {{0}}, 3062469SN/A {{0}} 3072526SN/A ); 3082469SN/A 0x20: taddcc({{ 3092516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3102469SN/A Rd = resTemp = Rs1 + val2; 3112469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}}, 3123753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 3132469SN/A {{overflow}}, 3142469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3152469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3162526SN/A ); 3172469SN/A 0x21: tsubcc({{ 3182516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3192469SN/A Rd = resTemp = Rs1 + val2; 3202469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}}, 3213753Sgblack@eecs.umich.edu {{(Rs1<31:0> + val2<31:0>)<32:0>}}, 3222469SN/A {{overflow}}, 3232469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3242469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3252526SN/A ); 3262469SN/A 0x22: taddcctv({{ 3272996Sgblack@eecs.umich.edu int64_t val2 = Rs2_or_imm13; 3282996Sgblack@eecs.umich.edu Rd = Rs1 + val2; 3292954Sgblack@eecs.umich.edu int32_t overflow = Rs1<1:0> || val2<1:0> || 3302954Sgblack@eecs.umich.edu (Rs1<31:> == val2<31:> && val2<31:> != Rd<31:>); 3312469SN/A if(overflow) fault = new TagOverflow;}}, 3323753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 3332469SN/A {{overflow}}, 3342469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3352996Sgblack@eecs.umich.edu {{Rs1<63:> == val2<63:> && val2<63:> != Rd<63:>}} 3362526SN/A ); 3372469SN/A 0x23: tsubcctv({{ 3382516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3392469SN/A Rd = resTemp = Rs1 + val2; 3402469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>); 3412469SN/A if(overflow) fault = new TagOverflow;}}, 3423753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 3432469SN/A {{overflow}}, 3442469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3452469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3462526SN/A ); 3472469SN/A 0x24: mulscc({{ 3482516SN/A int64_t resTemp, multiplicand = Rs2_or_imm13; 3492469SN/A int32_t multiplier = Rs1<31:0>; 3502469SN/A int32_t savedLSB = Rs1<0:>; 3512516SN/A multiplier = multiplier<31:1> | 3523753Sgblack@eecs.umich.edu ((Ccr<3:3> ^ Ccr<1:1>) << 32); 3532646Ssaidi@eecs.umich.edu if(!Y<0:>) 3542469SN/A multiplicand = 0; 3552469SN/A Rd = resTemp = multiplicand + multiplier; 3562646Ssaidi@eecs.umich.edu Y = Y<31:1> | (savedLSB << 31);}}, 3573753Sgblack@eecs.umich.edu {{((multiplicand<31:0> + multiplier<31:0>)<32:0>)}}, 3582469SN/A {{multiplicand<31:> == multiplier<31:> && multiplier<31:> != resTemp<31:>}}, 3592469SN/A {{((multiplicand >> 1) + (multiplier >> 1) + (multiplicand & multiplier & 0x1))<63:>}}, 3602469SN/A {{multiplicand<63:> == multiplier<63:> && multiplier<63:> != resTemp<63:>}} 3612526SN/A ); 3622526SN/A } 3632526SN/A format IntOp 3642526SN/A { 3652526SN/A 0x25: decode X { 3662526SN/A 0x0: sll({{Rd = Rs1 << (I ? SHCNT32 : Rs2<4:0>);}}); 3672526SN/A 0x1: sllx({{Rd = Rs1 << (I ? SHCNT64 : Rs2<5:0>);}}); 3682469SN/A } 3692526SN/A 0x26: decode X { 3702526SN/A 0x0: srl({{Rd = Rs1.uw >> (I ? SHCNT32 : Rs2<4:0>);}}); 3712526SN/A 0x1: srlx({{Rd = Rs1.udw >> (I ? SHCNT64 : Rs2<5:0>);}}); 3722526SN/A } 3732526SN/A 0x27: decode X { 3742526SN/A 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}}); 3752526SN/A 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}}); 3762526SN/A } 3772954Sgblack@eecs.umich.edu 0x28: decode RS1 { 3783929Ssaidi@eecs.umich.edu 0x00: NoPriv::rdy({{Rd = Y<31:0>;}}); 3793587Sgblack@eecs.umich.edu //1 should cause an illegal instruction exception 3803587Sgblack@eecs.umich.edu 0x02: NoPriv::rdccr({{Rd = Ccr;}}); 3813587Sgblack@eecs.umich.edu 0x03: NoPriv::rdasi({{Rd = Asi;}}); 3823823Ssaidi@eecs.umich.edu 0x04: PrivCheck::rdtick({{Rd = Tick;}}, {{Tick<63:>}}); 3833587Sgblack@eecs.umich.edu 0x05: NoPriv::rdpc({{ 3843587Sgblack@eecs.umich.edu if(Pstate<3:>) 3853587Sgblack@eecs.umich.edu Rd = (xc->readPC())<31:0>; 3863587Sgblack@eecs.umich.edu else 3873587Sgblack@eecs.umich.edu Rd = xc->readPC();}}); 3883587Sgblack@eecs.umich.edu 0x06: NoPriv::rdfprs({{ 3893587Sgblack@eecs.umich.edu //Wait for all fpops to finish. 3903587Sgblack@eecs.umich.edu Rd = Fprs; 3913587Sgblack@eecs.umich.edu }}); 3923587Sgblack@eecs.umich.edu //7-14 should cause an illegal instruction exception 3933587Sgblack@eecs.umich.edu 0x0F: decode I { 3942954Sgblack@eecs.umich.edu 0x0: Nop::stbar({{/*stuff*/}}); 3952954Sgblack@eecs.umich.edu 0x1: Nop::membar({{/*stuff*/}}); 3962954Sgblack@eecs.umich.edu } 3973587Sgblack@eecs.umich.edu 0x10: Priv::rdpcr({{Rd = Pcr;}}); 3983587Sgblack@eecs.umich.edu 0x11: PrivCheck::rdpic({{Rd = Pic;}}, {{Pcr<0:>}}); 3993587Sgblack@eecs.umich.edu //0x12 should cause an illegal instruction exception 4003587Sgblack@eecs.umich.edu 0x13: NoPriv::rdgsr({{ 4013587Sgblack@eecs.umich.edu if(Fprs<2:> == 0 || Pstate<4:> == 0) 4023587Sgblack@eecs.umich.edu Rd = Gsr; 4033587Sgblack@eecs.umich.edu else 4043587Sgblack@eecs.umich.edu fault = new FpDisabled; 4052954Sgblack@eecs.umich.edu }}); 4063587Sgblack@eecs.umich.edu //0x14-0x15 should cause an illegal instruction exception 4073587Sgblack@eecs.umich.edu 0x16: Priv::rdsoftint({{Rd = Softint;}}); 4083823Ssaidi@eecs.umich.edu 0x17: Priv::rdtick_cmpr({{Rd = TickCmpr;}}); 4093823Ssaidi@eecs.umich.edu 0x18: PrivCheck::rdstick({{Rd = Stick}}, {{Stick<63:>}}); 4103823Ssaidi@eecs.umich.edu 0x19: Priv::rdstick_cmpr({{Rd = StickCmpr;}}); 4113598Sgblack@eecs.umich.edu 0x1A: Priv::rdstrand_sts_reg({{ 4123598Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 4133598Sgblack@eecs.umich.edu Rd = StrandStsReg<0:>; 4143598Sgblack@eecs.umich.edu else 4153598Sgblack@eecs.umich.edu Rd = StrandStsReg; 4163598Sgblack@eecs.umich.edu }}); 4173598Sgblack@eecs.umich.edu //0x1A is supposed to be reserved, but it reads the strand 4183598Sgblack@eecs.umich.edu //status register. 4193598Sgblack@eecs.umich.edu //0x1B-0x1F should cause an illegal instruction exception 4202954Sgblack@eecs.umich.edu } 4213587Sgblack@eecs.umich.edu 0x29: decode RS1 { 4223587Sgblack@eecs.umich.edu 0x00: HPriv::rdhprhpstate({{Rd = Hpstate;}}); 4233587Sgblack@eecs.umich.edu 0x01: HPriv::rdhprhtstate({{ 4243587Sgblack@eecs.umich.edu if(Tl == 0) 4253587Sgblack@eecs.umich.edu return new IllegalInstruction; 4263587Sgblack@eecs.umich.edu Rd = Htstate; 4273587Sgblack@eecs.umich.edu }}); 4283587Sgblack@eecs.umich.edu //0x02 should cause an illegal instruction exception 4293587Sgblack@eecs.umich.edu 0x03: HPriv::rdhprhintp({{Rd = Hintp;}}); 4303587Sgblack@eecs.umich.edu //0x04 should cause an illegal instruction exception 4313587Sgblack@eecs.umich.edu 0x05: HPriv::rdhprhtba({{Rd = Htba;}}); 4323587Sgblack@eecs.umich.edu 0x06: HPriv::rdhprhver({{Rd = Hver;}}); 4333587Sgblack@eecs.umich.edu //0x07-0x1E should cause an illegal instruction exception 4343823Ssaidi@eecs.umich.edu 0x1F: HPriv::rdhprhstick_cmpr({{Rd = HstickCmpr;}}); 4353587Sgblack@eecs.umich.edu } 4363587Sgblack@eecs.umich.edu 0x2A: decode RS1 { 4373587Sgblack@eecs.umich.edu 0x00: Priv::rdprtpc({{ 4383587Sgblack@eecs.umich.edu if(Tl == 0) 4393587Sgblack@eecs.umich.edu return new IllegalInstruction; 4403587Sgblack@eecs.umich.edu Rd = Tpc; 4413587Sgblack@eecs.umich.edu }}); 4423587Sgblack@eecs.umich.edu 0x01: Priv::rdprtnpc({{ 4433587Sgblack@eecs.umich.edu if(Tl == 0) 4443587Sgblack@eecs.umich.edu return new IllegalInstruction; 4453587Sgblack@eecs.umich.edu Rd = Tnpc; 4463587Sgblack@eecs.umich.edu }}); 4473587Sgblack@eecs.umich.edu 0x02: Priv::rdprtstate({{ 4483587Sgblack@eecs.umich.edu if(Tl == 0) 4493587Sgblack@eecs.umich.edu return new IllegalInstruction; 4503587Sgblack@eecs.umich.edu Rd = Tstate; 4513587Sgblack@eecs.umich.edu }}); 4523587Sgblack@eecs.umich.edu 0x03: Priv::rdprtt({{ 4533587Sgblack@eecs.umich.edu if(Tl == 0) 4543587Sgblack@eecs.umich.edu return new IllegalInstruction; 4553587Sgblack@eecs.umich.edu Rd = Tt; 4563587Sgblack@eecs.umich.edu }}); 4573823Ssaidi@eecs.umich.edu 0x04: Priv::rdprtick({{Rd = Tick;}}); 4583587Sgblack@eecs.umich.edu 0x05: Priv::rdprtba({{Rd = Tba;}}); 4593587Sgblack@eecs.umich.edu 0x06: Priv::rdprpstate({{Rd = Pstate;}}); 4603587Sgblack@eecs.umich.edu 0x07: Priv::rdprtl({{Rd = Tl;}}); 4613587Sgblack@eecs.umich.edu 0x08: Priv::rdprpil({{Rd = Pil;}}); 4623587Sgblack@eecs.umich.edu 0x09: Priv::rdprcwp({{Rd = Cwp;}}); 4633587Sgblack@eecs.umich.edu 0x0A: Priv::rdprcansave({{Rd = Cansave;}}); 4643587Sgblack@eecs.umich.edu 0x0B: Priv::rdprcanrestore({{Rd = Canrestore;}}); 4653587Sgblack@eecs.umich.edu 0x0C: Priv::rdprcleanwin({{Rd = Cleanwin;}}); 4663587Sgblack@eecs.umich.edu 0x0D: Priv::rdprotherwin({{Rd = Otherwin;}}); 4673587Sgblack@eecs.umich.edu 0x0E: Priv::rdprwstate({{Rd = Wstate;}}); 4683587Sgblack@eecs.umich.edu //0x0F should cause an illegal instruction exception 4693587Sgblack@eecs.umich.edu 0x10: Priv::rdprgl({{Rd = Gl;}}); 4703587Sgblack@eecs.umich.edu //0x11-0x1F should cause an illegal instruction exception 4713587Sgblack@eecs.umich.edu } 4722526SN/A 0x2B: BasicOperate::flushw({{ 4733911Ssaidi@eecs.umich.edu if(NWindows - 2 - Cansave != 0) 4742526SN/A { 4752526SN/A if(Otherwin) 4763909Ssaidi@eecs.umich.edu fault = new SpillNOther(4*Wstate<5:3>); 4772526SN/A else 4783909Ssaidi@eecs.umich.edu fault = new SpillNNormal(4*Wstate<2:0>); 4792526SN/A } 4802526SN/A }}); 4812526SN/A 0x2C: decode MOVCC3 4822469SN/A { 4832526SN/A 0x0: Trap::movccfcc({{fault = new FpDisabled;}}); 4842526SN/A 0x1: decode CC 4852526SN/A { 4862526SN/A 0x0: movcci({{ 4872646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND4)) 4882591SN/A Rd = Rs2_or_imm11; 4892591SN/A else 4902591SN/A Rd = Rd; 4912526SN/A }}); 4922526SN/A 0x2: movccx({{ 4932646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND4)) 4942591SN/A Rd = Rs2_or_imm11; 4952591SN/A else 4962591SN/A Rd = Rd; 4972526SN/A }}); 4982224SN/A } 4992526SN/A } 5002526SN/A 0x2D: sdivx({{ 5012615SN/A if(Rs2_or_imm13.sdw == 0) fault = new DivisionByZero; 5022615SN/A else Rd.sdw = Rs1.sdw / Rs2_or_imm13.sdw; 5032526SN/A }}); 5043941Ssaidi@eecs.umich.edu 0x2E: Trap::popc({{fault = new IllegalInstruction;}}); 5052526SN/A 0x2F: decode RCOND3 5062526SN/A { 5072615SN/A 0x1: movreq({{Rd = (Rs1.sdw == 0) ? Rs2_or_imm10 : Rd;}}); 5082615SN/A 0x2: movrle({{Rd = (Rs1.sdw <= 0) ? Rs2_or_imm10 : Rd;}}); 5092615SN/A 0x3: movrl({{Rd = (Rs1.sdw < 0) ? Rs2_or_imm10 : Rd;}}); 5102615SN/A 0x5: movrne({{Rd = (Rs1.sdw != 0) ? Rs2_or_imm10 : Rd;}}); 5112615SN/A 0x6: movrg({{Rd = (Rs1.sdw > 0) ? Rs2_or_imm10 : Rd;}}); 5122615SN/A 0x7: movrge({{Rd = (Rs1.sdw >= 0) ? Rs2_or_imm10 : Rd;}}); 5132526SN/A } 5143587Sgblack@eecs.umich.edu 0x30: decode RD { 5153929Ssaidi@eecs.umich.edu 0x00: NoPriv::wry({{Y = (Rs1 ^ Rs2_or_imm13)<31:0>;}}); 5163587Sgblack@eecs.umich.edu //0x01 should cause an illegal instruction exception 5173587Sgblack@eecs.umich.edu 0x02: NoPriv::wrccr({{Ccr = Rs1 ^ Rs2_or_imm13;}}); 5183826Ssaidi@eecs.umich.edu 0x03: NoPriv::wrasi({{Asi = Rs1 ^ Rs2_or_imm13;}}); 5193587Sgblack@eecs.umich.edu //0x04-0x05 should cause an illegal instruction exception 5203587Sgblack@eecs.umich.edu 0x06: NoPriv::wrfprs({{Fprs = Rs1 ^ Rs2_or_imm13;}}); 5213587Sgblack@eecs.umich.edu //0x07-0x0E should cause an illegal instruction exception 5223587Sgblack@eecs.umich.edu 0x0F: Trap::softreset({{fault = new SoftwareInitiatedReset;}}); 5233587Sgblack@eecs.umich.edu 0x10: Priv::wrpcr({{Pcr = Rs1 ^ Rs2_or_imm13;}}); 5243587Sgblack@eecs.umich.edu 0x11: PrivCheck::wrpic({{Pic = Rs1 ^ Rs2_or_imm13;}}, {{Pcr<0:>}}); 5253587Sgblack@eecs.umich.edu //0x12 should cause an illegal instruction exception 5263587Sgblack@eecs.umich.edu 0x13: NoPriv::wrgsr({{ 5273587Sgblack@eecs.umich.edu if(Fprs<2:> == 0 || Pstate<4:> == 0) 5283587Sgblack@eecs.umich.edu return new FpDisabled; 5293587Sgblack@eecs.umich.edu Gsr = Rs1 ^ Rs2_or_imm13; 5303587Sgblack@eecs.umich.edu }}); 5313587Sgblack@eecs.umich.edu 0x14: Priv::wrsoftint_set({{SoftintSet = Rs1 ^ Rs2_or_imm13;}}); 5323587Sgblack@eecs.umich.edu 0x15: Priv::wrsoftint_clr({{SoftintClr = Rs1 ^ Rs2_or_imm13;}}); 5333587Sgblack@eecs.umich.edu 0x16: Priv::wrsoftint({{Softint = Rs1 ^ Rs2_or_imm13;}}); 5343823Ssaidi@eecs.umich.edu 0x17: Priv::wrtick_cmpr({{TickCmpr = Rs1 ^ Rs2_or_imm13;}}); 5353587Sgblack@eecs.umich.edu 0x18: NoPriv::wrstick({{ 5363587Sgblack@eecs.umich.edu if(!Hpstate<2:>) 5373587Sgblack@eecs.umich.edu return new IllegalInstruction; 5383823Ssaidi@eecs.umich.edu Stick = Rs1 ^ Rs2_or_imm13; 5393587Sgblack@eecs.umich.edu }}); 5403823Ssaidi@eecs.umich.edu 0x19: Priv::wrstick_cmpr({{StickCmpr = Rs1 ^ Rs2_or_imm13;}}); 5413598Sgblack@eecs.umich.edu 0x1A: Priv::wrstrand_sts_reg({{ 5423598Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 5433598Sgblack@eecs.umich.edu StrandStsReg = StrandStsReg<63:1> | 5443598Sgblack@eecs.umich.edu (Rs1 ^ Rs2_or_imm13)<0:>; 5453598Sgblack@eecs.umich.edu else 5463598Sgblack@eecs.umich.edu StrandStsReg = Rs1 ^ Rs2_or_imm13; 5473598Sgblack@eecs.umich.edu }}); 5483598Sgblack@eecs.umich.edu //0x1A is supposed to be reserved, but it writes the strand 5493598Sgblack@eecs.umich.edu //status register. 5503598Sgblack@eecs.umich.edu //0x1B-0x1F should cause an illegal instruction exception 5513587Sgblack@eecs.umich.edu } 5522526SN/A 0x31: decode FCN { 5533417Sgblack@eecs.umich.edu 0x0: Priv::saved({{ 5543417Sgblack@eecs.umich.edu assert(Cansave < NWindows - 2); 5553417Sgblack@eecs.umich.edu assert(Otherwin || Canrestore); 5563417Sgblack@eecs.umich.edu Cansave = Cansave + 1; 5573417Sgblack@eecs.umich.edu if(Otherwin == 0) 5583417Sgblack@eecs.umich.edu Canrestore = Canrestore - 1; 5593417Sgblack@eecs.umich.edu else 5603417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 5613417Sgblack@eecs.umich.edu }}); 5623598Sgblack@eecs.umich.edu 0x1: Priv::restored({{ 5633417Sgblack@eecs.umich.edu assert(Cansave || Otherwin); 5643417Sgblack@eecs.umich.edu assert(Canrestore < NWindows - 2); 5653417Sgblack@eecs.umich.edu Canrestore = Canrestore + 1; 5663417Sgblack@eecs.umich.edu if(Otherwin == 0) 5673417Sgblack@eecs.umich.edu Cansave = Cansave - 1; 5683417Sgblack@eecs.umich.edu else 5693417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 5703928Ssaidi@eecs.umich.edu 5713928Ssaidi@eecs.umich.edu if(Cleanwin < NWindows - 1) 5723928Ssaidi@eecs.umich.edu Cleanwin = Cleanwin + 1; 5733417Sgblack@eecs.umich.edu }}); 5742526SN/A } 5753587Sgblack@eecs.umich.edu 0x32: decode RD { 5763587Sgblack@eecs.umich.edu 0x00: Priv::wrprtpc({{ 5773587Sgblack@eecs.umich.edu if(Tl == 0) 5783587Sgblack@eecs.umich.edu return new IllegalInstruction; 5793587Sgblack@eecs.umich.edu else 5803587Sgblack@eecs.umich.edu Tpc = Rs1 ^ Rs2_or_imm13; 5813587Sgblack@eecs.umich.edu }}); 5823587Sgblack@eecs.umich.edu 0x01: Priv::wrprtnpc({{ 5833587Sgblack@eecs.umich.edu if(Tl == 0) 5843587Sgblack@eecs.umich.edu return new IllegalInstruction; 5853587Sgblack@eecs.umich.edu else 5863587Sgblack@eecs.umich.edu Tnpc = Rs1 ^ Rs2_or_imm13; 5873587Sgblack@eecs.umich.edu }}); 5883587Sgblack@eecs.umich.edu 0x02: Priv::wrprtstate({{ 5893587Sgblack@eecs.umich.edu if(Tl == 0) 5903587Sgblack@eecs.umich.edu return new IllegalInstruction; 5913587Sgblack@eecs.umich.edu else 5923587Sgblack@eecs.umich.edu Tstate = Rs1 ^ Rs2_or_imm13; 5933587Sgblack@eecs.umich.edu }}); 5943587Sgblack@eecs.umich.edu 0x03: Priv::wrprtt({{ 5953587Sgblack@eecs.umich.edu if(Tl == 0) 5963587Sgblack@eecs.umich.edu return new IllegalInstruction; 5973587Sgblack@eecs.umich.edu else 5983587Sgblack@eecs.umich.edu Tt = Rs1 ^ Rs2_or_imm13; 5993587Sgblack@eecs.umich.edu }}); 6003823Ssaidi@eecs.umich.edu 0x04: HPriv::wrprtick({{Tick = Rs1 ^ Rs2_or_imm13;}}); 6013587Sgblack@eecs.umich.edu 0x05: Priv::wrprtba({{Tba = Rs1 ^ Rs2_or_imm13;}}); 6023587Sgblack@eecs.umich.edu 0x06: Priv::wrprpstate({{Pstate = Rs1 ^ Rs2_or_imm13;}}); 6033587Sgblack@eecs.umich.edu 0x07: Priv::wrprtl({{ 6043587Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 6053587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPTL); 6063587Sgblack@eecs.umich.edu else 6073587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxTL); 6083587Sgblack@eecs.umich.edu }}); 6093587Sgblack@eecs.umich.edu 0x08: Priv::wrprpil({{Pil = Rs1 ^ Rs2_or_imm13;}}); 6103587Sgblack@eecs.umich.edu 0x09: Priv::wrprcwp({{Cwp = Rs1 ^ Rs2_or_imm13;}}); 6113587Sgblack@eecs.umich.edu 0x0A: Priv::wrprcansave({{Cansave = Rs1 ^ Rs2_or_imm13;}}); 6123587Sgblack@eecs.umich.edu 0x0B: Priv::wrprcanrestore({{Canrestore = Rs1 ^ Rs2_or_imm13;}}); 6133587Sgblack@eecs.umich.edu 0x0C: Priv::wrprcleanwin({{Cleanwin = Rs1 ^ Rs2_or_imm13;}}); 6143587Sgblack@eecs.umich.edu 0x0D: Priv::wrprotherwin({{Otherwin = Rs1 ^ Rs2_or_imm13;}}); 6153587Sgblack@eecs.umich.edu 0x0E: Priv::wrprwstate({{Wstate = Rs1 ^ Rs2_or_imm13;}}); 6163587Sgblack@eecs.umich.edu //0x0F should cause an illegal instruction exception 6173587Sgblack@eecs.umich.edu 0x10: Priv::wrprgl({{ 6183587Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 6193587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPGL); 6203587Sgblack@eecs.umich.edu else 6213587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxGL); 6223587Sgblack@eecs.umich.edu }}); 6233587Sgblack@eecs.umich.edu //0x11-0x1F should cause an illegal instruction exception 6243587Sgblack@eecs.umich.edu } 6253587Sgblack@eecs.umich.edu 0x33: decode RD { 6263587Sgblack@eecs.umich.edu 0x00: HPriv::wrhprhpstate({{Hpstate = Rs1 ^ Rs2_or_imm13;}}); 6273587Sgblack@eecs.umich.edu 0x01: HPriv::wrhprhtstate({{ 6283587Sgblack@eecs.umich.edu if(Tl == 0) 6293587Sgblack@eecs.umich.edu return new IllegalInstruction; 6303587Sgblack@eecs.umich.edu Htstate = Rs1 ^ Rs2_or_imm13; 6313587Sgblack@eecs.umich.edu }}); 6323587Sgblack@eecs.umich.edu //0x02 should cause an illegal instruction exception 6333587Sgblack@eecs.umich.edu 0x03: HPriv::wrhprhintp({{Hintp = Rs1 ^ Rs2_or_imm13;}}); 6343587Sgblack@eecs.umich.edu //0x04 should cause an illegal instruction exception 6353587Sgblack@eecs.umich.edu 0x05: HPriv::wrhprhtba({{Htba = Rs1 ^ Rs2_or_imm13;}}); 6363587Sgblack@eecs.umich.edu //0x06-0x01D should cause an illegal instruction exception 6373823Ssaidi@eecs.umich.edu 0x1F: HPriv::wrhprhstick_cmpr({{HstickCmpr = Rs1 ^ Rs2_or_imm13;}}); 6383587Sgblack@eecs.umich.edu } 6392954Sgblack@eecs.umich.edu 0x34: decode OPF{ 6402963Sgblack@eecs.umich.edu format BasicOperate{ 6412963Sgblack@eecs.umich.edu 0x01: fmovs({{ 6423279Sgblack@eecs.umich.edu Frds.uw = Frs2s.uw; 6432963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6442963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6452963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6462963Sgblack@eecs.umich.edu }}); 6472963Sgblack@eecs.umich.edu 0x02: fmovd({{ 6483057Sgblack@eecs.umich.edu Frd.udw = Frs2.udw; 6492963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6502963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6512963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6522963Sgblack@eecs.umich.edu }}); 6533941Ssaidi@eecs.umich.edu 0x03: Trap::fmovq({{fault = new FpExceptionOther;}}); //unimp fpop 6542963Sgblack@eecs.umich.edu 0x05: fnegs({{ 6553279Sgblack@eecs.umich.edu Frds.uw = Frs2s.uw ^ (1UL << 31); 6562963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6572963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6582963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6592963Sgblack@eecs.umich.edu }}); 6602963Sgblack@eecs.umich.edu 0x06: fnegd({{ 6613057Sgblack@eecs.umich.edu Frd.udw = Frs2.udw ^ (1ULL << 63); 6622963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6632963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6642963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6652963Sgblack@eecs.umich.edu }}); 6663941Ssaidi@eecs.umich.edu 0x07: Trap::fnegq({{fault = new FpExceptionOther;}}); //fpop unimp 6672963Sgblack@eecs.umich.edu 0x09: fabss({{ 6683279Sgblack@eecs.umich.edu Frds.uw = ((1UL << 31) - 1) & Frs2s.uw; 6692963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6702963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6712963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6722963Sgblack@eecs.umich.edu }}); 6732963Sgblack@eecs.umich.edu 0x0A: fabsd({{ 6743057Sgblack@eecs.umich.edu Frd.udw = ((1ULL << 63) - 1) & Frs2.udw; 6752963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6762963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6772963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6782963Sgblack@eecs.umich.edu }}); 6793941Ssaidi@eecs.umich.edu 0x0B: Trap::fabsq({{fault = new FpExceptionOther;}}); //fpop unimp 6803918Ssaidi@eecs.umich.edu 0x29: fsqrts({{Frds.sf = std::sqrt(Frs2s.sf);}}); 6813918Ssaidi@eecs.umich.edu 0x2A: fsqrtd({{Frd.df = std::sqrt(Frs2.df);}}); 6823941Ssaidi@eecs.umich.edu 0x2B: Trap::fsqrtq({{fault = new FpExceptionOther;}}); //unimp fpop 6833279Sgblack@eecs.umich.edu 0x41: fadds({{Frds.sf = Frs1s.sf + Frs2s.sf;}}); 6842963Sgblack@eecs.umich.edu 0x42: faddd({{Frd.df = Frs1.df + Frs2.df;}}); 6853941Ssaidi@eecs.umich.edu 0x43: Trap::faddq({{fault = new FpExceptionOther;}}); //unimp fpop 6863279Sgblack@eecs.umich.edu 0x45: fsubs({{Frds.sf = Frs1s.sf - Frs2s.sf;}}); 6872963Sgblack@eecs.umich.edu 0x46: fsubd({{Frd.df = Frs1.df - Frs2.df;}}); 6883941Ssaidi@eecs.umich.edu 0x47: Trap::fsubq({{fault = new FpExceptionOther;}}); //unimp fpop 6893279Sgblack@eecs.umich.edu 0x49: fmuls({{Frds.sf = Frs1s.sf * Frs2s.sf;}}); 6902963Sgblack@eecs.umich.edu 0x4A: fmuld({{Frd.df = Frs1.df * Frs2.df;}}); 6913941Ssaidi@eecs.umich.edu 0x4B: Trap::fmulq({{fault = new FpExceptionOther;}}); //unimp fpop 6923279Sgblack@eecs.umich.edu 0x4D: fdivs({{Frds.sf = Frs1s.sf / Frs2s.sf;}}); 6932963Sgblack@eecs.umich.edu 0x4E: fdivd({{Frd.df = Frs1.df / Frs2.df;}}); 6943941Ssaidi@eecs.umich.edu 0x4F: Trap::fdivq({{fault = new FpExceptionOther;}}); //unimp fpop 6953279Sgblack@eecs.umich.edu 0x69: fsmuld({{Frd.df = Frs1s.sf * Frs2s.sf;}}); 6963941Ssaidi@eecs.umich.edu 0x6E: Trap::fdmulq({{fault = new FpExceptionOther;}}); //unimp fpop 6972963Sgblack@eecs.umich.edu 0x81: fstox({{ 6983279Sgblack@eecs.umich.edu Frd.df = (double)static_cast<int64_t>(Frs2s.sf); 6992963Sgblack@eecs.umich.edu }}); 7002963Sgblack@eecs.umich.edu 0x82: fdtox({{ 7012963Sgblack@eecs.umich.edu Frd.df = (double)static_cast<int64_t>(Frs2.df); 7022963Sgblack@eecs.umich.edu }}); 7033941Ssaidi@eecs.umich.edu 0x83: Trap::fqtox({{fault = new FpExceptionOther;}}); //unimp fpop 7042963Sgblack@eecs.umich.edu 0x84: fxtos({{ 7053279Sgblack@eecs.umich.edu Frds.sf = static_cast<float>((int64_t)Frs2.df); 7062963Sgblack@eecs.umich.edu }}); 7072963Sgblack@eecs.umich.edu 0x88: fxtod({{ 7082963Sgblack@eecs.umich.edu Frd.df = static_cast<double>((int64_t)Frs2.df); 7092963Sgblack@eecs.umich.edu }}); 7103941Ssaidi@eecs.umich.edu 0x8C: Trap::fxtoq({{fault = new FpExceptionOther;}}); //unimp fpop 7112963Sgblack@eecs.umich.edu 0xC4: fitos({{ 7123279Sgblack@eecs.umich.edu Frds.sf = static_cast<float>((int32_t)Frs2s.sf); 7132963Sgblack@eecs.umich.edu }}); 7143279Sgblack@eecs.umich.edu 0xC6: fdtos({{Frds.sf = Frs2.df;}}); 7153941Ssaidi@eecs.umich.edu 0xC7: Trap::fqtos({{fault = new FpExceptionOther;}}); //unimp fpop 7162963Sgblack@eecs.umich.edu 0xC8: fitod({{ 7173279Sgblack@eecs.umich.edu Frd.df = static_cast<double>((int32_t)Frs2s.sf); 7182963Sgblack@eecs.umich.edu }}); 7193279Sgblack@eecs.umich.edu 0xC9: fstod({{Frd.df = Frs2s.sf;}}); 7203941Ssaidi@eecs.umich.edu 0xCB: Trap::fqtod({{fault = new FpExceptionOther;}}); // unimp fpop 7213941Ssaidi@eecs.umich.edu 0xCC: Trap::fitoq({{fault = new FpExceptionOther;}}); // unimp fpop 7223941Ssaidi@eecs.umich.edu 0xCD: Trap::fstoq({{fault = new FpExceptionOther;}}); // unimp fpop 7233941Ssaidi@eecs.umich.edu 0xCE: Trap::fdtoq({{fault = new FpExceptionOther;}}); // unimp fpop 7242963Sgblack@eecs.umich.edu 0xD1: fstoi({{ 7253279Sgblack@eecs.umich.edu Frds.sf = (float)static_cast<int32_t>(Frs2s.sf); 7262963Sgblack@eecs.umich.edu }}); 7272963Sgblack@eecs.umich.edu 0xD2: fdtoi({{ 7283279Sgblack@eecs.umich.edu Frds.sf = (float)static_cast<int32_t>(Frs2.df); 7292963Sgblack@eecs.umich.edu }}); 7303941Ssaidi@eecs.umich.edu 0xD3: Trap::fqtoi({{fault = new FpExceptionOther;}}); // unimp fpop 7313941Ssaidi@eecs.umich.edu default: FailUnimpl::fpop1(); 7322963Sgblack@eecs.umich.edu } 7332954Sgblack@eecs.umich.edu } 7342526SN/A 0x35: Trap::fpop2({{fault = new FpDisabled;}}); 7352954Sgblack@eecs.umich.edu //This used to be just impdep1, but now it's a whole bunch 7362954Sgblack@eecs.umich.edu //of instructions 7372954Sgblack@eecs.umich.edu 0x36: decode OPF{ 7383941Ssaidi@eecs.umich.edu 0x00: FailUnimpl::edge8(); 7393941Ssaidi@eecs.umich.edu 0x01: FailUnimpl::edge8n(); 7403941Ssaidi@eecs.umich.edu 0x02: FailUnimpl::edge8l(); 7413941Ssaidi@eecs.umich.edu 0x03: FailUnimpl::edge8ln(); 7423941Ssaidi@eecs.umich.edu 0x04: FailUnimpl::edge16(); 7433941Ssaidi@eecs.umich.edu 0x05: FailUnimpl::edge16n(); 7443941Ssaidi@eecs.umich.edu 0x06: FailUnimpl::edge16l(); 7453941Ssaidi@eecs.umich.edu 0x07: FailUnimpl::edge16ln(); 7463941Ssaidi@eecs.umich.edu 0x08: FailUnimpl::edge32(); 7473941Ssaidi@eecs.umich.edu 0x09: FailUnimpl::edge32n(); 7483941Ssaidi@eecs.umich.edu 0x0A: FailUnimpl::edge32l(); 7493941Ssaidi@eecs.umich.edu 0x0B: FailUnimpl::edge32ln(); 7503941Ssaidi@eecs.umich.edu 0x10: FailUnimpl::array8(); 7513941Ssaidi@eecs.umich.edu 0x12: FailUnimpl::array16(); 7523941Ssaidi@eecs.umich.edu 0x14: FailUnimpl::array32(); 7533042Sgblack@eecs.umich.edu 0x18: BasicOperate::alignaddr({{ 7542963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 7553042Sgblack@eecs.umich.edu Rd = sum & ~7; 7562963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | (sum & 7); 7572963Sgblack@eecs.umich.edu }}); 7583941Ssaidi@eecs.umich.edu 0x19: FailUnimpl::bmask(); 7592963Sgblack@eecs.umich.edu 0x1A: BasicOperate::alignaddresslittle({{ 7602963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 7613042Sgblack@eecs.umich.edu Rd = sum & ~7; 7622963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | ((~sum + 1) & 7); 7632963Sgblack@eecs.umich.edu }}); 7643941Ssaidi@eecs.umich.edu 0x20: FailUnimpl::fcmple16(); 7653941Ssaidi@eecs.umich.edu 0x22: FailUnimpl::fcmpne16(); 7663941Ssaidi@eecs.umich.edu 0x24: FailUnimpl::fcmple32(); 7673941Ssaidi@eecs.umich.edu 0x26: FailUnimpl::fcmpne32(); 7683941Ssaidi@eecs.umich.edu 0x28: FailUnimpl::fcmpgt16(); 7693941Ssaidi@eecs.umich.edu 0x2A: FailUnimpl::fcmpeq16(); 7703941Ssaidi@eecs.umich.edu 0x2C: FailUnimpl::fcmpgt32(); 7713941Ssaidi@eecs.umich.edu 0x2E: FailUnimpl::fcmpeq32(); 7723941Ssaidi@eecs.umich.edu 0x31: FailUnimpl::fmul8x16(); 7733941Ssaidi@eecs.umich.edu 0x33: FailUnimpl::fmul8x16au(); 7743941Ssaidi@eecs.umich.edu 0x35: FailUnimpl::fmul8x16al(); 7753941Ssaidi@eecs.umich.edu 0x36: FailUnimpl::fmul8sux16(); 7763941Ssaidi@eecs.umich.edu 0x37: FailUnimpl::fmul8ulx16(); 7773941Ssaidi@eecs.umich.edu 0x38: FailUnimpl::fmuld8sux16(); 7783941Ssaidi@eecs.umich.edu 0x39: FailUnimpl::fmuld8ulx16(); 7792954Sgblack@eecs.umich.edu 0x3A: Trap::fpack32({{fault = new IllegalInstruction;}}); 7802954Sgblack@eecs.umich.edu 0x3B: Trap::fpack16({{fault = new IllegalInstruction;}}); 7812954Sgblack@eecs.umich.edu 0x3D: Trap::fpackfix({{fault = new IllegalInstruction;}}); 7822954Sgblack@eecs.umich.edu 0x3E: Trap::pdist({{fault = new IllegalInstruction;}}); 7832963Sgblack@eecs.umich.edu 0x48: BasicOperate::faligndata({{ 7843057Sgblack@eecs.umich.edu uint64_t msbX = Frs1.udw; 7853057Sgblack@eecs.umich.edu uint64_t lsbX = Frs2.udw; 7863057Sgblack@eecs.umich.edu //Some special cases need to be split out, first 7873057Sgblack@eecs.umich.edu //because they're the most likely to be used, and 7883057Sgblack@eecs.umich.edu //second because otherwise, we end up shifting by 7893057Sgblack@eecs.umich.edu //greater than the width of the type being shifted, 7903057Sgblack@eecs.umich.edu //namely 64, which produces undefined results according 7913057Sgblack@eecs.umich.edu //to the C standard. 7923057Sgblack@eecs.umich.edu switch(Gsr<2:0>) 7933057Sgblack@eecs.umich.edu { 7943057Sgblack@eecs.umich.edu case 0: 7953057Sgblack@eecs.umich.edu Frd.udw = msbX; 7963057Sgblack@eecs.umich.edu break; 7973057Sgblack@eecs.umich.edu case 8: 7983057Sgblack@eecs.umich.edu Frd.udw = lsbX; 7993057Sgblack@eecs.umich.edu break; 8003057Sgblack@eecs.umich.edu default: 8013057Sgblack@eecs.umich.edu uint64_t msbShift = Gsr<2:0> * 8; 8023057Sgblack@eecs.umich.edu uint64_t lsbShift = (8 - Gsr<2:0>) * 8; 8033057Sgblack@eecs.umich.edu uint64_t msbMask = ((uint64_t)(-1)) >> msbShift; 8043057Sgblack@eecs.umich.edu uint64_t lsbMask = ((uint64_t)(-1)) << lsbShift; 8053057Sgblack@eecs.umich.edu Frd.udw = ((msbX & msbMask) << msbShift) | 8063057Sgblack@eecs.umich.edu ((lsbX & lsbMask) >> lsbShift); 8073057Sgblack@eecs.umich.edu } 8082963Sgblack@eecs.umich.edu }}); 8092954Sgblack@eecs.umich.edu 0x4B: Trap::fpmerge({{fault = new IllegalInstruction;}}); 8103941Ssaidi@eecs.umich.edu 0x4C: FailUnimpl::bshuffle(); 8113941Ssaidi@eecs.umich.edu 0x4D: FailUnimpl::fexpand(); 8123941Ssaidi@eecs.umich.edu 0x50: FailUnimpl::fpadd16(); 8133941Ssaidi@eecs.umich.edu 0x51: FailUnimpl::fpadd16s(); 8143941Ssaidi@eecs.umich.edu 0x52: FailUnimpl::fpadd32(); 8153941Ssaidi@eecs.umich.edu 0x53: FailUnimpl::fpadd32s(); 8163941Ssaidi@eecs.umich.edu 0x54: FailUnimpl::fpsub16(); 8173941Ssaidi@eecs.umich.edu 0x55: FailUnimpl::fpsub16s(); 8183941Ssaidi@eecs.umich.edu 0x56: FailUnimpl::fpsub32(); 8193941Ssaidi@eecs.umich.edu 0x57: FailUnimpl::fpsub32s(); 8202963Sgblack@eecs.umich.edu 0x60: BasicOperate::fzero({{Frd.df = 0;}}); 8213279Sgblack@eecs.umich.edu 0x61: BasicOperate::fzeros({{Frds.sf = 0;}}); 8223941Ssaidi@eecs.umich.edu 0x62: FailUnimpl::fnor(); 8233941Ssaidi@eecs.umich.edu 0x63: FailUnimpl::fnors(); 8243941Ssaidi@eecs.umich.edu 0x64: FailUnimpl::fandnot2(); 8253941Ssaidi@eecs.umich.edu 0x65: FailUnimpl::fandnot2s(); 8262963Sgblack@eecs.umich.edu 0x66: BasicOperate::fnot2({{ 8272963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs2.df)); 8282963Sgblack@eecs.umich.edu }}); 8292963Sgblack@eecs.umich.edu 0x67: BasicOperate::fnot2s({{ 8303279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs2s.sf)); 8312963Sgblack@eecs.umich.edu }}); 8323941Ssaidi@eecs.umich.edu 0x68: FailUnimpl::fandnot1(); 8333941Ssaidi@eecs.umich.edu 0x69: FailUnimpl::fandnot1s(); 8342963Sgblack@eecs.umich.edu 0x6A: BasicOperate::fnot1({{ 8352963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs1.df)); 8362963Sgblack@eecs.umich.edu }}); 8372963Sgblack@eecs.umich.edu 0x6B: BasicOperate::fnot1s({{ 8383279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs1s.sf)); 8392963Sgblack@eecs.umich.edu }}); 8403941Ssaidi@eecs.umich.edu 0x6C: FailUnimpl::fxor(); 8413941Ssaidi@eecs.umich.edu 0x6D: FailUnimpl::fxors(); 8423941Ssaidi@eecs.umich.edu 0x6E: FailUnimpl::fnand(); 8433941Ssaidi@eecs.umich.edu 0x6F: FailUnimpl::fnands(); 8443941Ssaidi@eecs.umich.edu 0x70: FailUnimpl::fand(); 8453941Ssaidi@eecs.umich.edu 0x71: FailUnimpl::fands(); 8463941Ssaidi@eecs.umich.edu 0x72: FailUnimpl::fxnor(); 8473941Ssaidi@eecs.umich.edu 0x73: FailUnimpl::fxnors(); 8483057Sgblack@eecs.umich.edu 0x74: BasicOperate::fsrc1({{Frd.udw = Frs1.udw;}}); 8493931Ssaidi@eecs.umich.edu 0x75: BasicOperate::fsrc1s({{Frds.uw = Frs1s.uw;}}); 8503941Ssaidi@eecs.umich.edu 0x76: FailUnimpl::fornot2(); 8513941Ssaidi@eecs.umich.edu 0x77: FailUnimpl::fornot2s(); 8523057Sgblack@eecs.umich.edu 0x78: BasicOperate::fsrc2({{Frd.udw = Frs2.udw;}}); 8533931Ssaidi@eecs.umich.edu 0x79: BasicOperate::fsrc2s({{Frds.uw = Frs2s.uw;}}); 8543941Ssaidi@eecs.umich.edu 0x7A: FailUnimpl::fornot1(); 8553941Ssaidi@eecs.umich.edu 0x7B: FailUnimpl::fornot1s(); 8563941Ssaidi@eecs.umich.edu 0x7C: FailUnimpl::for(); 8573941Ssaidi@eecs.umich.edu 0x7D: FailUnimpl::fors(); 8583941Ssaidi@eecs.umich.edu 0x7E: BasicOperate::fone({{Frd.udw = std::numeric_limits<uint64_t>::max();}}); 8593941Ssaidi@eecs.umich.edu 0x7F: BasicOperate::fones({{Frds.uw = std::numeric_limits<uint32_t>::max();}}); 8602954Sgblack@eecs.umich.edu 0x80: Trap::shutdown({{fault = new IllegalInstruction;}}); 8613941Ssaidi@eecs.umich.edu 0x81: FailUnimpl::siam(); 8622954Sgblack@eecs.umich.edu } 8632954Sgblack@eecs.umich.edu 0x37: Trap::impdep2({{fault = new IllegalInstruction;}}); 8642526SN/A 0x38: Branch::jmpl({{ 8652526SN/A Addr target = Rs1 + Rs2_or_imm13; 8662526SN/A if(target & 0x3) 8672526SN/A fault = new MemAddressNotAligned; 8682526SN/A else 8692526SN/A { 8703928Ssaidi@eecs.umich.edu if (Pstate<3:>) 8713929Ssaidi@eecs.umich.edu Rd = (xc->readPC())<31:0>; 8723928Ssaidi@eecs.umich.edu else 8733928Ssaidi@eecs.umich.edu Rd = xc->readPC(); 8742526SN/A NNPC = target; 8752526SN/A } 8762526SN/A }}); 8772526SN/A 0x39: Branch::return({{ 8782561SN/A //If both MemAddressNotAligned and 8792561SN/A //a fill trap happen, it's not clear 8802561SN/A //which one should be returned. 8812526SN/A Addr target = Rs1 + Rs2_or_imm13; 8822526SN/A if(target & 0x3) 8832526SN/A fault = new MemAddressNotAligned; 8842526SN/A else 8852526SN/A NNPC = target; 8862561SN/A if(fault == NoFault) 8872561SN/A { 8882561SN/A if(Canrestore == 0) 8892561SN/A { 8902561SN/A if(Otherwin) 8913909Ssaidi@eecs.umich.edu fault = new FillNOther(4*Wstate<5:3>); 8922561SN/A else 8933909Ssaidi@eecs.umich.edu fault = new FillNNormal(4*Wstate<2:0>); 8942561SN/A } 8952561SN/A else 8962561SN/A { 8973417Sgblack@eecs.umich.edu //CWP should be set directly so that it always happens 8983417Sgblack@eecs.umich.edu //Also, this will allow writing to the new window and 8993417Sgblack@eecs.umich.edu //reading from the old one 9003417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 9012561SN/A Cansave = Cansave + 1; 9022561SN/A Canrestore = Canrestore - 1; 9033417Sgblack@eecs.umich.edu //This is here to make sure the CWP is written 9043417Sgblack@eecs.umich.edu //no matter what. This ensures that the results 9053417Sgblack@eecs.umich.edu //are written in the new window as well. 9063417Sgblack@eecs.umich.edu xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 9072561SN/A } 9082561SN/A } 9092526SN/A }}); 9102526SN/A 0x3A: decode CC 9112526SN/A { 9122526SN/A 0x0: Trap::tcci({{ 9132646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 9142561SN/A { 9153039Sstever@eecs.umich.edu#if FULL_SYSTEM 9162561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 9172561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 9183531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 9192526SN/A#else 9202561SN/A DPRINTF(Sparc, "The syscall number is %d\n", R1); 9212561SN/A xc->syscall(R1); 9222561SN/A#endif 9232561SN/A } 9242526SN/A }}); 9252526SN/A 0x2: Trap::tccx({{ 9262646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND2)) 9272561SN/A { 9283039Sstever@eecs.umich.edu#if FULL_SYSTEM 9292561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 9302561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 9313531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 9322526SN/A#else 9332561SN/A DPRINTF(Sparc, "The syscall number is %d\n", R1); 9342561SN/A xc->syscall(R1); 9352561SN/A#endif 9362526SN/A } 9372526SN/A }}); 9382526SN/A } 9392526SN/A 0x3B: Nop::flush({{/*Instruction memory flush*/}}); 9402526SN/A 0x3C: save({{ 9412526SN/A //CWP should be set directly so that it always happens 9422526SN/A //Also, this will allow writing to the new window and 9432526SN/A //reading from the old one 9442526SN/A if(Cansave == 0) 9452526SN/A { 9462526SN/A if(Otherwin) 9473909Ssaidi@eecs.umich.edu fault = new SpillNOther(4*Wstate<5:3>); 9482526SN/A else 9493909Ssaidi@eecs.umich.edu fault = new SpillNNormal(4*Wstate<2:0>); 9503417Sgblack@eecs.umich.edu //Cwp = (Cwp + 2) % NWindows; 9512526SN/A } 9522526SN/A else if(Cleanwin - Canrestore == 0) 9532526SN/A { 9543417Sgblack@eecs.umich.edu //Cwp = (Cwp + 1) % NWindows; 9552526SN/A fault = new CleanWindow; 9562526SN/A } 9572526SN/A else 9582526SN/A { 9592526SN/A Cwp = (Cwp + 1) % NWindows; 9602526SN/A Rd = Rs1 + Rs2_or_imm13; 9612561SN/A Cansave = Cansave - 1; 9622561SN/A Canrestore = Canrestore + 1; 9633417Sgblack@eecs.umich.edu //This is here to make sure the CWP is written 9643417Sgblack@eecs.umich.edu //no matter what. This ensures that the results 9653417Sgblack@eecs.umich.edu //are written in the new window as well. 9663417Sgblack@eecs.umich.edu xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 9672526SN/A } 9682526SN/A }}); 9692526SN/A 0x3D: restore({{ 9702526SN/A if(Canrestore == 0) 9712526SN/A { 9722526SN/A if(Otherwin) 9733909Ssaidi@eecs.umich.edu fault = new FillNOther(4*Wstate<5:3>); 9742526SN/A else 9753909Ssaidi@eecs.umich.edu fault = new FillNNormal(4*Wstate<2:0>); 9762526SN/A } 9772526SN/A else 9782526SN/A { 9793417Sgblack@eecs.umich.edu //CWP should be set directly so that it always happens 9803417Sgblack@eecs.umich.edu //Also, this will allow writing to the new window and 9813417Sgblack@eecs.umich.edu //reading from the old one 9823417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 9832526SN/A Rd = Rs1 + Rs2_or_imm13; 9842561SN/A Cansave = Cansave + 1; 9852561SN/A Canrestore = Canrestore - 1; 9863417Sgblack@eecs.umich.edu //This is here to make sure the CWP is written 9873417Sgblack@eecs.umich.edu //no matter what. This ensures that the results 9883417Sgblack@eecs.umich.edu //are written in the new window as well. 9893417Sgblack@eecs.umich.edu xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 9902526SN/A } 9912526SN/A }}); 9922526SN/A 0x3E: decode FCN { 9932526SN/A 0x0: Priv::done({{ 9942526SN/A if(Tl == 0) 9952526SN/A return new IllegalInstruction; 9962646Ssaidi@eecs.umich.edu 9972646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 9982646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 9992646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 10002646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 10012646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 10023825Ssaidi@eecs.umich.edu Hpstate = Htstate; 10032646Ssaidi@eecs.umich.edu NPC = Tnpc; 10042646Ssaidi@eecs.umich.edu NNPC = Tnpc + 4; 10052526SN/A Tl = Tl - 1; 10062526SN/A }}); 10072938Sgblack@eecs.umich.edu 0x1: Priv::retry({{ 10082526SN/A if(Tl == 0) 10092526SN/A return new IllegalInstruction; 10102646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 10112646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 10122646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 10132646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 10142646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 10153826Ssaidi@eecs.umich.edu Hpstate = Htstate; 10162646Ssaidi@eecs.umich.edu NPC = Tpc; 10173417Sgblack@eecs.umich.edu NNPC = Tnpc; 10182526SN/A Tl = Tl - 1; 10192526SN/A }}); 10202526SN/A } 10212526SN/A } 10222469SN/A } 10232469SN/A 0x3: decode OP3 { 10242526SN/A format Load { 10253272Sgblack@eecs.umich.edu 0x00: lduw({{Rd = Mem.uw;}}); 10263272Sgblack@eecs.umich.edu 0x01: ldub({{Rd = Mem.ub;}}); 10273272Sgblack@eecs.umich.edu 0x02: lduh({{Rd = Mem.uhw;}}); 10283835Sgblack@eecs.umich.edu 0x03: ldtw({{ 10293272Sgblack@eecs.umich.edu uint64_t val = Mem.udw; 10302526SN/A RdLow = val<31:0>; 10312526SN/A RdHigh = val<63:32>; 10323272Sgblack@eecs.umich.edu }}); 10332526SN/A } 10342526SN/A format Store { 10353272Sgblack@eecs.umich.edu 0x04: stw({{Mem.uw = Rd.sw;}}); 10363272Sgblack@eecs.umich.edu 0x05: stb({{Mem.ub = Rd.sb;}}); 10373272Sgblack@eecs.umich.edu 0x06: sth({{Mem.uhw = Rd.shw;}}); 10383835Sgblack@eecs.umich.edu 0x07: sttw({{Mem.udw = RdLow<31:0> | (RdHigh<31:0> << 32);}}); 10392526SN/A } 10402526SN/A format Load { 10413272Sgblack@eecs.umich.edu 0x08: ldsw({{Rd = (int32_t)Mem.sw;}}); 10423272Sgblack@eecs.umich.edu 0x09: ldsb({{Rd = (int8_t)Mem.sb;}}); 10433272Sgblack@eecs.umich.edu 0x0A: ldsh({{Rd = (int16_t)Mem.shw;}}); 10443272Sgblack@eecs.umich.edu 0x0B: ldx({{Rd = (int64_t)Mem.sdw;}}); 10452526SN/A } 10463438Sgblack@eecs.umich.edu 0x0D: LoadStore::ldstub( 10473929Ssaidi@eecs.umich.edu {{uReg0 = Mem.ub;}}, 10483929Ssaidi@eecs.umich.edu {{Rd.ub = uReg0; 10493929Ssaidi@eecs.umich.edu Mem.ub = 0xFF;}}); 10503272Sgblack@eecs.umich.edu 0x0E: Store::stx({{Mem.udw = Rd}}); 10513388Sgblack@eecs.umich.edu 0x0F: LoadStore::swap( 10523929Ssaidi@eecs.umich.edu {{ uReg0 = Mem.uw}}, 10533929Ssaidi@eecs.umich.edu {{ Mem.uw = Rd.uw; 10543929Ssaidi@eecs.umich.edu Rd.uw = uReg0;}}); 10553810Sgblack@eecs.umich.edu format LoadAlt { 10563810Sgblack@eecs.umich.edu 0x10: lduwa({{Rd = Mem.uw;}}, {{EXT_ASI}}); 10573810Sgblack@eecs.umich.edu 0x11: lduba({{Rd = Mem.ub;}}, {{EXT_ASI}}); 10583810Sgblack@eecs.umich.edu 0x12: lduha({{Rd = Mem.uhw;}}, {{EXT_ASI}}); 10593856Ssaidi@eecs.umich.edu 0x13: decode EXT_ASI { 10603926Ssaidi@eecs.umich.edu //ASI_LDTD_AIUP 10613926Ssaidi@eecs.umich.edu 0x22: TwinLoad::ldtx_aiup( 10623929Ssaidi@eecs.umich.edu {{RdTwin.udw = Mem.udw;}}, {{EXT_ASI}}); 10633926Ssaidi@eecs.umich.edu //ASI_LDTD_AIUS 10643926Ssaidi@eecs.umich.edu 0x23: TwinLoad::ldtx_aius( 10653929Ssaidi@eecs.umich.edu {{RdTwin.udw = Mem.udw;}}, {{EXT_ASI}}); 10663856Ssaidi@eecs.umich.edu //ASI_QUAD_LDD 10673856Ssaidi@eecs.umich.edu 0x24: TwinLoad::ldtx_quad_ldd( 10683929Ssaidi@eecs.umich.edu {{RdTwin.udw = Mem.udw;}}, {{EXT_ASI}}); 10693856Ssaidi@eecs.umich.edu //ASI_LDTX_REAL 10703856Ssaidi@eecs.umich.edu 0x26: TwinLoad::ldtx_real( 10713929Ssaidi@eecs.umich.edu {{RdTwin.udw = Mem.udw;}}, {{EXT_ASI}}); 10723856Ssaidi@eecs.umich.edu //ASI_LDTX_N 10733856Ssaidi@eecs.umich.edu 0x27: TwinLoad::ldtx_n( 10743929Ssaidi@eecs.umich.edu {{RdTwin.udw = Mem.udw;}}, {{EXT_ASI}}); 10753856Ssaidi@eecs.umich.edu //ASI_LDTX_L 10763856Ssaidi@eecs.umich.edu 0x2C: TwinLoad::ldtx_l( 10773929Ssaidi@eecs.umich.edu {{RdTwin.udw = Mem.udw;}}, {{EXT_ASI}}); 10783856Ssaidi@eecs.umich.edu //ASI_LDTX_REAL_L 10793856Ssaidi@eecs.umich.edu 0x2E: TwinLoad::ldtx_real_l( 10803929Ssaidi@eecs.umich.edu {{RdTwin.udw = Mem.udw;}}, {{EXT_ASI}}); 10813856Ssaidi@eecs.umich.edu //ASI_LDTX_N_L 10823856Ssaidi@eecs.umich.edu 0x2F: TwinLoad::ldtx_n_l( 10833929Ssaidi@eecs.umich.edu {{RdTwin.udw = Mem.udw;}}, {{EXT_ASI}}); 10843901Ssaidi@eecs.umich.edu //ASI_LDTX_P 10853901Ssaidi@eecs.umich.edu 0xE2: TwinLoad::ldtx_p( 10863929Ssaidi@eecs.umich.edu {{RdTwin.udw = Mem.udw;}}, {{EXT_ASI}}); 10873926Ssaidi@eecs.umich.edu //ASI_LDTX_S 10883926Ssaidi@eecs.umich.edu 0xE3: TwinLoad::ldtx_s( 10893929Ssaidi@eecs.umich.edu {{RdTwin.udw = Mem.udw;}}, {{EXT_ASI}}); 10903856Ssaidi@eecs.umich.edu default: ldtwa({{ 10913856Ssaidi@eecs.umich.edu uint64_t val = Mem.udw; 10923856Ssaidi@eecs.umich.edu RdLow = val<31:0>; 10933856Ssaidi@eecs.umich.edu RdHigh = val<63:32>; 10943856Ssaidi@eecs.umich.edu }}, {{EXT_ASI}}); 10953856Ssaidi@eecs.umich.edu } 10962526SN/A } 10973810Sgblack@eecs.umich.edu format StoreAlt { 10983810Sgblack@eecs.umich.edu 0x14: stwa({{Mem.uw = Rd;}}, {{EXT_ASI}}); 10993810Sgblack@eecs.umich.edu 0x15: stba({{Mem.ub = Rd;}}, {{EXT_ASI}}); 11003810Sgblack@eecs.umich.edu 0x16: stha({{Mem.uhw = Rd;}}, {{EXT_ASI}}); 11013835Sgblack@eecs.umich.edu 0x17: sttwa({{Mem.udw = RdLow<31:0> | RdHigh<31:0> << 32;}}, {{EXT_ASI}}); 11022526SN/A } 11033810Sgblack@eecs.umich.edu format LoadAlt { 11043810Sgblack@eecs.umich.edu 0x18: ldswa({{Rd = (int32_t)Mem.sw;}}, {{EXT_ASI}}); 11053810Sgblack@eecs.umich.edu 0x19: ldsba({{Rd = (int8_t)Mem.sb;}}, {{EXT_ASI}}); 11063810Sgblack@eecs.umich.edu 0x1A: ldsha({{Rd = (int16_t)Mem.shw;}}, {{EXT_ASI}}); 11073810Sgblack@eecs.umich.edu 0x1B: ldxa({{Rd = (int64_t)Mem.sdw;}}, {{EXT_ASI}}); 11082526SN/A } 11093810Sgblack@eecs.umich.edu 0x1D: LoadStoreAlt::ldstuba( 11103929Ssaidi@eecs.umich.edu {{uReg0 = Mem.ub;}}, 11113929Ssaidi@eecs.umich.edu {{Rd.ub = uReg0; 11123929Ssaidi@eecs.umich.edu Mem.ub = 0xFF;}}, {{EXT_ASI}}); 11133810Sgblack@eecs.umich.edu 0x1E: StoreAlt::stxa({{Mem.udw = Rd}}, {{EXT_ASI}}); 11143810Sgblack@eecs.umich.edu 0x1F: LoadStoreAlt::swapa( 11153929Ssaidi@eecs.umich.edu {{ uReg0 = Mem.uw}}, 11163929Ssaidi@eecs.umich.edu {{ Mem.uw = Rd.uw; 11173929Ssaidi@eecs.umich.edu Rd.uw = uReg0;}}, {{EXT_ASI}}); 11182526SN/A format Trap { 11193931Ssaidi@eecs.umich.edu 0x20: Load::ldf({{Frds.uw = Mem.uw;}}); 11202526SN/A 0x21: decode X { 11213272Sgblack@eecs.umich.edu 0x0: Load::ldfsr({{Fsr = Mem.uw | Fsr<63:32>;}}); 11223272Sgblack@eecs.umich.edu 0x1: Load::ldxfsr({{Fsr = Mem.udw;}}); 11232469SN/A } 11242526SN/A 0x22: ldqf({{fault = new FpDisabled;}}); 11253272Sgblack@eecs.umich.edu 0x23: Load::lddf({{Frd.udw = Mem.udw;}}); 11263931Ssaidi@eecs.umich.edu 0x24: Store::stf({{Mem.uw = Frds.uw;}}); 11272526SN/A 0x25: decode X { 11283272Sgblack@eecs.umich.edu 0x0: Store::stfsr({{Mem.uw = Fsr<31:0>;}}); 11293272Sgblack@eecs.umich.edu 0x1: Store::stxfsr({{Mem.udw = Fsr;}}); 11302526SN/A } 11312526SN/A 0x26: stqf({{fault = new FpDisabled;}}); 11323272Sgblack@eecs.umich.edu 0x27: Store::stdf({{Mem.udw = Frd.udw;}}); 11332526SN/A 0x2D: Nop::prefetch({{ }}); 11343931Ssaidi@eecs.umich.edu 0x30: LoadAlt::ldfa({{Frds.uw = Mem.uw;}}, {{EXT_ASI}}); 11352526SN/A 0x32: ldqfa({{fault = new FpDisabled;}}); 11363272Sgblack@eecs.umich.edu format LoadAlt { 11373272Sgblack@eecs.umich.edu 0x33: decode EXT_ASI { 11383272Sgblack@eecs.umich.edu //ASI_NUCLEUS 11393272Sgblack@eecs.umich.edu 0x04: FailUnimpl::lddfa_n(); 11403272Sgblack@eecs.umich.edu //ASI_NUCLEUS_LITTLE 11413272Sgblack@eecs.umich.edu 0x0C: FailUnimpl::lddfa_nl(); 11423272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY 11433272Sgblack@eecs.umich.edu 0x10: FailUnimpl::lddfa_aiup(); 11443272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY_LITTLE 11453272Sgblack@eecs.umich.edu 0x18: FailUnimpl::lddfa_aiupl(); 11463272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY 11473272Sgblack@eecs.umich.edu 0x11: FailUnimpl::lddfa_aius(); 11483272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY_LITTLE 11493272Sgblack@eecs.umich.edu 0x19: FailUnimpl::lddfa_aiusl(); 11503272Sgblack@eecs.umich.edu //ASI_REAL 11513272Sgblack@eecs.umich.edu 0x14: FailUnimpl::lddfa_real(); 11523272Sgblack@eecs.umich.edu //ASI_REAL_LITTLE 11533272Sgblack@eecs.umich.edu 0x1C: FailUnimpl::lddfa_real_l(); 11543272Sgblack@eecs.umich.edu //ASI_REAL_IO 11553272Sgblack@eecs.umich.edu 0x15: FailUnimpl::lddfa_real_io(); 11563272Sgblack@eecs.umich.edu //ASI_REAL_IO_LITTLE 11573272Sgblack@eecs.umich.edu 0x1D: FailUnimpl::lddfa_real_io_l(); 11583272Sgblack@eecs.umich.edu //ASI_PRIMARY 11593272Sgblack@eecs.umich.edu 0x80: FailUnimpl::lddfa_p(); 11603272Sgblack@eecs.umich.edu //ASI_PRIMARY_LITTLE 11613272Sgblack@eecs.umich.edu 0x88: FailUnimpl::lddfa_pl(); 11623272Sgblack@eecs.umich.edu //ASI_SECONDARY 11633272Sgblack@eecs.umich.edu 0x81: FailUnimpl::lddfa_s(); 11643272Sgblack@eecs.umich.edu //ASI_SECONDARY_LITTLE 11653272Sgblack@eecs.umich.edu 0x89: FailUnimpl::lddfa_sl(); 11663272Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT 11673272Sgblack@eecs.umich.edu 0x82: FailUnimpl::lddfa_pnf(); 11683272Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT_LITTLE 11693272Sgblack@eecs.umich.edu 0x8A: FailUnimpl::lddfa_pnfl(); 11703272Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT 11713272Sgblack@eecs.umich.edu 0x83: FailUnimpl::lddfa_snf(); 11723272Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT_LITTLE 11733272Sgblack@eecs.umich.edu 0x8B: FailUnimpl::lddfa_snfl(); 11743272Sgblack@eecs.umich.edu 11753272Sgblack@eecs.umich.edu format BlockLoad { 11763272Sgblack@eecs.umich.edu // LDBLOCKF 11773272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY 11783272Sgblack@eecs.umich.edu 0x16: FailUnimpl::ldblockf_aiup(); 11793272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY 11803272Sgblack@eecs.umich.edu 0x17: FailUnimpl::ldblockf_aius(); 11813272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 11823272Sgblack@eecs.umich.edu 0x1E: FailUnimpl::ldblockf_aiupl(); 11833272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 11843272Sgblack@eecs.umich.edu 0x1F: FailUnimpl::ldblockf_aiusl(); 11853272Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY 11863810Sgblack@eecs.umich.edu 0xF0: ldblockf_p({{Frd_N.udw = Mem.udw;}}, {{EXT_ASI}}); 11873272Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY 11883272Sgblack@eecs.umich.edu 0xF1: FailUnimpl::ldblockf_s(); 11893272Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY_LITTLE 11903272Sgblack@eecs.umich.edu 0xF8: FailUnimpl::ldblockf_pl(); 11913272Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY_LITTLE 11923272Sgblack@eecs.umich.edu 0xF9: FailUnimpl::ldblockf_sl(); 11933272Sgblack@eecs.umich.edu } 11943272Sgblack@eecs.umich.edu 11953272Sgblack@eecs.umich.edu //LDSHORTF 11963272Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY 11973272Sgblack@eecs.umich.edu 0xD0: FailUnimpl::ldshortf_8p(); 11983272Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY 11993272Sgblack@eecs.umich.edu 0xD1: FailUnimpl::ldshortf_8s(); 12003272Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY_LITTLE 12013272Sgblack@eecs.umich.edu 0xD8: FailUnimpl::ldshortf_8pl(); 12023272Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY_LITTLE 12033272Sgblack@eecs.umich.edu 0xD9: FailUnimpl::ldshortf_8sl(); 12043272Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY 12053272Sgblack@eecs.umich.edu 0xD2: FailUnimpl::ldshortf_16p(); 12063272Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY 12073272Sgblack@eecs.umich.edu 0xD3: FailUnimpl::ldshortf_16s(); 12083272Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY_LITTLE 12093272Sgblack@eecs.umich.edu 0xDA: FailUnimpl::ldshortf_16pl(); 12103272Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY_LITTLE 12113272Sgblack@eecs.umich.edu 0xDB: FailUnimpl::ldshortf_16sl(); 12123272Sgblack@eecs.umich.edu //Not an ASI which is legal with lddfa 12133378Sgblack@eecs.umich.edu default: Trap::lddfa_bad_asi( 12143378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 12153272Sgblack@eecs.umich.edu } 12163272Sgblack@eecs.umich.edu } 12173931Ssaidi@eecs.umich.edu 0x34: Store::stfa({{Mem.uw = Frds.uw;}}); 12182954Sgblack@eecs.umich.edu 0x36: stqfa({{fault = new FpDisabled;}}); 12193378Sgblack@eecs.umich.edu format StoreAlt { 12203378Sgblack@eecs.umich.edu 0x37: decode EXT_ASI { 12213378Sgblack@eecs.umich.edu //ASI_NUCLEUS 12223378Sgblack@eecs.umich.edu 0x04: FailUnimpl::stdfa_n(); 12233378Sgblack@eecs.umich.edu //ASI_NUCLEUS_LITTLE 12243378Sgblack@eecs.umich.edu 0x0C: FailUnimpl::stdfa_nl(); 12253378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY 12263378Sgblack@eecs.umich.edu 0x10: FailUnimpl::stdfa_aiup(); 12273378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY_LITTLE 12283378Sgblack@eecs.umich.edu 0x18: FailUnimpl::stdfa_aiupl(); 12293378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY 12303378Sgblack@eecs.umich.edu 0x11: FailUnimpl::stdfa_aius(); 12313378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY_LITTLE 12323378Sgblack@eecs.umich.edu 0x19: FailUnimpl::stdfa_aiusl(); 12333378Sgblack@eecs.umich.edu //ASI_REAL 12343378Sgblack@eecs.umich.edu 0x14: FailUnimpl::stdfa_real(); 12353378Sgblack@eecs.umich.edu //ASI_REAL_LITTLE 12363378Sgblack@eecs.umich.edu 0x1C: FailUnimpl::stdfa_real_l(); 12373378Sgblack@eecs.umich.edu //ASI_REAL_IO 12383378Sgblack@eecs.umich.edu 0x15: FailUnimpl::stdfa_real_io(); 12393378Sgblack@eecs.umich.edu //ASI_REAL_IO_LITTLE 12403378Sgblack@eecs.umich.edu 0x1D: FailUnimpl::stdfa_real_io_l(); 12413378Sgblack@eecs.umich.edu //ASI_PRIMARY 12423378Sgblack@eecs.umich.edu 0x80: FailUnimpl::stdfa_p(); 12433378Sgblack@eecs.umich.edu //ASI_PRIMARY_LITTLE 12443378Sgblack@eecs.umich.edu 0x88: FailUnimpl::stdfa_pl(); 12453378Sgblack@eecs.umich.edu //ASI_SECONDARY 12463378Sgblack@eecs.umich.edu 0x81: FailUnimpl::stdfa_s(); 12473378Sgblack@eecs.umich.edu //ASI_SECONDARY_LITTLE 12483378Sgblack@eecs.umich.edu 0x89: FailUnimpl::stdfa_sl(); 12493378Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT 12503378Sgblack@eecs.umich.edu 0x82: FailUnimpl::stdfa_pnf(); 12513378Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT_LITTLE 12523378Sgblack@eecs.umich.edu 0x8A: FailUnimpl::stdfa_pnfl(); 12533378Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT 12543378Sgblack@eecs.umich.edu 0x83: FailUnimpl::stdfa_snf(); 12553378Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT_LITTLE 12563378Sgblack@eecs.umich.edu 0x8B: FailUnimpl::stdfa_snfl(); 12573378Sgblack@eecs.umich.edu 12583378Sgblack@eecs.umich.edu format BlockStore { 12593378Sgblack@eecs.umich.edu // STBLOCKF 12603378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY 12613378Sgblack@eecs.umich.edu 0x16: FailUnimpl::stblockf_aiup(); 12623378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY 12633378Sgblack@eecs.umich.edu 0x17: FailUnimpl::stblockf_aius(); 12643378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 12653378Sgblack@eecs.umich.edu 0x1E: FailUnimpl::stblockf_aiupl(); 12663378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 12673378Sgblack@eecs.umich.edu 0x1F: FailUnimpl::stblockf_aiusl(); 12683378Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY 12693810Sgblack@eecs.umich.edu 0xF0: stblockf_p({{Mem.udw = Frd_N.udw;}}, {{EXT_ASI}}); 12703378Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY 12713378Sgblack@eecs.umich.edu 0xF1: FailUnimpl::stblockf_s(); 12723378Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY_LITTLE 12733378Sgblack@eecs.umich.edu 0xF8: FailUnimpl::stblockf_pl(); 12743378Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY_LITTLE 12753378Sgblack@eecs.umich.edu 0xF9: FailUnimpl::stblockf_sl(); 12763378Sgblack@eecs.umich.edu } 12773378Sgblack@eecs.umich.edu 12783378Sgblack@eecs.umich.edu //STSHORTF 12793378Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY 12803378Sgblack@eecs.umich.edu 0xD0: FailUnimpl::stshortf_8p(); 12813378Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY 12823378Sgblack@eecs.umich.edu 0xD1: FailUnimpl::stshortf_8s(); 12833378Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY_LITTLE 12843378Sgblack@eecs.umich.edu 0xD8: FailUnimpl::stshortf_8pl(); 12853378Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY_LITTLE 12863378Sgblack@eecs.umich.edu 0xD9: FailUnimpl::stshortf_8sl(); 12873378Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY 12883378Sgblack@eecs.umich.edu 0xD2: FailUnimpl::stshortf_16p(); 12893378Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY 12903378Sgblack@eecs.umich.edu 0xD3: FailUnimpl::stshortf_16s(); 12913378Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY_LITTLE 12923378Sgblack@eecs.umich.edu 0xDA: FailUnimpl::stshortf_16pl(); 12933378Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY_LITTLE 12943378Sgblack@eecs.umich.edu 0xDB: FailUnimpl::stshortf_16sl(); 12953378Sgblack@eecs.umich.edu //Not an ASI which is legal with lddfa 12963378Sgblack@eecs.umich.edu default: Trap::stdfa_bad_asi( 12973378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 12983378Sgblack@eecs.umich.edu } 12993378Sgblack@eecs.umich.edu } 13003439Sgblack@eecs.umich.edu 0x3C: Cas::casa( 13013439Sgblack@eecs.umich.edu {{uReg0 = Mem.uw;}}, 13023439Sgblack@eecs.umich.edu {{if(Rs2.uw == uReg0) 13032526SN/A Mem.uw = Rd.uw; 13043439Sgblack@eecs.umich.edu else 13053439Sgblack@eecs.umich.edu storeCond = false; 13063810Sgblack@eecs.umich.edu Rd.uw = uReg0;}}, {{EXT_ASI}}); 13072526SN/A 0x3D: Nop::prefetcha({{ }}); 13083439Sgblack@eecs.umich.edu 0x3E: Cas::casxa( 13093439Sgblack@eecs.umich.edu {{uReg0 = Mem.udw;}}, 13103439Sgblack@eecs.umich.edu {{if(Rs2 == uReg0) 13112526SN/A Mem.udw = Rd; 13123439Sgblack@eecs.umich.edu else 13133439Sgblack@eecs.umich.edu storeCond = false; 13143810Sgblack@eecs.umich.edu Rd = uReg0;}}, {{EXT_ASI}}); 13152526SN/A } 13162469SN/A } 13172022SN/A} 1318