decoder.isa revision 3810
12632Sstever@eecs.umich.edu// Copyright (c) 2006 The Regents of The University of Michigan 22632Sstever@eecs.umich.edu// All rights reserved. 32632Sstever@eecs.umich.edu// 42632Sstever@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 52632Sstever@eecs.umich.edu// modification, are permitted provided that the following conditions are 62632Sstever@eecs.umich.edu// met: redistributions of source code must retain the above copyright 72632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 82632Sstever@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 92632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 102632Sstever@eecs.umich.edu// documentation and/or other materials provided with the distribution; 112632Sstever@eecs.umich.edu// neither the name of the copyright holders nor the names of its 122632Sstever@eecs.umich.edu// contributors may be used to endorse or promote products derived from 132632Sstever@eecs.umich.edu// this software without specific prior written permission. 142632Sstever@eecs.umich.edu// 152632Sstever@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 162632Sstever@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 172632Sstever@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 182632Sstever@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 192632Sstever@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 202632Sstever@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 212632Sstever@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 222632Sstever@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 232632Sstever@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 242632Sstever@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 252632Sstever@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 262632Sstever@eecs.umich.edu// 272632Sstever@eecs.umich.edu// Authors: Ali Saidi 282632Sstever@eecs.umich.edu// Gabe Black 292632Sstever@eecs.umich.edu// Steve Reinhardt 302632Sstever@eecs.umich.edu 312022SN/A//////////////////////////////////////////////////////////////////// 322022SN/A// 332022SN/A// The actual decoder specification 342022SN/A// 352022SN/A 362469SN/Adecode OP default Unknown::unknown() 372469SN/A{ 382469SN/A 0x0: decode OP2 392469SN/A { 402516SN/A //Throw an illegal instruction acception 412516SN/A 0x0: Trap::illtrap({{fault = new IllegalInstruction;}}); 422944Sgblack@eecs.umich.edu format BranchN 432482SN/A { 443598Sgblack@eecs.umich.edu //bpcc 453056Sgblack@eecs.umich.edu 0x1: decode COND2 462469SN/A { 473056Sgblack@eecs.umich.edu //Branch Always 483056Sgblack@eecs.umich.edu 0x8: decode A 493056Sgblack@eecs.umich.edu { 503598Sgblack@eecs.umich.edu 0x0: bpa(19, {{ 512516SN/A NNPC = xc->readPC() + disp; 523056Sgblack@eecs.umich.edu }}); 533598Sgblack@eecs.umich.edu 0x1: bpa(19, {{ 543056Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 553056Sgblack@eecs.umich.edu NNPC = NPC + 4; 563056Sgblack@eecs.umich.edu }}, ',a'); 573056Sgblack@eecs.umich.edu } 583056Sgblack@eecs.umich.edu //Branch Never 593056Sgblack@eecs.umich.edu 0x0: decode A 603056Sgblack@eecs.umich.edu { 613598Sgblack@eecs.umich.edu 0x0: bpn(19, {{ 623056Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 633056Sgblack@eecs.umich.edu }}); 643598Sgblack@eecs.umich.edu 0x1: bpn(19, {{ 653056Sgblack@eecs.umich.edu NPC = xc->readNextPC() + 4; 663056Sgblack@eecs.umich.edu NNPC = NPC + 4; 673056Sgblack@eecs.umich.edu }}, ',a'); 683056Sgblack@eecs.umich.edu } 693056Sgblack@eecs.umich.edu default: decode BPCC 703056Sgblack@eecs.umich.edu { 713056Sgblack@eecs.umich.edu 0x0: bpcci(19, {{ 723056Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 733056Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 743056Sgblack@eecs.umich.edu else 753056Sgblack@eecs.umich.edu handle_annul 763056Sgblack@eecs.umich.edu }}); 773056Sgblack@eecs.umich.edu 0x2: bpccx(19, {{ 783056Sgblack@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND2)) 793056Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 803056Sgblack@eecs.umich.edu else 813056Sgblack@eecs.umich.edu handle_annul 823056Sgblack@eecs.umich.edu }}); 833056Sgblack@eecs.umich.edu } 842482SN/A } 853598Sgblack@eecs.umich.edu //bicc 863598Sgblack@eecs.umich.edu 0x2: decode COND2 873598Sgblack@eecs.umich.edu { 883598Sgblack@eecs.umich.edu //Branch Always 893598Sgblack@eecs.umich.edu 0x8: decode A 903598Sgblack@eecs.umich.edu { 913598Sgblack@eecs.umich.edu 0x0: ba(22, {{ 923598Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 933598Sgblack@eecs.umich.edu }}); 943598Sgblack@eecs.umich.edu 0x1: ba(22, {{ 953598Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 963598Sgblack@eecs.umich.edu NNPC = NPC + 4; 973598Sgblack@eecs.umich.edu }}, ',a'); 983598Sgblack@eecs.umich.edu } 993598Sgblack@eecs.umich.edu //Branch Never 1003598Sgblack@eecs.umich.edu 0x0: decode A 1013598Sgblack@eecs.umich.edu { 1023598Sgblack@eecs.umich.edu 0x0: bn(22, {{ 1033598Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 1043598Sgblack@eecs.umich.edu }}); 1053598Sgblack@eecs.umich.edu 0x1: bn(22, {{ 1063598Sgblack@eecs.umich.edu NPC = xc->readNextPC() + 4; 1073598Sgblack@eecs.umich.edu NNPC = NPC + 4; 1083598Sgblack@eecs.umich.edu }}, ',a'); 1093598Sgblack@eecs.umich.edu } 1103598Sgblack@eecs.umich.edu default: bicc(22, {{ 1113598Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 1123598Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 1133598Sgblack@eecs.umich.edu else 1143598Sgblack@eecs.umich.edu handle_annul 1153598Sgblack@eecs.umich.edu }}); 1163598Sgblack@eecs.umich.edu } 1172516SN/A } 1182516SN/A 0x3: decode RCOND2 1192516SN/A { 1202516SN/A format BranchSplit 1212482SN/A { 1222482SN/A 0x1: bpreq({{ 1232591SN/A if(Rs1.sdw == 0) 1242516SN/A NNPC = xc->readPC() + disp; 1252580SN/A else 1262580SN/A handle_annul 1272482SN/A }}); 1282482SN/A 0x2: bprle({{ 1292591SN/A if(Rs1.sdw <= 0) 1302516SN/A NNPC = xc->readPC() + disp; 1312580SN/A else 1322580SN/A handle_annul 1332482SN/A }}); 1342482SN/A 0x3: bprl({{ 1352591SN/A if(Rs1.sdw < 0) 1362516SN/A NNPC = xc->readPC() + disp; 1372580SN/A else 1382580SN/A handle_annul 1392482SN/A }}); 1402482SN/A 0x5: bprne({{ 1412591SN/A if(Rs1.sdw != 0) 1422516SN/A NNPC = xc->readPC() + disp; 1432580SN/A else 1442580SN/A handle_annul 1452482SN/A }}); 1462482SN/A 0x6: bprg({{ 1472591SN/A if(Rs1.sdw > 0) 1482516SN/A NNPC = xc->readPC() + disp; 1492580SN/A else 1502580SN/A handle_annul 1512482SN/A }}); 1522482SN/A 0x7: bprge({{ 1532591SN/A if(Rs1.sdw >= 0) 1542516SN/A NNPC = xc->readPC() + disp; 1552580SN/A else 1562580SN/A handle_annul 1572482SN/A }}); 1582469SN/A } 1592482SN/A } 1602516SN/A //SETHI (or NOP if rd == 0 and imm == 0) 1613042Sgblack@eecs.umich.edu 0x4: SetHi::sethi({{Rd.udw = imm;}}); 1622516SN/A 0x5: Trap::fbpfcc({{fault = new FpDisabled;}}); 1632516SN/A 0x6: Trap::fbfcc({{fault = new FpDisabled;}}); 1642469SN/A } 1652944Sgblack@eecs.umich.edu 0x1: BranchN::call(30, {{ 1662516SN/A R15 = xc->readPC(); 1672516SN/A NNPC = R15 + disp; 1682469SN/A }}); 1692469SN/A 0x2: decode OP3 { 1702482SN/A format IntOp { 1712482SN/A 0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}}); 1722974Sgblack@eecs.umich.edu 0x01: and({{Rd = Rs1.sdw & Rs2_or_imm13;}}); 1732974Sgblack@eecs.umich.edu 0x02: or({{Rd = Rs1.sdw | Rs2_or_imm13;}}); 1742974Sgblack@eecs.umich.edu 0x03: xor({{Rd = Rs1.sdw ^ Rs2_or_imm13;}}); 1752526SN/A 0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}}); 1762974Sgblack@eecs.umich.edu 0x05: andn({{Rd = Rs1.sdw & ~Rs2_or_imm13;}}); 1772974Sgblack@eecs.umich.edu 0x06: orn({{Rd = Rs1.sdw | ~Rs2_or_imm13;}}); 1782974Sgblack@eecs.umich.edu 0x07: xnor({{Rd = ~(Rs1.sdw ^ Rs2_or_imm13);}}); 1792646Ssaidi@eecs.umich.edu 0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + Ccr<0:0>;}}); 1802974Sgblack@eecs.umich.edu 0x09: mulx({{Rd = Rs1.sdw * Rs2_or_imm13;}}); 1812469SN/A 0x0A: umul({{ 1822516SN/A Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>; 1832646Ssaidi@eecs.umich.edu Y = Rd<63:32>; 1842482SN/A }}); 1852469SN/A 0x0B: smul({{ 1862516SN/A Rd.sdw = Rs1.sdw<31:0> * Rs2_or_imm13<31:0>; 1872646Ssaidi@eecs.umich.edu Y = Rd.sdw; 1882482SN/A }}); 1892954Sgblack@eecs.umich.edu 0x0C: subc({{Rd.sdw = Rs1.sdw + (~Rs2_or_imm13) + 1 - Ccr<0:0>}}); 1902469SN/A 0x0D: udivx({{ 1912516SN/A if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 1922516SN/A else Rd.udw = Rs1.udw / Rs2_or_imm13; 1932482SN/A }}); 1942469SN/A 0x0E: udiv({{ 1952516SN/A if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 1962482SN/A else 1972482SN/A { 1982646Ssaidi@eecs.umich.edu Rd.udw = ((Y << 32) | Rs1.udw<31:0>) / Rs2_or_imm13; 1992482SN/A if(Rd.udw >> 32 != 0) 2002482SN/A Rd.udw = 0xFFFFFFFF; 2012482SN/A } 2022482SN/A }}); 2032482SN/A 0x0F: sdiv({{ 2042615SN/A if(Rs2_or_imm13.sdw == 0) 2052469SN/A fault = new DivisionByZero; 2062469SN/A else 2072482SN/A { 2082646Ssaidi@eecs.umich.edu Rd.udw = ((int64_t)((Y << 32) | Rs1.sdw<31:0>)) / Rs2_or_imm13.sdw; 2092482SN/A if(Rd.udw<63:31> != 0) 2102482SN/A Rd.udw = 0x7FFFFFFF; 2112482SN/A else if(Rd.udw<63:> && Rd.udw<62:31> != 0xFFFFFFFF) 2122588SN/A Rd.udw = 0xFFFFFFFF80000000ULL; 2132482SN/A } 2142526SN/A }}); 2152469SN/A } 2162482SN/A format IntOpCc { 2172469SN/A 0x10: addcc({{ 2182516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 2192469SN/A Rd = resTemp = Rs1 + val2;}}, 2202580SN/A {{(Rs1<31:0> + val2<31:0>)<32:>}}, 2212469SN/A {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 2222580SN/A {{(Rs1<63:1> + val2<63:1> + (Rs1 & val2)<0:>)<63:>}}, 2232469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 2242526SN/A ); 2252482SN/A 0x11: IntOpCcRes::andcc({{Rd = Rs1 & Rs2_or_imm13;}}); 2262482SN/A 0x12: IntOpCcRes::orcc({{Rd = Rs1 | Rs2_or_imm13;}}); 2272482SN/A 0x13: IntOpCcRes::xorcc({{Rd = Rs1 ^ Rs2_or_imm13;}}); 2282469SN/A 0x14: subcc({{ 2292580SN/A int64_t val2 = Rs2_or_imm13; 2302580SN/A Rd = Rs1 - val2;}}, 2312580SN/A {{(~(Rs1<31:0> + (~val2)<31:0> + 1))<32:>}}, 2322580SN/A {{(Rs1<31:> != val2<31:>) && (Rs1<31:> != Rd<31:>)}}, 2332580SN/A {{(~(Rs1<63:1> + (~val2)<63:1> + 2342580SN/A (Rs1 | ~val2)<0:>))<63:>}}, 2352580SN/A {{Rs1<63:> != val2<63:> && Rs1<63:> != Rd<63:>}} 2362526SN/A ); 2372482SN/A 0x15: IntOpCcRes::andncc({{Rd = Rs1 & ~Rs2_or_imm13;}}); 2382482SN/A 0x16: IntOpCcRes::orncc({{Rd = Rs1 | ~Rs2_or_imm13;}}); 2392482SN/A 0x17: IntOpCcRes::xnorcc({{Rd = ~(Rs1 ^ Rs2_or_imm13);}}); 2402469SN/A 0x18: addccc({{ 2412516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 2422646Ssaidi@eecs.umich.edu int64_t carryin = Ccr<0:0>; 2432469SN/A Rd = resTemp = Rs1 + val2 + carryin;}}, 2442580SN/A {{(Rs1<31:0> + val2<31:0> + carryin)<32:>}}, 2452469SN/A {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 2462580SN/A {{(Rs1<63:1> + val2<63:1> + 2472580SN/A ((Rs1 & val2) | (carryin & (Rs1 | val2)))<0:>)<63:>}}, 2482469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 2492526SN/A ); 2502469SN/A 0x1A: umulcc({{ 2512615SN/A uint64_t resTemp; 2522615SN/A Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>; 2532646Ssaidi@eecs.umich.edu Y = resTemp<63:32>;}}, 2542526SN/A {{0}},{{0}},{{0}},{{0}}); 2552469SN/A 0x1B: smulcc({{ 2562615SN/A int64_t resTemp; 2572615SN/A Rd = resTemp = Rs1.sdw<31:0> * Rs2_or_imm13.sdw<31:0>; 2582646Ssaidi@eecs.umich.edu Y = resTemp<63:32>;}}, 2592526SN/A {{0}},{{0}},{{0}},{{0}}); 2602469SN/A 0x1C: subccc({{ 2612516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 2622646Ssaidi@eecs.umich.edu int64_t carryin = Ccr<0:0>; 2632954Sgblack@eecs.umich.edu Rd = resTemp = Rs1 + ~val2 + 1 - carryin;}}, 2642580SN/A {{(~((Rs1<31:0> + (~(val2 + carryin))<31:0> + 1))<32:>)}}, 2652469SN/A {{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}}, 2662580SN/A {{(~((Rs1<63:1> + (~(val2 + carryin))<63:1>) + (Rs1<0:> + (~(val2+carryin))<0:> + 1)<63:1>))<63:>}}, 2672469SN/A {{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}} 2682526SN/A ); 2692469SN/A 0x1D: udivxcc({{ 2702615SN/A if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero; 2712615SN/A else Rd = Rs1.udw / Rs2_or_imm13.udw;}} 2722526SN/A ,{{0}},{{0}},{{0}},{{0}}); 2732469SN/A 0x1E: udivcc({{ 2742615SN/A uint32_t resTemp, val2 = Rs2_or_imm13.udw; 2752989Ssaidi@eecs.umich.edu int32_t overflow = 0; 2762469SN/A if(val2 == 0) fault = new DivisionByZero; 2772469SN/A else 2782224SN/A { 2792646Ssaidi@eecs.umich.edu resTemp = (uint64_t)((Y << 32) | Rs1.udw<31:0>) / val2; 2802516SN/A overflow = (resTemp<63:32> != 0); 2812516SN/A if(overflow) Rd = resTemp = 0xFFFFFFFF; 2822516SN/A else Rd = resTemp; 2832469SN/A } }}, 2842469SN/A {{0}}, 2852469SN/A {{overflow}}, 2862469SN/A {{0}}, 2872469SN/A {{0}} 2882526SN/A ); 2892469SN/A 0x1F: sdivcc({{ 2902996Sgblack@eecs.umich.edu int64_t val2 = Rs2_or_imm13.sdw<31:0>; 2912996Sgblack@eecs.umich.edu bool overflow = false, underflow = false; 2922469SN/A if(val2 == 0) fault = new DivisionByZero; 2932469SN/A else 2942469SN/A { 2952996Sgblack@eecs.umich.edu Rd = (int64_t)((Y << 32) | Rs1.sdw<31:0>) / val2; 2962996Sgblack@eecs.umich.edu overflow = (Rd<63:31> != 0); 2972996Sgblack@eecs.umich.edu underflow = (Rd<63:> && Rd<62:31> != 0xFFFFFFFF); 2982996Sgblack@eecs.umich.edu if(overflow) Rd = 0x7FFFFFFF; 2992996Sgblack@eecs.umich.edu else if(underflow) Rd = 0xFFFFFFFF80000000ULL; 3002469SN/A } }}, 3012469SN/A {{0}}, 3022469SN/A {{overflow || underflow}}, 3032469SN/A {{0}}, 3042469SN/A {{0}} 3052526SN/A ); 3062469SN/A 0x20: taddcc({{ 3072516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3082469SN/A Rd = resTemp = Rs1 + val2; 3092469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}}, 3103753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 3112469SN/A {{overflow}}, 3122469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3132469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3142526SN/A ); 3152469SN/A 0x21: tsubcc({{ 3162516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3172469SN/A Rd = resTemp = Rs1 + val2; 3182469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}}, 3193753Sgblack@eecs.umich.edu {{(Rs1<31:0> + val2<31:0>)<32:0>}}, 3202469SN/A {{overflow}}, 3212469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3222469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3232526SN/A ); 3242469SN/A 0x22: taddcctv({{ 3252996Sgblack@eecs.umich.edu int64_t val2 = Rs2_or_imm13; 3262996Sgblack@eecs.umich.edu Rd = Rs1 + val2; 3272954Sgblack@eecs.umich.edu int32_t overflow = Rs1<1:0> || val2<1:0> || 3282954Sgblack@eecs.umich.edu (Rs1<31:> == val2<31:> && val2<31:> != Rd<31:>); 3292469SN/A if(overflow) fault = new TagOverflow;}}, 3303753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 3312469SN/A {{overflow}}, 3322469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3332996Sgblack@eecs.umich.edu {{Rs1<63:> == val2<63:> && val2<63:> != Rd<63:>}} 3342526SN/A ); 3352469SN/A 0x23: tsubcctv({{ 3362516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3372469SN/A Rd = resTemp = Rs1 + val2; 3382469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>); 3392469SN/A if(overflow) fault = new TagOverflow;}}, 3403753Sgblack@eecs.umich.edu {{((Rs1<31:0> + val2<31:0>)<32:0>)}}, 3412469SN/A {{overflow}}, 3422469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3432469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3442526SN/A ); 3452469SN/A 0x24: mulscc({{ 3462516SN/A int64_t resTemp, multiplicand = Rs2_or_imm13; 3472469SN/A int32_t multiplier = Rs1<31:0>; 3482469SN/A int32_t savedLSB = Rs1<0:>; 3492516SN/A multiplier = multiplier<31:1> | 3503753Sgblack@eecs.umich.edu ((Ccr<3:3> ^ Ccr<1:1>) << 32); 3512646Ssaidi@eecs.umich.edu if(!Y<0:>) 3522469SN/A multiplicand = 0; 3532469SN/A Rd = resTemp = multiplicand + multiplier; 3542646Ssaidi@eecs.umich.edu Y = Y<31:1> | (savedLSB << 31);}}, 3553753Sgblack@eecs.umich.edu {{((multiplicand<31:0> + multiplier<31:0>)<32:0>)}}, 3562469SN/A {{multiplicand<31:> == multiplier<31:> && multiplier<31:> != resTemp<31:>}}, 3572469SN/A {{((multiplicand >> 1) + (multiplier >> 1) + (multiplicand & multiplier & 0x1))<63:>}}, 3582469SN/A {{multiplicand<63:> == multiplier<63:> && multiplier<63:> != resTemp<63:>}} 3592526SN/A ); 3602526SN/A } 3612526SN/A format IntOp 3622526SN/A { 3632526SN/A 0x25: decode X { 3642526SN/A 0x0: sll({{Rd = Rs1 << (I ? SHCNT32 : Rs2<4:0>);}}); 3652526SN/A 0x1: sllx({{Rd = Rs1 << (I ? SHCNT64 : Rs2<5:0>);}}); 3662469SN/A } 3672526SN/A 0x26: decode X { 3682526SN/A 0x0: srl({{Rd = Rs1.uw >> (I ? SHCNT32 : Rs2<4:0>);}}); 3692526SN/A 0x1: srlx({{Rd = Rs1.udw >> (I ? SHCNT64 : Rs2<5:0>);}}); 3702526SN/A } 3712526SN/A 0x27: decode X { 3722526SN/A 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}}); 3732526SN/A 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}}); 3742526SN/A } 3752954Sgblack@eecs.umich.edu 0x28: decode RS1 { 3763587Sgblack@eecs.umich.edu 0x00: NoPriv::rdy({{Rd = Y;}}); 3773587Sgblack@eecs.umich.edu //1 should cause an illegal instruction exception 3783587Sgblack@eecs.umich.edu 0x02: NoPriv::rdccr({{Rd = Ccr;}}); 3793587Sgblack@eecs.umich.edu 0x03: NoPriv::rdasi({{Rd = Asi;}}); 3803587Sgblack@eecs.umich.edu 0x04: PrivCheck::rdtick({{Rd = Tick;}}, {{Tick<63:>}}); 3813587Sgblack@eecs.umich.edu 0x05: NoPriv::rdpc({{ 3823587Sgblack@eecs.umich.edu if(Pstate<3:>) 3833587Sgblack@eecs.umich.edu Rd = (xc->readPC())<31:0>; 3843587Sgblack@eecs.umich.edu else 3853587Sgblack@eecs.umich.edu Rd = xc->readPC();}}); 3863587Sgblack@eecs.umich.edu 0x06: NoPriv::rdfprs({{ 3873587Sgblack@eecs.umich.edu //Wait for all fpops to finish. 3883587Sgblack@eecs.umich.edu Rd = Fprs; 3893587Sgblack@eecs.umich.edu }}); 3903587Sgblack@eecs.umich.edu //7-14 should cause an illegal instruction exception 3913587Sgblack@eecs.umich.edu 0x0F: decode I { 3922954Sgblack@eecs.umich.edu 0x0: Nop::stbar({{/*stuff*/}}); 3932954Sgblack@eecs.umich.edu 0x1: Nop::membar({{/*stuff*/}}); 3942954Sgblack@eecs.umich.edu } 3953587Sgblack@eecs.umich.edu 0x10: Priv::rdpcr({{Rd = Pcr;}}); 3963587Sgblack@eecs.umich.edu 0x11: PrivCheck::rdpic({{Rd = Pic;}}, {{Pcr<0:>}}); 3973587Sgblack@eecs.umich.edu //0x12 should cause an illegal instruction exception 3983587Sgblack@eecs.umich.edu 0x13: NoPriv::rdgsr({{ 3993587Sgblack@eecs.umich.edu if(Fprs<2:> == 0 || Pstate<4:> == 0) 4003587Sgblack@eecs.umich.edu Rd = Gsr; 4013587Sgblack@eecs.umich.edu else 4023587Sgblack@eecs.umich.edu fault = new FpDisabled; 4032954Sgblack@eecs.umich.edu }}); 4043587Sgblack@eecs.umich.edu //0x14-0x15 should cause an illegal instruction exception 4053587Sgblack@eecs.umich.edu 0x16: Priv::rdsoftint({{Rd = Softint;}}); 4063587Sgblack@eecs.umich.edu 0x17: Priv::rdtick_cmpr({{Rd = TickCmpr;}}); 4073587Sgblack@eecs.umich.edu 0x18: PrivCheck::rdstick({{Rd = Stick}}, {{Stick<63:>}}); 4083587Sgblack@eecs.umich.edu 0x19: Priv::rdstick_cmpr({{Rd = StickCmpr;}}); 4093598Sgblack@eecs.umich.edu 0x1A: Priv::rdstrand_sts_reg({{ 4103598Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 4113598Sgblack@eecs.umich.edu Rd = StrandStsReg<0:>; 4123598Sgblack@eecs.umich.edu else 4133598Sgblack@eecs.umich.edu Rd = StrandStsReg; 4143598Sgblack@eecs.umich.edu }}); 4153598Sgblack@eecs.umich.edu //0x1A is supposed to be reserved, but it reads the strand 4163598Sgblack@eecs.umich.edu //status register. 4173598Sgblack@eecs.umich.edu //0x1B-0x1F should cause an illegal instruction exception 4182954Sgblack@eecs.umich.edu } 4193587Sgblack@eecs.umich.edu 0x29: decode RS1 { 4203587Sgblack@eecs.umich.edu 0x00: HPriv::rdhprhpstate({{Rd = Hpstate;}}); 4213587Sgblack@eecs.umich.edu 0x01: HPriv::rdhprhtstate({{ 4223587Sgblack@eecs.umich.edu if(Tl == 0) 4233587Sgblack@eecs.umich.edu return new IllegalInstruction; 4243587Sgblack@eecs.umich.edu Rd = Htstate; 4253587Sgblack@eecs.umich.edu }}); 4263587Sgblack@eecs.umich.edu //0x02 should cause an illegal instruction exception 4273587Sgblack@eecs.umich.edu 0x03: HPriv::rdhprhintp({{Rd = Hintp;}}); 4283587Sgblack@eecs.umich.edu //0x04 should cause an illegal instruction exception 4293587Sgblack@eecs.umich.edu 0x05: HPriv::rdhprhtba({{Rd = Htba;}}); 4303587Sgblack@eecs.umich.edu 0x06: HPriv::rdhprhver({{Rd = Hver;}}); 4313587Sgblack@eecs.umich.edu //0x07-0x1E should cause an illegal instruction exception 4323587Sgblack@eecs.umich.edu 0x1F: HPriv::rdhprhstick_cmpr({{Rd = HstickCmpr;}}); 4333587Sgblack@eecs.umich.edu } 4343587Sgblack@eecs.umich.edu 0x2A: decode RS1 { 4353587Sgblack@eecs.umich.edu 0x00: Priv::rdprtpc({{ 4363587Sgblack@eecs.umich.edu if(Tl == 0) 4373587Sgblack@eecs.umich.edu return new IllegalInstruction; 4383587Sgblack@eecs.umich.edu Rd = Tpc; 4393587Sgblack@eecs.umich.edu }}); 4403587Sgblack@eecs.umich.edu 0x01: Priv::rdprtnpc({{ 4413587Sgblack@eecs.umich.edu if(Tl == 0) 4423587Sgblack@eecs.umich.edu return new IllegalInstruction; 4433587Sgblack@eecs.umich.edu Rd = Tnpc; 4443587Sgblack@eecs.umich.edu }}); 4453587Sgblack@eecs.umich.edu 0x02: Priv::rdprtstate({{ 4463587Sgblack@eecs.umich.edu if(Tl == 0) 4473587Sgblack@eecs.umich.edu return new IllegalInstruction; 4483587Sgblack@eecs.umich.edu Rd = Tstate; 4493587Sgblack@eecs.umich.edu }}); 4503587Sgblack@eecs.umich.edu 0x03: Priv::rdprtt({{ 4513587Sgblack@eecs.umich.edu if(Tl == 0) 4523587Sgblack@eecs.umich.edu return new IllegalInstruction; 4533587Sgblack@eecs.umich.edu Rd = Tt; 4543587Sgblack@eecs.umich.edu }}); 4553587Sgblack@eecs.umich.edu 0x04: Priv::rdprtick({{Rd = Tick;}}); 4563587Sgblack@eecs.umich.edu 0x05: Priv::rdprtba({{Rd = Tba;}}); 4573587Sgblack@eecs.umich.edu 0x06: Priv::rdprpstate({{Rd = Pstate;}}); 4583587Sgblack@eecs.umich.edu 0x07: Priv::rdprtl({{Rd = Tl;}}); 4593587Sgblack@eecs.umich.edu 0x08: Priv::rdprpil({{Rd = Pil;}}); 4603587Sgblack@eecs.umich.edu 0x09: Priv::rdprcwp({{Rd = Cwp;}}); 4613587Sgblack@eecs.umich.edu 0x0A: Priv::rdprcansave({{Rd = Cansave;}}); 4623587Sgblack@eecs.umich.edu 0x0B: Priv::rdprcanrestore({{Rd = Canrestore;}}); 4633587Sgblack@eecs.umich.edu 0x0C: Priv::rdprcleanwin({{Rd = Cleanwin;}}); 4643587Sgblack@eecs.umich.edu 0x0D: Priv::rdprotherwin({{Rd = Otherwin;}}); 4653587Sgblack@eecs.umich.edu 0x0E: Priv::rdprwstate({{Rd = Wstate;}}); 4663587Sgblack@eecs.umich.edu //0x0F should cause an illegal instruction exception 4673587Sgblack@eecs.umich.edu 0x10: Priv::rdprgl({{Rd = Gl;}}); 4683587Sgblack@eecs.umich.edu //0x11-0x1F should cause an illegal instruction exception 4693587Sgblack@eecs.umich.edu } 4702526SN/A 0x2B: BasicOperate::flushw({{ 4712526SN/A if(NWindows - 2 - Cansave == 0) 4722526SN/A { 4732526SN/A if(Otherwin) 4742646Ssaidi@eecs.umich.edu fault = new SpillNOther(Wstate<5:3>); 4752526SN/A else 4762646Ssaidi@eecs.umich.edu fault = new SpillNNormal(Wstate<2:0>); 4772526SN/A } 4782526SN/A }}); 4792526SN/A 0x2C: decode MOVCC3 4802469SN/A { 4812526SN/A 0x0: Trap::movccfcc({{fault = new FpDisabled;}}); 4822526SN/A 0x1: decode CC 4832526SN/A { 4842526SN/A 0x0: movcci({{ 4852646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND4)) 4862591SN/A Rd = Rs2_or_imm11; 4872591SN/A else 4882591SN/A Rd = Rd; 4892526SN/A }}); 4902526SN/A 0x2: movccx({{ 4912646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND4)) 4922591SN/A Rd = Rs2_or_imm11; 4932591SN/A else 4942591SN/A Rd = Rd; 4952526SN/A }}); 4962224SN/A } 4972526SN/A } 4982526SN/A 0x2D: sdivx({{ 4992615SN/A if(Rs2_or_imm13.sdw == 0) fault = new DivisionByZero; 5002615SN/A else Rd.sdw = Rs1.sdw / Rs2_or_imm13.sdw; 5012526SN/A }}); 5022526SN/A 0x2E: decode RS1 { 5032526SN/A 0x0: IntOp::popc({{ 5042526SN/A int64_t count = 0; 5052526SN/A uint64_t temp = Rs2_or_imm13; 5062526SN/A //Count the 1s in the front 4bits until none are left 5072526SN/A uint8_t oneBits[] = {0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4}; 5082526SN/A while(temp) 5092469SN/A { 5102526SN/A count += oneBits[temp & 0xF]; 5112526SN/A temp = temp >> 4; 5122516SN/A } 5132591SN/A Rd = count; 5142516SN/A }}); 5152526SN/A } 5162526SN/A 0x2F: decode RCOND3 5172526SN/A { 5182615SN/A 0x1: movreq({{Rd = (Rs1.sdw == 0) ? Rs2_or_imm10 : Rd;}}); 5192615SN/A 0x2: movrle({{Rd = (Rs1.sdw <= 0) ? Rs2_or_imm10 : Rd;}}); 5202615SN/A 0x3: movrl({{Rd = (Rs1.sdw < 0) ? Rs2_or_imm10 : Rd;}}); 5212615SN/A 0x5: movrne({{Rd = (Rs1.sdw != 0) ? Rs2_or_imm10 : Rd;}}); 5222615SN/A 0x6: movrg({{Rd = (Rs1.sdw > 0) ? Rs2_or_imm10 : Rd;}}); 5232615SN/A 0x7: movrge({{Rd = (Rs1.sdw >= 0) ? Rs2_or_imm10 : Rd;}}); 5242526SN/A } 5253587Sgblack@eecs.umich.edu 0x30: decode RD { 5263587Sgblack@eecs.umich.edu 0x00: NoPriv::wry({{Y = Rs1 ^ Rs2_or_imm13;}}); 5273587Sgblack@eecs.umich.edu //0x01 should cause an illegal instruction exception 5283587Sgblack@eecs.umich.edu 0x02: NoPriv::wrccr({{Ccr = Rs1 ^ Rs2_or_imm13;}}); 5293587Sgblack@eecs.umich.edu 0x03: NoPriv::wrasi({{Ccr = Rs1 ^ Rs2_or_imm13;}}); 5303587Sgblack@eecs.umich.edu //0x04-0x05 should cause an illegal instruction exception 5313587Sgblack@eecs.umich.edu 0x06: NoPriv::wrfprs({{Fprs = Rs1 ^ Rs2_or_imm13;}}); 5323587Sgblack@eecs.umich.edu //0x07-0x0E should cause an illegal instruction exception 5333587Sgblack@eecs.umich.edu 0x0F: Trap::softreset({{fault = new SoftwareInitiatedReset;}}); 5343587Sgblack@eecs.umich.edu 0x10: Priv::wrpcr({{Pcr = Rs1 ^ Rs2_or_imm13;}}); 5353587Sgblack@eecs.umich.edu 0x11: PrivCheck::wrpic({{Pic = Rs1 ^ Rs2_or_imm13;}}, {{Pcr<0:>}}); 5363587Sgblack@eecs.umich.edu //0x12 should cause an illegal instruction exception 5373587Sgblack@eecs.umich.edu 0x13: NoPriv::wrgsr({{ 5383587Sgblack@eecs.umich.edu if(Fprs<2:> == 0 || Pstate<4:> == 0) 5393587Sgblack@eecs.umich.edu return new FpDisabled; 5403587Sgblack@eecs.umich.edu Gsr = Rs1 ^ Rs2_or_imm13; 5413587Sgblack@eecs.umich.edu }}); 5423587Sgblack@eecs.umich.edu 0x14: Priv::wrsoftint_set({{SoftintSet = Rs1 ^ Rs2_or_imm13;}}); 5433587Sgblack@eecs.umich.edu 0x15: Priv::wrsoftint_clr({{SoftintClr = Rs1 ^ Rs2_or_imm13;}}); 5443587Sgblack@eecs.umich.edu 0x16: Priv::wrsoftint({{Softint = Rs1 ^ Rs2_or_imm13;}}); 5453587Sgblack@eecs.umich.edu 0x17: Priv::wrtick_cmpr({{TickCmpr = Rs1 ^ Rs2_or_imm13;}}); 5463587Sgblack@eecs.umich.edu 0x18: NoPriv::wrstick({{ 5473587Sgblack@eecs.umich.edu if(!Hpstate<2:>) 5483587Sgblack@eecs.umich.edu return new IllegalInstruction; 5493587Sgblack@eecs.umich.edu Stick = Rs1 ^ Rs2_or_imm13; 5503587Sgblack@eecs.umich.edu }}); 5513587Sgblack@eecs.umich.edu 0x19: Priv::wrstick_cmpr({{StickCmpr = Rs1 ^ Rs2_or_imm13;}}); 5523598Sgblack@eecs.umich.edu 0x1A: Priv::wrstrand_sts_reg({{ 5533598Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 5543598Sgblack@eecs.umich.edu StrandStsReg = StrandStsReg<63:1> | 5553598Sgblack@eecs.umich.edu (Rs1 ^ Rs2_or_imm13)<0:>; 5563598Sgblack@eecs.umich.edu else 5573598Sgblack@eecs.umich.edu StrandStsReg = Rs1 ^ Rs2_or_imm13; 5583598Sgblack@eecs.umich.edu }}); 5593598Sgblack@eecs.umich.edu //0x1A is supposed to be reserved, but it writes the strand 5603598Sgblack@eecs.umich.edu //status register. 5613598Sgblack@eecs.umich.edu //0x1B-0x1F should cause an illegal instruction exception 5623587Sgblack@eecs.umich.edu } 5632526SN/A 0x31: decode FCN { 5643417Sgblack@eecs.umich.edu 0x0: Priv::saved({{ 5653417Sgblack@eecs.umich.edu assert(Cansave < NWindows - 2); 5663417Sgblack@eecs.umich.edu assert(Otherwin || Canrestore); 5673417Sgblack@eecs.umich.edu Cansave = Cansave + 1; 5683417Sgblack@eecs.umich.edu if(Otherwin == 0) 5693417Sgblack@eecs.umich.edu Canrestore = Canrestore - 1; 5703417Sgblack@eecs.umich.edu else 5713417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 5723417Sgblack@eecs.umich.edu }}); 5733598Sgblack@eecs.umich.edu 0x1: Priv::restored({{ 5743417Sgblack@eecs.umich.edu assert(Cansave || Otherwin); 5753417Sgblack@eecs.umich.edu assert(Canrestore < NWindows - 2); 5763417Sgblack@eecs.umich.edu Canrestore = Canrestore + 1; 5773417Sgblack@eecs.umich.edu if(Otherwin == 0) 5783417Sgblack@eecs.umich.edu Cansave = Cansave - 1; 5793417Sgblack@eecs.umich.edu else 5803417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 5813417Sgblack@eecs.umich.edu }}); 5822526SN/A } 5833587Sgblack@eecs.umich.edu 0x32: decode RD { 5843587Sgblack@eecs.umich.edu 0x00: Priv::wrprtpc({{ 5853587Sgblack@eecs.umich.edu if(Tl == 0) 5863587Sgblack@eecs.umich.edu return new IllegalInstruction; 5873587Sgblack@eecs.umich.edu else 5883587Sgblack@eecs.umich.edu Tpc = Rs1 ^ Rs2_or_imm13; 5893587Sgblack@eecs.umich.edu }}); 5903587Sgblack@eecs.umich.edu 0x01: Priv::wrprtnpc({{ 5913587Sgblack@eecs.umich.edu if(Tl == 0) 5923587Sgblack@eecs.umich.edu return new IllegalInstruction; 5933587Sgblack@eecs.umich.edu else 5943587Sgblack@eecs.umich.edu Tnpc = Rs1 ^ Rs2_or_imm13; 5953587Sgblack@eecs.umich.edu }}); 5963587Sgblack@eecs.umich.edu 0x02: Priv::wrprtstate({{ 5973587Sgblack@eecs.umich.edu if(Tl == 0) 5983587Sgblack@eecs.umich.edu return new IllegalInstruction; 5993587Sgblack@eecs.umich.edu else 6003587Sgblack@eecs.umich.edu Tstate = Rs1 ^ Rs2_or_imm13; 6013587Sgblack@eecs.umich.edu }}); 6023587Sgblack@eecs.umich.edu 0x03: Priv::wrprtt({{ 6033587Sgblack@eecs.umich.edu if(Tl == 0) 6043587Sgblack@eecs.umich.edu return new IllegalInstruction; 6053587Sgblack@eecs.umich.edu else 6063587Sgblack@eecs.umich.edu Tt = Rs1 ^ Rs2_or_imm13; 6073587Sgblack@eecs.umich.edu }}); 6083587Sgblack@eecs.umich.edu 0x04: HPriv::wrprtick({{Tick = Rs1 ^ Rs2_or_imm13;}}); 6093587Sgblack@eecs.umich.edu 0x05: Priv::wrprtba({{Tba = Rs1 ^ Rs2_or_imm13;}}); 6103587Sgblack@eecs.umich.edu 0x06: Priv::wrprpstate({{Pstate = Rs1 ^ Rs2_or_imm13;}}); 6113587Sgblack@eecs.umich.edu 0x07: Priv::wrprtl({{ 6123587Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 6133587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPTL); 6143587Sgblack@eecs.umich.edu else 6153587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxTL); 6163587Sgblack@eecs.umich.edu }}); 6173587Sgblack@eecs.umich.edu 0x08: Priv::wrprpil({{Pil = Rs1 ^ Rs2_or_imm13;}}); 6183587Sgblack@eecs.umich.edu 0x09: Priv::wrprcwp({{Cwp = Rs1 ^ Rs2_or_imm13;}}); 6193587Sgblack@eecs.umich.edu 0x0A: Priv::wrprcansave({{Cansave = Rs1 ^ Rs2_or_imm13;}}); 6203587Sgblack@eecs.umich.edu 0x0B: Priv::wrprcanrestore({{Canrestore = Rs1 ^ Rs2_or_imm13;}}); 6213587Sgblack@eecs.umich.edu 0x0C: Priv::wrprcleanwin({{Cleanwin = Rs1 ^ Rs2_or_imm13;}}); 6223587Sgblack@eecs.umich.edu 0x0D: Priv::wrprotherwin({{Otherwin = Rs1 ^ Rs2_or_imm13;}}); 6233587Sgblack@eecs.umich.edu 0x0E: Priv::wrprwstate({{Wstate = Rs1 ^ Rs2_or_imm13;}}); 6243587Sgblack@eecs.umich.edu //0x0F should cause an illegal instruction exception 6253587Sgblack@eecs.umich.edu 0x10: Priv::wrprgl({{ 6263587Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 6273587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPGL); 6283587Sgblack@eecs.umich.edu else 6293587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxGL); 6303587Sgblack@eecs.umich.edu }}); 6313587Sgblack@eecs.umich.edu //0x11-0x1F should cause an illegal instruction exception 6323587Sgblack@eecs.umich.edu } 6333587Sgblack@eecs.umich.edu 0x33: decode RD { 6343587Sgblack@eecs.umich.edu 0x00: HPriv::wrhprhpstate({{Hpstate = Rs1 ^ Rs2_or_imm13;}}); 6353587Sgblack@eecs.umich.edu 0x01: HPriv::wrhprhtstate({{ 6363587Sgblack@eecs.umich.edu if(Tl == 0) 6373587Sgblack@eecs.umich.edu return new IllegalInstruction; 6383587Sgblack@eecs.umich.edu Htstate = Rs1 ^ Rs2_or_imm13; 6393587Sgblack@eecs.umich.edu }}); 6403587Sgblack@eecs.umich.edu //0x02 should cause an illegal instruction exception 6413587Sgblack@eecs.umich.edu 0x03: HPriv::wrhprhintp({{Hintp = Rs1 ^ Rs2_or_imm13;}}); 6423587Sgblack@eecs.umich.edu //0x04 should cause an illegal instruction exception 6433587Sgblack@eecs.umich.edu 0x05: HPriv::wrhprhtba({{Htba = Rs1 ^ Rs2_or_imm13;}}); 6443587Sgblack@eecs.umich.edu //0x06-0x01D should cause an illegal instruction exception 6453587Sgblack@eecs.umich.edu 0x1F: HPriv::wrhprhstick_cmpr({{HstickCmpr = Rs1 ^ Rs2_or_imm13;}}); 6463587Sgblack@eecs.umich.edu } 6472954Sgblack@eecs.umich.edu 0x34: decode OPF{ 6482963Sgblack@eecs.umich.edu format BasicOperate{ 6492963Sgblack@eecs.umich.edu 0x01: fmovs({{ 6503279Sgblack@eecs.umich.edu Frds.uw = Frs2s.uw; 6512963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6522963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6532963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6542963Sgblack@eecs.umich.edu }}); 6552963Sgblack@eecs.umich.edu 0x02: fmovd({{ 6563057Sgblack@eecs.umich.edu Frd.udw = Frs2.udw; 6572963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6582963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6592963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6602963Sgblack@eecs.umich.edu }}); 6612963Sgblack@eecs.umich.edu 0x03: Trap::fmovq({{fault = new FpDisabled;}}); 6622963Sgblack@eecs.umich.edu 0x05: fnegs({{ 6633279Sgblack@eecs.umich.edu Frds.uw = Frs2s.uw ^ (1UL << 31); 6642963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6652963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6662963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6672963Sgblack@eecs.umich.edu }}); 6682963Sgblack@eecs.umich.edu 0x06: fnegd({{ 6693057Sgblack@eecs.umich.edu Frd.udw = Frs2.udw ^ (1ULL << 63); 6702963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6712963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6722963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6732963Sgblack@eecs.umich.edu }}); 6742963Sgblack@eecs.umich.edu 0x07: Trap::fnegq({{fault = new FpDisabled;}}); 6752963Sgblack@eecs.umich.edu 0x09: fabss({{ 6763279Sgblack@eecs.umich.edu Frds.uw = ((1UL << 31) - 1) & Frs2s.uw; 6772963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6782963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6792963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6802963Sgblack@eecs.umich.edu }}); 6812963Sgblack@eecs.umich.edu 0x0A: fabsd({{ 6823057Sgblack@eecs.umich.edu Frd.udw = ((1ULL << 63) - 1) & Frs2.udw; 6832963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6842963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6852963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6862963Sgblack@eecs.umich.edu }}); 6872963Sgblack@eecs.umich.edu 0x0B: Trap::fabsq({{fault = new FpDisabled;}}); 6883279Sgblack@eecs.umich.edu 0x29: fsqrts({{Frds.sf = sqrt(Frs2s.sf);}}); 6892963Sgblack@eecs.umich.edu 0x2A: fsqrtd({{Frd.df = sqrt(Frs2.df);}}); 6902963Sgblack@eecs.umich.edu 0x2B: Trap::fsqrtq({{fault = new FpDisabled;}}); 6913279Sgblack@eecs.umich.edu 0x41: fadds({{Frds.sf = Frs1s.sf + Frs2s.sf;}}); 6922963Sgblack@eecs.umich.edu 0x42: faddd({{Frd.df = Frs1.df + Frs2.df;}}); 6932963Sgblack@eecs.umich.edu 0x43: Trap::faddq({{fault = new FpDisabled;}}); 6943279Sgblack@eecs.umich.edu 0x45: fsubs({{Frds.sf = Frs1s.sf - Frs2s.sf;}}); 6952963Sgblack@eecs.umich.edu 0x46: fsubd({{Frd.df = Frs1.df - Frs2.df;}}); 6962963Sgblack@eecs.umich.edu 0x47: Trap::fsubq({{fault = new FpDisabled;}}); 6973279Sgblack@eecs.umich.edu 0x49: fmuls({{Frds.sf = Frs1s.sf * Frs2s.sf;}}); 6982963Sgblack@eecs.umich.edu 0x4A: fmuld({{Frd.df = Frs1.df * Frs2.df;}}); 6992963Sgblack@eecs.umich.edu 0x4B: Trap::fmulq({{fault = new FpDisabled;}}); 7003279Sgblack@eecs.umich.edu 0x4D: fdivs({{Frds.sf = Frs1s.sf / Frs2s.sf;}}); 7012963Sgblack@eecs.umich.edu 0x4E: fdivd({{Frd.df = Frs1.df / Frs2.df;}}); 7022963Sgblack@eecs.umich.edu 0x4F: Trap::fdivq({{fault = new FpDisabled;}}); 7033279Sgblack@eecs.umich.edu 0x69: fsmuld({{Frd.df = Frs1s.sf * Frs2s.sf;}}); 7042963Sgblack@eecs.umich.edu 0x6E: Trap::fdmulq({{fault = new FpDisabled;}}); 7052963Sgblack@eecs.umich.edu 0x81: fstox({{ 7063279Sgblack@eecs.umich.edu Frd.df = (double)static_cast<int64_t>(Frs2s.sf); 7072963Sgblack@eecs.umich.edu }}); 7082963Sgblack@eecs.umich.edu 0x82: fdtox({{ 7092963Sgblack@eecs.umich.edu Frd.df = (double)static_cast<int64_t>(Frs2.df); 7102963Sgblack@eecs.umich.edu }}); 7112963Sgblack@eecs.umich.edu 0x83: Trap::fqtox({{fault = new FpDisabled;}}); 7122963Sgblack@eecs.umich.edu 0x84: fxtos({{ 7133279Sgblack@eecs.umich.edu Frds.sf = static_cast<float>((int64_t)Frs2.df); 7142963Sgblack@eecs.umich.edu }}); 7152963Sgblack@eecs.umich.edu 0x88: fxtod({{ 7162963Sgblack@eecs.umich.edu Frd.df = static_cast<double>((int64_t)Frs2.df); 7172963Sgblack@eecs.umich.edu }}); 7182963Sgblack@eecs.umich.edu 0x8C: Trap::fxtoq({{fault = new FpDisabled;}}); 7192963Sgblack@eecs.umich.edu 0xC4: fitos({{ 7203279Sgblack@eecs.umich.edu Frds.sf = static_cast<float>((int32_t)Frs2s.sf); 7212963Sgblack@eecs.umich.edu }}); 7223279Sgblack@eecs.umich.edu 0xC6: fdtos({{Frds.sf = Frs2.df;}}); 7232963Sgblack@eecs.umich.edu 0xC7: Trap::fqtos({{fault = new FpDisabled;}}); 7242963Sgblack@eecs.umich.edu 0xC8: fitod({{ 7253279Sgblack@eecs.umich.edu Frd.df = static_cast<double>((int32_t)Frs2s.sf); 7262963Sgblack@eecs.umich.edu }}); 7273279Sgblack@eecs.umich.edu 0xC9: fstod({{Frd.df = Frs2s.sf;}}); 7282963Sgblack@eecs.umich.edu 0xCB: Trap::fqtod({{fault = new FpDisabled;}}); 7292963Sgblack@eecs.umich.edu 0xCC: Trap::fitoq({{fault = new FpDisabled;}}); 7302963Sgblack@eecs.umich.edu 0xCD: Trap::fstoq({{fault = new FpDisabled;}}); 7312963Sgblack@eecs.umich.edu 0xCE: Trap::fdtoq({{fault = new FpDisabled;}}); 7322963Sgblack@eecs.umich.edu 0xD1: fstoi({{ 7333279Sgblack@eecs.umich.edu Frds.sf = (float)static_cast<int32_t>(Frs2s.sf); 7342963Sgblack@eecs.umich.edu }}); 7352963Sgblack@eecs.umich.edu 0xD2: fdtoi({{ 7363279Sgblack@eecs.umich.edu Frds.sf = (float)static_cast<int32_t>(Frs2.df); 7372963Sgblack@eecs.umich.edu }}); 7382963Sgblack@eecs.umich.edu 0xD3: Trap::fqtoi({{fault = new FpDisabled;}}); 7392963Sgblack@eecs.umich.edu default: Trap::fpop1({{fault = new FpDisabled;}}); 7402963Sgblack@eecs.umich.edu } 7412954Sgblack@eecs.umich.edu } 7422526SN/A 0x35: Trap::fpop2({{fault = new FpDisabled;}}); 7432954Sgblack@eecs.umich.edu //This used to be just impdep1, but now it's a whole bunch 7442954Sgblack@eecs.umich.edu //of instructions 7452954Sgblack@eecs.umich.edu 0x36: decode OPF{ 7462954Sgblack@eecs.umich.edu 0x00: Trap::edge8({{fault = new IllegalInstruction;}}); 7472954Sgblack@eecs.umich.edu 0x01: Trap::edge8n({{fault = new IllegalInstruction;}}); 7482954Sgblack@eecs.umich.edu 0x02: Trap::edge8l({{fault = new IllegalInstruction;}}); 7492954Sgblack@eecs.umich.edu 0x03: Trap::edge8ln({{fault = new IllegalInstruction;}}); 7502954Sgblack@eecs.umich.edu 0x04: Trap::edge16({{fault = new IllegalInstruction;}}); 7512954Sgblack@eecs.umich.edu 0x05: Trap::edge16n({{fault = new IllegalInstruction;}}); 7522954Sgblack@eecs.umich.edu 0x06: Trap::edge16l({{fault = new IllegalInstruction;}}); 7532954Sgblack@eecs.umich.edu 0x07: Trap::edge16ln({{fault = new IllegalInstruction;}}); 7542954Sgblack@eecs.umich.edu 0x08: Trap::edge32({{fault = new IllegalInstruction;}}); 7552954Sgblack@eecs.umich.edu 0x09: Trap::edge32n({{fault = new IllegalInstruction;}}); 7562954Sgblack@eecs.umich.edu 0x0A: Trap::edge32l({{fault = new IllegalInstruction;}}); 7572954Sgblack@eecs.umich.edu 0x0B: Trap::edge32ln({{fault = new IllegalInstruction;}}); 7582954Sgblack@eecs.umich.edu 0x10: Trap::array8({{fault = new IllegalInstruction;}}); 7592954Sgblack@eecs.umich.edu 0x12: Trap::array16({{fault = new IllegalInstruction;}}); 7602954Sgblack@eecs.umich.edu 0x14: Trap::array32({{fault = new IllegalInstruction;}}); 7613042Sgblack@eecs.umich.edu 0x18: BasicOperate::alignaddr({{ 7622963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 7633042Sgblack@eecs.umich.edu Rd = sum & ~7; 7642963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | (sum & 7); 7652963Sgblack@eecs.umich.edu }}); 7662954Sgblack@eecs.umich.edu 0x19: Trap::bmask({{fault = new IllegalInstruction;}}); 7672963Sgblack@eecs.umich.edu 0x1A: BasicOperate::alignaddresslittle({{ 7682963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 7693042Sgblack@eecs.umich.edu Rd = sum & ~7; 7702963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | ((~sum + 1) & 7); 7712963Sgblack@eecs.umich.edu }}); 7722954Sgblack@eecs.umich.edu 0x20: Trap::fcmple16({{fault = new IllegalInstruction;}}); 7732954Sgblack@eecs.umich.edu 0x22: Trap::fcmpne16({{fault = new IllegalInstruction;}}); 7742954Sgblack@eecs.umich.edu 0x24: Trap::fcmple32({{fault = new IllegalInstruction;}}); 7752954Sgblack@eecs.umich.edu 0x26: Trap::fcmpne32({{fault = new IllegalInstruction;}}); 7762954Sgblack@eecs.umich.edu 0x28: Trap::fcmpgt16({{fault = new IllegalInstruction;}}); 7772954Sgblack@eecs.umich.edu 0x2A: Trap::fcmpeq16({{fault = new IllegalInstruction;}}); 7782954Sgblack@eecs.umich.edu 0x2C: Trap::fcmpgt32({{fault = new IllegalInstruction;}}); 7792954Sgblack@eecs.umich.edu 0x2E: Trap::fcmpeq32({{fault = new IllegalInstruction;}}); 7802954Sgblack@eecs.umich.edu 0x31: Trap::fmul8x16({{fault = new IllegalInstruction;}}); 7812954Sgblack@eecs.umich.edu 0x33: Trap::fmul8x16au({{fault = new IllegalInstruction;}}); 7822954Sgblack@eecs.umich.edu 0x35: Trap::fmul8x16al({{fault = new IllegalInstruction;}}); 7832954Sgblack@eecs.umich.edu 0x36: Trap::fmul8sux16({{fault = new IllegalInstruction;}}); 7842954Sgblack@eecs.umich.edu 0x37: Trap::fmul8ulx16({{fault = new IllegalInstruction;}}); 7852954Sgblack@eecs.umich.edu 0x38: Trap::fmuld8sux16({{fault = new IllegalInstruction;}}); 7862954Sgblack@eecs.umich.edu 0x39: Trap::fmuld8ulx16({{fault = new IllegalInstruction;}}); 7872954Sgblack@eecs.umich.edu 0x3A: Trap::fpack32({{fault = new IllegalInstruction;}}); 7882954Sgblack@eecs.umich.edu 0x3B: Trap::fpack16({{fault = new IllegalInstruction;}}); 7892954Sgblack@eecs.umich.edu 0x3D: Trap::fpackfix({{fault = new IllegalInstruction;}}); 7902954Sgblack@eecs.umich.edu 0x3E: Trap::pdist({{fault = new IllegalInstruction;}}); 7912963Sgblack@eecs.umich.edu 0x48: BasicOperate::faligndata({{ 7923057Sgblack@eecs.umich.edu uint64_t msbX = Frs1.udw; 7933057Sgblack@eecs.umich.edu uint64_t lsbX = Frs2.udw; 7943057Sgblack@eecs.umich.edu //Some special cases need to be split out, first 7953057Sgblack@eecs.umich.edu //because they're the most likely to be used, and 7963057Sgblack@eecs.umich.edu //second because otherwise, we end up shifting by 7973057Sgblack@eecs.umich.edu //greater than the width of the type being shifted, 7983057Sgblack@eecs.umich.edu //namely 64, which produces undefined results according 7993057Sgblack@eecs.umich.edu //to the C standard. 8003057Sgblack@eecs.umich.edu switch(Gsr<2:0>) 8013057Sgblack@eecs.umich.edu { 8023057Sgblack@eecs.umich.edu case 0: 8033057Sgblack@eecs.umich.edu Frd.udw = msbX; 8043057Sgblack@eecs.umich.edu break; 8053057Sgblack@eecs.umich.edu case 8: 8063057Sgblack@eecs.umich.edu Frd.udw = lsbX; 8073057Sgblack@eecs.umich.edu break; 8083057Sgblack@eecs.umich.edu default: 8093057Sgblack@eecs.umich.edu uint64_t msbShift = Gsr<2:0> * 8; 8103057Sgblack@eecs.umich.edu uint64_t lsbShift = (8 - Gsr<2:0>) * 8; 8113057Sgblack@eecs.umich.edu uint64_t msbMask = ((uint64_t)(-1)) >> msbShift; 8123057Sgblack@eecs.umich.edu uint64_t lsbMask = ((uint64_t)(-1)) << lsbShift; 8133057Sgblack@eecs.umich.edu Frd.udw = ((msbX & msbMask) << msbShift) | 8143057Sgblack@eecs.umich.edu ((lsbX & lsbMask) >> lsbShift); 8153057Sgblack@eecs.umich.edu } 8162963Sgblack@eecs.umich.edu }}); 8172954Sgblack@eecs.umich.edu 0x4B: Trap::fpmerge({{fault = new IllegalInstruction;}}); 8182954Sgblack@eecs.umich.edu 0x4C: Trap::bshuffle({{fault = new IllegalInstruction;}}); 8192954Sgblack@eecs.umich.edu 0x4D: Trap::fexpand({{fault = new IllegalInstruction;}}); 8202954Sgblack@eecs.umich.edu 0x50: Trap::fpadd16({{fault = new IllegalInstruction;}}); 8212954Sgblack@eecs.umich.edu 0x51: Trap::fpadd16s({{fault = new IllegalInstruction;}}); 8222954Sgblack@eecs.umich.edu 0x52: Trap::fpadd32({{fault = new IllegalInstruction;}}); 8232954Sgblack@eecs.umich.edu 0x53: Trap::fpadd32s({{fault = new IllegalInstruction;}}); 8242954Sgblack@eecs.umich.edu 0x54: Trap::fpsub16({{fault = new IllegalInstruction;}}); 8252954Sgblack@eecs.umich.edu 0x55: Trap::fpsub16s({{fault = new IllegalInstruction;}}); 8262954Sgblack@eecs.umich.edu 0x56: Trap::fpsub32({{fault = new IllegalInstruction;}}); 8272954Sgblack@eecs.umich.edu 0x57: Trap::fpsub32s({{fault = new IllegalInstruction;}}); 8282963Sgblack@eecs.umich.edu 0x60: BasicOperate::fzero({{Frd.df = 0;}}); 8293279Sgblack@eecs.umich.edu 0x61: BasicOperate::fzeros({{Frds.sf = 0;}}); 8302954Sgblack@eecs.umich.edu 0x62: Trap::fnor({{fault = new IllegalInstruction;}}); 8312954Sgblack@eecs.umich.edu 0x63: Trap::fnors({{fault = new IllegalInstruction;}}); 8322954Sgblack@eecs.umich.edu 0x64: Trap::fandnot2({{fault = new IllegalInstruction;}}); 8332954Sgblack@eecs.umich.edu 0x65: Trap::fandnot2s({{fault = new IllegalInstruction;}}); 8342963Sgblack@eecs.umich.edu 0x66: BasicOperate::fnot2({{ 8352963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs2.df)); 8362963Sgblack@eecs.umich.edu }}); 8372963Sgblack@eecs.umich.edu 0x67: BasicOperate::fnot2s({{ 8383279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs2s.sf)); 8392963Sgblack@eecs.umich.edu }}); 8402954Sgblack@eecs.umich.edu 0x68: Trap::fandnot1({{fault = new IllegalInstruction;}}); 8412954Sgblack@eecs.umich.edu 0x69: Trap::fandnot1s({{fault = new IllegalInstruction;}}); 8422963Sgblack@eecs.umich.edu 0x6A: BasicOperate::fnot1({{ 8432963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs1.df)); 8442963Sgblack@eecs.umich.edu }}); 8452963Sgblack@eecs.umich.edu 0x6B: BasicOperate::fnot1s({{ 8463279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs1s.sf)); 8472963Sgblack@eecs.umich.edu }}); 8482954Sgblack@eecs.umich.edu 0x6C: Trap::fxor({{fault = new IllegalInstruction;}}); 8492954Sgblack@eecs.umich.edu 0x6D: Trap::fxors({{fault = new IllegalInstruction;}}); 8502954Sgblack@eecs.umich.edu 0x6E: Trap::fnand({{fault = new IllegalInstruction;}}); 8512954Sgblack@eecs.umich.edu 0x6F: Trap::fnands({{fault = new IllegalInstruction;}}); 8522954Sgblack@eecs.umich.edu 0x70: Trap::fand({{fault = new IllegalInstruction;}}); 8532954Sgblack@eecs.umich.edu 0x71: Trap::fands({{fault = new IllegalInstruction;}}); 8542954Sgblack@eecs.umich.edu 0x72: Trap::fxnor({{fault = new IllegalInstruction;}}); 8552954Sgblack@eecs.umich.edu 0x73: Trap::fxnors({{fault = new IllegalInstruction;}}); 8563057Sgblack@eecs.umich.edu 0x74: BasicOperate::fsrc1({{Frd.udw = Frs1.udw;}}); 8573057Sgblack@eecs.umich.edu 0x75: BasicOperate::fsrc1s({{Frd.uw = Frs1.uw;}}); 8582954Sgblack@eecs.umich.edu 0x76: Trap::fornot2({{fault = new IllegalInstruction;}}); 8592954Sgblack@eecs.umich.edu 0x77: Trap::fornot2s({{fault = new IllegalInstruction;}}); 8603057Sgblack@eecs.umich.edu 0x78: BasicOperate::fsrc2({{Frd.udw = Frs2.udw;}}); 8613057Sgblack@eecs.umich.edu 0x79: BasicOperate::fsrc2s({{Frd.uw = Frs2.uw;}}); 8622954Sgblack@eecs.umich.edu 0x7A: Trap::fornot1({{fault = new IllegalInstruction;}}); 8632954Sgblack@eecs.umich.edu 0x7B: Trap::fornot1s({{fault = new IllegalInstruction;}}); 8642954Sgblack@eecs.umich.edu 0x7C: Trap::for({{fault = new IllegalInstruction;}}); 8652954Sgblack@eecs.umich.edu 0x7D: Trap::fors({{fault = new IllegalInstruction;}}); 8662954Sgblack@eecs.umich.edu 0x7E: Trap::fone({{fault = new IllegalInstruction;}}); 8672954Sgblack@eecs.umich.edu 0x7F: Trap::fones({{fault = new IllegalInstruction;}}); 8682954Sgblack@eecs.umich.edu 0x80: Trap::shutdown({{fault = new IllegalInstruction;}}); 8692954Sgblack@eecs.umich.edu 0x81: Trap::siam({{fault = new IllegalInstruction;}}); 8702954Sgblack@eecs.umich.edu } 8712954Sgblack@eecs.umich.edu 0x37: Trap::impdep2({{fault = new IllegalInstruction;}}); 8722526SN/A 0x38: Branch::jmpl({{ 8732526SN/A Addr target = Rs1 + Rs2_or_imm13; 8742526SN/A if(target & 0x3) 8752526SN/A fault = new MemAddressNotAligned; 8762526SN/A else 8772526SN/A { 8782526SN/A Rd = xc->readPC(); 8792526SN/A NNPC = target; 8802526SN/A } 8812526SN/A }}); 8822526SN/A 0x39: Branch::return({{ 8832561SN/A //If both MemAddressNotAligned and 8842561SN/A //a fill trap happen, it's not clear 8852561SN/A //which one should be returned. 8862526SN/A Addr target = Rs1 + Rs2_or_imm13; 8872526SN/A if(target & 0x3) 8882526SN/A fault = new MemAddressNotAligned; 8892526SN/A else 8902526SN/A NNPC = target; 8912561SN/A if(fault == NoFault) 8922561SN/A { 8932561SN/A if(Canrestore == 0) 8942561SN/A { 8952561SN/A if(Otherwin) 8962646Ssaidi@eecs.umich.edu fault = new FillNOther(Wstate<5:3>); 8972561SN/A else 8982646Ssaidi@eecs.umich.edu fault = new FillNNormal(Wstate<2:0>); 8992561SN/A } 9002561SN/A else 9012561SN/A { 9023417Sgblack@eecs.umich.edu //CWP should be set directly so that it always happens 9033417Sgblack@eecs.umich.edu //Also, this will allow writing to the new window and 9043417Sgblack@eecs.umich.edu //reading from the old one 9053417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 9062561SN/A Cansave = Cansave + 1; 9072561SN/A Canrestore = Canrestore - 1; 9083417Sgblack@eecs.umich.edu //This is here to make sure the CWP is written 9093417Sgblack@eecs.umich.edu //no matter what. This ensures that the results 9103417Sgblack@eecs.umich.edu //are written in the new window as well. 9113417Sgblack@eecs.umich.edu xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 9122561SN/A } 9132561SN/A } 9142526SN/A }}); 9152526SN/A 0x3A: decode CC 9162526SN/A { 9172526SN/A 0x0: Trap::tcci({{ 9182646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 9192561SN/A { 9203039Sstever@eecs.umich.edu#if FULL_SYSTEM 9212561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 9222561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 9233531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 9242526SN/A#else 9252561SN/A DPRINTF(Sparc, "The syscall number is %d\n", R1); 9262561SN/A xc->syscall(R1); 9272561SN/A#endif 9282561SN/A } 9292526SN/A }}); 9302526SN/A 0x2: Trap::tccx({{ 9312646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND2)) 9322561SN/A { 9333039Sstever@eecs.umich.edu#if FULL_SYSTEM 9342561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 9352561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 9363531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 9372526SN/A#else 9382561SN/A DPRINTF(Sparc, "The syscall number is %d\n", R1); 9392561SN/A xc->syscall(R1); 9402561SN/A#endif 9412526SN/A } 9422526SN/A }}); 9432526SN/A } 9442526SN/A 0x3B: Nop::flush({{/*Instruction memory flush*/}}); 9452526SN/A 0x3C: save({{ 9462526SN/A //CWP should be set directly so that it always happens 9472526SN/A //Also, this will allow writing to the new window and 9482526SN/A //reading from the old one 9492526SN/A if(Cansave == 0) 9502526SN/A { 9512526SN/A if(Otherwin) 9522646Ssaidi@eecs.umich.edu fault = new SpillNOther(Wstate<5:3>); 9532526SN/A else 9542646Ssaidi@eecs.umich.edu fault = new SpillNNormal(Wstate<2:0>); 9553417Sgblack@eecs.umich.edu //Cwp = (Cwp + 2) % NWindows; 9562526SN/A } 9572526SN/A else if(Cleanwin - Canrestore == 0) 9582526SN/A { 9593417Sgblack@eecs.umich.edu //Cwp = (Cwp + 1) % NWindows; 9602526SN/A fault = new CleanWindow; 9612526SN/A } 9622526SN/A else 9632526SN/A { 9642526SN/A Cwp = (Cwp + 1) % NWindows; 9652526SN/A Rd = Rs1 + Rs2_or_imm13; 9662561SN/A Cansave = Cansave - 1; 9672561SN/A Canrestore = Canrestore + 1; 9683417Sgblack@eecs.umich.edu //This is here to make sure the CWP is written 9693417Sgblack@eecs.umich.edu //no matter what. This ensures that the results 9703417Sgblack@eecs.umich.edu //are written in the new window as well. 9713417Sgblack@eecs.umich.edu xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 9722526SN/A } 9732526SN/A }}); 9742526SN/A 0x3D: restore({{ 9752526SN/A if(Canrestore == 0) 9762526SN/A { 9772526SN/A if(Otherwin) 9782646Ssaidi@eecs.umich.edu fault = new FillNOther(Wstate<5:3>); 9792526SN/A else 9802646Ssaidi@eecs.umich.edu fault = new FillNNormal(Wstate<2:0>); 9812526SN/A } 9822526SN/A else 9832526SN/A { 9843417Sgblack@eecs.umich.edu //CWP should be set directly so that it always happens 9853417Sgblack@eecs.umich.edu //Also, this will allow writing to the new window and 9863417Sgblack@eecs.umich.edu //reading from the old one 9873417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 9882526SN/A Rd = Rs1 + Rs2_or_imm13; 9892561SN/A Cansave = Cansave + 1; 9902561SN/A Canrestore = Canrestore - 1; 9913417Sgblack@eecs.umich.edu //This is here to make sure the CWP is written 9923417Sgblack@eecs.umich.edu //no matter what. This ensures that the results 9933417Sgblack@eecs.umich.edu //are written in the new window as well. 9943417Sgblack@eecs.umich.edu xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 9952526SN/A } 9962526SN/A }}); 9972526SN/A 0x3E: decode FCN { 9982526SN/A 0x0: Priv::done({{ 9992526SN/A if(Tl == 0) 10002526SN/A return new IllegalInstruction; 10012646Ssaidi@eecs.umich.edu 10022646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 10032646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 10042646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 10052646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 10062646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 10072646Ssaidi@eecs.umich.edu NPC = Tnpc; 10082646Ssaidi@eecs.umich.edu NNPC = Tnpc + 4; 10092526SN/A Tl = Tl - 1; 10102526SN/A }}); 10112938Sgblack@eecs.umich.edu 0x1: Priv::retry({{ 10122526SN/A if(Tl == 0) 10132526SN/A return new IllegalInstruction; 10142646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 10152646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 10162646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 10172646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 10182646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 10192646Ssaidi@eecs.umich.edu NPC = Tpc; 10203417Sgblack@eecs.umich.edu NNPC = Tnpc; 10212526SN/A Tl = Tl - 1; 10222526SN/A }}); 10232526SN/A } 10242526SN/A } 10252469SN/A } 10262469SN/A 0x3: decode OP3 { 10272526SN/A format Load { 10283272Sgblack@eecs.umich.edu 0x00: lduw({{Rd = Mem.uw;}}); 10293272Sgblack@eecs.umich.edu 0x01: ldub({{Rd = Mem.ub;}}); 10303272Sgblack@eecs.umich.edu 0x02: lduh({{Rd = Mem.uhw;}}); 10312526SN/A 0x03: ldd({{ 10323272Sgblack@eecs.umich.edu uint64_t val = Mem.udw; 10332526SN/A RdLow = val<31:0>; 10342526SN/A RdHigh = val<63:32>; 10353272Sgblack@eecs.umich.edu }}); 10362526SN/A } 10372526SN/A format Store { 10383272Sgblack@eecs.umich.edu 0x04: stw({{Mem.uw = Rd.sw;}}); 10393272Sgblack@eecs.umich.edu 0x05: stb({{Mem.ub = Rd.sb;}}); 10403272Sgblack@eecs.umich.edu 0x06: sth({{Mem.uhw = Rd.shw;}}); 10413272Sgblack@eecs.umich.edu 0x07: std({{Mem.udw = RdLow<31:0> | (RdHigh<31:0> << 32);}}); 10422526SN/A } 10432526SN/A format Load { 10443272Sgblack@eecs.umich.edu 0x08: ldsw({{Rd = (int32_t)Mem.sw;}}); 10453272Sgblack@eecs.umich.edu 0x09: ldsb({{Rd = (int8_t)Mem.sb;}}); 10463272Sgblack@eecs.umich.edu 0x0A: ldsh({{Rd = (int16_t)Mem.shw;}}); 10473272Sgblack@eecs.umich.edu 0x0B: ldx({{Rd = (int64_t)Mem.sdw;}}); 10482526SN/A } 10493438Sgblack@eecs.umich.edu 0x0D: LoadStore::ldstub( 10503438Sgblack@eecs.umich.edu {{Rd = Mem.ub;}}, 10513438Sgblack@eecs.umich.edu {{Mem.ub = 0xFF;}}); 10523272Sgblack@eecs.umich.edu 0x0E: Store::stx({{Mem.udw = Rd}}); 10533388Sgblack@eecs.umich.edu 0x0F: LoadStore::swap( 10543438Sgblack@eecs.umich.edu {{uReg0 = Rd.uw; 10553388Sgblack@eecs.umich.edu Rd.uw = Mem.uw;}}, 10563438Sgblack@eecs.umich.edu {{Mem.uw = uReg0;}}); 10573810Sgblack@eecs.umich.edu format LoadAlt { 10583810Sgblack@eecs.umich.edu 0x10: lduwa({{Rd = Mem.uw;}}, {{EXT_ASI}}); 10593810Sgblack@eecs.umich.edu 0x11: lduba({{Rd = Mem.ub;}}, {{EXT_ASI}}); 10603810Sgblack@eecs.umich.edu 0x12: lduha({{Rd = Mem.uhw;}}, {{EXT_ASI}}); 10612526SN/A 0x13: ldda({{ 10623272Sgblack@eecs.umich.edu uint64_t val = Mem.udw; 10632526SN/A RdLow = val<31:0>; 10642526SN/A RdHigh = val<63:32>; 10653810Sgblack@eecs.umich.edu }}, {{EXT_ASI}}); 10662526SN/A } 10673810Sgblack@eecs.umich.edu format StoreAlt { 10683810Sgblack@eecs.umich.edu 0x14: stwa({{Mem.uw = Rd;}}, {{EXT_ASI}}); 10693810Sgblack@eecs.umich.edu 0x15: stba({{Mem.ub = Rd;}}, {{EXT_ASI}}); 10703810Sgblack@eecs.umich.edu 0x16: stha({{Mem.uhw = Rd;}}, {{EXT_ASI}}); 10713810Sgblack@eecs.umich.edu 0x17: stda({{Mem.udw = RdLow<31:0> | RdHigh<31:0> << 32;}}, {{EXT_ASI}}); 10722526SN/A } 10733810Sgblack@eecs.umich.edu format LoadAlt { 10743810Sgblack@eecs.umich.edu 0x18: ldswa({{Rd = (int32_t)Mem.sw;}}, {{EXT_ASI}}); 10753810Sgblack@eecs.umich.edu 0x19: ldsba({{Rd = (int8_t)Mem.sb;}}, {{EXT_ASI}}); 10763810Sgblack@eecs.umich.edu 0x1A: ldsha({{Rd = (int16_t)Mem.shw;}}, {{EXT_ASI}}); 10773810Sgblack@eecs.umich.edu 0x1B: ldxa({{Rd = (int64_t)Mem.sdw;}}, {{EXT_ASI}}); 10782526SN/A } 10793810Sgblack@eecs.umich.edu 0x1D: LoadStoreAlt::ldstuba( 10803388Sgblack@eecs.umich.edu {{Rd = Mem.ub;}}, 10813810Sgblack@eecs.umich.edu {{Mem.ub = 0xFF}}, {{EXT_ASI}}); 10823810Sgblack@eecs.umich.edu 0x1E: StoreAlt::stxa({{Mem.udw = Rd}}, {{EXT_ASI}}); 10833810Sgblack@eecs.umich.edu 0x1F: LoadStoreAlt::swapa( 10843438Sgblack@eecs.umich.edu {{uReg0 = Rd.uw; 10853388Sgblack@eecs.umich.edu Rd.uw = Mem.uw;}}, 10863810Sgblack@eecs.umich.edu {{Mem.uw = uReg0;}}, {{EXT_ASI}}); 10872526SN/A format Trap { 10883272Sgblack@eecs.umich.edu 0x20: Load::ldf({{Frd.uw = Mem.uw;}}); 10892526SN/A 0x21: decode X { 10903272Sgblack@eecs.umich.edu 0x0: Load::ldfsr({{Fsr = Mem.uw | Fsr<63:32>;}}); 10913272Sgblack@eecs.umich.edu 0x1: Load::ldxfsr({{Fsr = Mem.udw;}}); 10922469SN/A } 10932526SN/A 0x22: ldqf({{fault = new FpDisabled;}}); 10943272Sgblack@eecs.umich.edu 0x23: Load::lddf({{Frd.udw = Mem.udw;}}); 10953272Sgblack@eecs.umich.edu 0x24: Store::stf({{Mem.uw = Frd.uw;}}); 10962526SN/A 0x25: decode X { 10973272Sgblack@eecs.umich.edu 0x0: Store::stfsr({{Mem.uw = Fsr<31:0>;}}); 10983272Sgblack@eecs.umich.edu 0x1: Store::stxfsr({{Mem.udw = Fsr;}}); 10992526SN/A } 11002526SN/A 0x26: stqf({{fault = new FpDisabled;}}); 11013272Sgblack@eecs.umich.edu 0x27: Store::stdf({{Mem.udw = Frd.udw;}}); 11022526SN/A 0x2D: Nop::prefetch({{ }}); 11033810Sgblack@eecs.umich.edu 0x30: LoadAlt::ldfa({{Frd.uw = Mem.uw;}}, {{EXT_ASI}}); 11042526SN/A 0x32: ldqfa({{fault = new FpDisabled;}}); 11053272Sgblack@eecs.umich.edu format LoadAlt { 11063272Sgblack@eecs.umich.edu 0x33: decode EXT_ASI { 11073272Sgblack@eecs.umich.edu //ASI_NUCLEUS 11083272Sgblack@eecs.umich.edu 0x04: FailUnimpl::lddfa_n(); 11093272Sgblack@eecs.umich.edu //ASI_NUCLEUS_LITTLE 11103272Sgblack@eecs.umich.edu 0x0C: FailUnimpl::lddfa_nl(); 11113272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY 11123272Sgblack@eecs.umich.edu 0x10: FailUnimpl::lddfa_aiup(); 11133272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY_LITTLE 11143272Sgblack@eecs.umich.edu 0x18: FailUnimpl::lddfa_aiupl(); 11153272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY 11163272Sgblack@eecs.umich.edu 0x11: FailUnimpl::lddfa_aius(); 11173272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY_LITTLE 11183272Sgblack@eecs.umich.edu 0x19: FailUnimpl::lddfa_aiusl(); 11193272Sgblack@eecs.umich.edu //ASI_REAL 11203272Sgblack@eecs.umich.edu 0x14: FailUnimpl::lddfa_real(); 11213272Sgblack@eecs.umich.edu //ASI_REAL_LITTLE 11223272Sgblack@eecs.umich.edu 0x1C: FailUnimpl::lddfa_real_l(); 11233272Sgblack@eecs.umich.edu //ASI_REAL_IO 11243272Sgblack@eecs.umich.edu 0x15: FailUnimpl::lddfa_real_io(); 11253272Sgblack@eecs.umich.edu //ASI_REAL_IO_LITTLE 11263272Sgblack@eecs.umich.edu 0x1D: FailUnimpl::lddfa_real_io_l(); 11273272Sgblack@eecs.umich.edu //ASI_PRIMARY 11283272Sgblack@eecs.umich.edu 0x80: FailUnimpl::lddfa_p(); 11293272Sgblack@eecs.umich.edu //ASI_PRIMARY_LITTLE 11303272Sgblack@eecs.umich.edu 0x88: FailUnimpl::lddfa_pl(); 11313272Sgblack@eecs.umich.edu //ASI_SECONDARY 11323272Sgblack@eecs.umich.edu 0x81: FailUnimpl::lddfa_s(); 11333272Sgblack@eecs.umich.edu //ASI_SECONDARY_LITTLE 11343272Sgblack@eecs.umich.edu 0x89: FailUnimpl::lddfa_sl(); 11353272Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT 11363272Sgblack@eecs.umich.edu 0x82: FailUnimpl::lddfa_pnf(); 11373272Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT_LITTLE 11383272Sgblack@eecs.umich.edu 0x8A: FailUnimpl::lddfa_pnfl(); 11393272Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT 11403272Sgblack@eecs.umich.edu 0x83: FailUnimpl::lddfa_snf(); 11413272Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT_LITTLE 11423272Sgblack@eecs.umich.edu 0x8B: FailUnimpl::lddfa_snfl(); 11433272Sgblack@eecs.umich.edu 11443272Sgblack@eecs.umich.edu format BlockLoad { 11453272Sgblack@eecs.umich.edu // LDBLOCKF 11463272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY 11473272Sgblack@eecs.umich.edu 0x16: FailUnimpl::ldblockf_aiup(); 11483272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY 11493272Sgblack@eecs.umich.edu 0x17: FailUnimpl::ldblockf_aius(); 11503272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 11513272Sgblack@eecs.umich.edu 0x1E: FailUnimpl::ldblockf_aiupl(); 11523272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 11533272Sgblack@eecs.umich.edu 0x1F: FailUnimpl::ldblockf_aiusl(); 11543272Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY 11553810Sgblack@eecs.umich.edu 0xF0: ldblockf_p({{Frd_N.udw = Mem.udw;}}, {{EXT_ASI}}); 11563272Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY 11573272Sgblack@eecs.umich.edu 0xF1: FailUnimpl::ldblockf_s(); 11583272Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY_LITTLE 11593272Sgblack@eecs.umich.edu 0xF8: FailUnimpl::ldblockf_pl(); 11603272Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY_LITTLE 11613272Sgblack@eecs.umich.edu 0xF9: FailUnimpl::ldblockf_sl(); 11623272Sgblack@eecs.umich.edu } 11633272Sgblack@eecs.umich.edu 11643272Sgblack@eecs.umich.edu //LDSHORTF 11653272Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY 11663272Sgblack@eecs.umich.edu 0xD0: FailUnimpl::ldshortf_8p(); 11673272Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY 11683272Sgblack@eecs.umich.edu 0xD1: FailUnimpl::ldshortf_8s(); 11693272Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY_LITTLE 11703272Sgblack@eecs.umich.edu 0xD8: FailUnimpl::ldshortf_8pl(); 11713272Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY_LITTLE 11723272Sgblack@eecs.umich.edu 0xD9: FailUnimpl::ldshortf_8sl(); 11733272Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY 11743272Sgblack@eecs.umich.edu 0xD2: FailUnimpl::ldshortf_16p(); 11753272Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY 11763272Sgblack@eecs.umich.edu 0xD3: FailUnimpl::ldshortf_16s(); 11773272Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY_LITTLE 11783272Sgblack@eecs.umich.edu 0xDA: FailUnimpl::ldshortf_16pl(); 11793272Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY_LITTLE 11803272Sgblack@eecs.umich.edu 0xDB: FailUnimpl::ldshortf_16sl(); 11813272Sgblack@eecs.umich.edu //Not an ASI which is legal with lddfa 11823378Sgblack@eecs.umich.edu default: Trap::lddfa_bad_asi( 11833378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 11843272Sgblack@eecs.umich.edu } 11853272Sgblack@eecs.umich.edu } 11863272Sgblack@eecs.umich.edu 0x34: Store::stfa({{Mem.uw = Frd.uw;}}); 11872954Sgblack@eecs.umich.edu 0x36: stqfa({{fault = new FpDisabled;}}); 11883378Sgblack@eecs.umich.edu format StoreAlt { 11893378Sgblack@eecs.umich.edu 0x37: decode EXT_ASI { 11903378Sgblack@eecs.umich.edu //ASI_NUCLEUS 11913378Sgblack@eecs.umich.edu 0x04: FailUnimpl::stdfa_n(); 11923378Sgblack@eecs.umich.edu //ASI_NUCLEUS_LITTLE 11933378Sgblack@eecs.umich.edu 0x0C: FailUnimpl::stdfa_nl(); 11943378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY 11953378Sgblack@eecs.umich.edu 0x10: FailUnimpl::stdfa_aiup(); 11963378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY_LITTLE 11973378Sgblack@eecs.umich.edu 0x18: FailUnimpl::stdfa_aiupl(); 11983378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY 11993378Sgblack@eecs.umich.edu 0x11: FailUnimpl::stdfa_aius(); 12003378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY_LITTLE 12013378Sgblack@eecs.umich.edu 0x19: FailUnimpl::stdfa_aiusl(); 12023378Sgblack@eecs.umich.edu //ASI_REAL 12033378Sgblack@eecs.umich.edu 0x14: FailUnimpl::stdfa_real(); 12043378Sgblack@eecs.umich.edu //ASI_REAL_LITTLE 12053378Sgblack@eecs.umich.edu 0x1C: FailUnimpl::stdfa_real_l(); 12063378Sgblack@eecs.umich.edu //ASI_REAL_IO 12073378Sgblack@eecs.umich.edu 0x15: FailUnimpl::stdfa_real_io(); 12083378Sgblack@eecs.umich.edu //ASI_REAL_IO_LITTLE 12093378Sgblack@eecs.umich.edu 0x1D: FailUnimpl::stdfa_real_io_l(); 12103378Sgblack@eecs.umich.edu //ASI_PRIMARY 12113378Sgblack@eecs.umich.edu 0x80: FailUnimpl::stdfa_p(); 12123378Sgblack@eecs.umich.edu //ASI_PRIMARY_LITTLE 12133378Sgblack@eecs.umich.edu 0x88: FailUnimpl::stdfa_pl(); 12143378Sgblack@eecs.umich.edu //ASI_SECONDARY 12153378Sgblack@eecs.umich.edu 0x81: FailUnimpl::stdfa_s(); 12163378Sgblack@eecs.umich.edu //ASI_SECONDARY_LITTLE 12173378Sgblack@eecs.umich.edu 0x89: FailUnimpl::stdfa_sl(); 12183378Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT 12193378Sgblack@eecs.umich.edu 0x82: FailUnimpl::stdfa_pnf(); 12203378Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT_LITTLE 12213378Sgblack@eecs.umich.edu 0x8A: FailUnimpl::stdfa_pnfl(); 12223378Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT 12233378Sgblack@eecs.umich.edu 0x83: FailUnimpl::stdfa_snf(); 12243378Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT_LITTLE 12253378Sgblack@eecs.umich.edu 0x8B: FailUnimpl::stdfa_snfl(); 12263378Sgblack@eecs.umich.edu 12273378Sgblack@eecs.umich.edu format BlockStore { 12283378Sgblack@eecs.umich.edu // STBLOCKF 12293378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY 12303378Sgblack@eecs.umich.edu 0x16: FailUnimpl::stblockf_aiup(); 12313378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY 12323378Sgblack@eecs.umich.edu 0x17: FailUnimpl::stblockf_aius(); 12333378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 12343378Sgblack@eecs.umich.edu 0x1E: FailUnimpl::stblockf_aiupl(); 12353378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 12363378Sgblack@eecs.umich.edu 0x1F: FailUnimpl::stblockf_aiusl(); 12373378Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY 12383810Sgblack@eecs.umich.edu 0xF0: stblockf_p({{Mem.udw = Frd_N.udw;}}, {{EXT_ASI}}); 12393378Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY 12403378Sgblack@eecs.umich.edu 0xF1: FailUnimpl::stblockf_s(); 12413378Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY_LITTLE 12423378Sgblack@eecs.umich.edu 0xF8: FailUnimpl::stblockf_pl(); 12433378Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY_LITTLE 12443378Sgblack@eecs.umich.edu 0xF9: FailUnimpl::stblockf_sl(); 12453378Sgblack@eecs.umich.edu } 12463378Sgblack@eecs.umich.edu 12473378Sgblack@eecs.umich.edu //STSHORTF 12483378Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY 12493378Sgblack@eecs.umich.edu 0xD0: FailUnimpl::stshortf_8p(); 12503378Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY 12513378Sgblack@eecs.umich.edu 0xD1: FailUnimpl::stshortf_8s(); 12523378Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY_LITTLE 12533378Sgblack@eecs.umich.edu 0xD8: FailUnimpl::stshortf_8pl(); 12543378Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY_LITTLE 12553378Sgblack@eecs.umich.edu 0xD9: FailUnimpl::stshortf_8sl(); 12563378Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY 12573378Sgblack@eecs.umich.edu 0xD2: FailUnimpl::stshortf_16p(); 12583378Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY 12593378Sgblack@eecs.umich.edu 0xD3: FailUnimpl::stshortf_16s(); 12603378Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY_LITTLE 12613378Sgblack@eecs.umich.edu 0xDA: FailUnimpl::stshortf_16pl(); 12623378Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY_LITTLE 12633378Sgblack@eecs.umich.edu 0xDB: FailUnimpl::stshortf_16sl(); 12643378Sgblack@eecs.umich.edu //Not an ASI which is legal with lddfa 12653378Sgblack@eecs.umich.edu default: Trap::stdfa_bad_asi( 12663378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 12673378Sgblack@eecs.umich.edu } 12683378Sgblack@eecs.umich.edu } 12693439Sgblack@eecs.umich.edu 0x3C: Cas::casa( 12703439Sgblack@eecs.umich.edu {{uReg0 = Mem.uw;}}, 12713439Sgblack@eecs.umich.edu {{if(Rs2.uw == uReg0) 12722526SN/A Mem.uw = Rd.uw; 12733439Sgblack@eecs.umich.edu else 12743439Sgblack@eecs.umich.edu storeCond = false; 12753810Sgblack@eecs.umich.edu Rd.uw = uReg0;}}, {{EXT_ASI}}); 12762526SN/A 0x3D: Nop::prefetcha({{ }}); 12773439Sgblack@eecs.umich.edu 0x3E: Cas::casxa( 12783439Sgblack@eecs.umich.edu {{uReg0 = Mem.udw;}}, 12793439Sgblack@eecs.umich.edu {{if(Rs2 == uReg0) 12802526SN/A Mem.udw = Rd; 12813439Sgblack@eecs.umich.edu else 12823439Sgblack@eecs.umich.edu storeCond = false; 12833810Sgblack@eecs.umich.edu Rd = uReg0;}}, {{EXT_ASI}}); 12842526SN/A } 12852469SN/A } 12862022SN/A} 1287