decoder.isa revision 3587
12632Sstever@eecs.umich.edu// Copyright (c) 2006 The Regents of The University of Michigan 22632Sstever@eecs.umich.edu// All rights reserved. 32632Sstever@eecs.umich.edu// 42632Sstever@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 52632Sstever@eecs.umich.edu// modification, are permitted provided that the following conditions are 62632Sstever@eecs.umich.edu// met: redistributions of source code must retain the above copyright 72632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 82632Sstever@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 92632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 102632Sstever@eecs.umich.edu// documentation and/or other materials provided with the distribution; 112632Sstever@eecs.umich.edu// neither the name of the copyright holders nor the names of its 122632Sstever@eecs.umich.edu// contributors may be used to endorse or promote products derived from 132632Sstever@eecs.umich.edu// this software without specific prior written permission. 142632Sstever@eecs.umich.edu// 152632Sstever@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 162632Sstever@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 172632Sstever@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 182632Sstever@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 192632Sstever@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 202632Sstever@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 212632Sstever@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 222632Sstever@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 232632Sstever@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 242632Sstever@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 252632Sstever@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 262632Sstever@eecs.umich.edu// 272632Sstever@eecs.umich.edu// Authors: Ali Saidi 282632Sstever@eecs.umich.edu// Gabe Black 292632Sstever@eecs.umich.edu// Steve Reinhardt 302632Sstever@eecs.umich.edu 312022SN/A//////////////////////////////////////////////////////////////////// 322022SN/A// 332022SN/A// The actual decoder specification 342022SN/A// 352022SN/A 362469SN/Adecode OP default Unknown::unknown() 372469SN/A{ 382469SN/A 0x0: decode OP2 392469SN/A { 402516SN/A //Throw an illegal instruction acception 412516SN/A 0x0: Trap::illtrap({{fault = new IllegalInstruction;}}); 422944Sgblack@eecs.umich.edu format BranchN 432482SN/A { 443056Sgblack@eecs.umich.edu 0x1: decode COND2 452469SN/A { 463056Sgblack@eecs.umich.edu //Branch Always 473056Sgblack@eecs.umich.edu 0x8: decode A 483056Sgblack@eecs.umich.edu { 493056Sgblack@eecs.umich.edu 0x0: b(19, {{ 502516SN/A NNPC = xc->readPC() + disp; 513056Sgblack@eecs.umich.edu }}); 523056Sgblack@eecs.umich.edu 0x1: b(19, {{ 533056Sgblack@eecs.umich.edu NPC = xc->readPC() + disp; 543056Sgblack@eecs.umich.edu NNPC = NPC + 4; 553056Sgblack@eecs.umich.edu }}, ',a'); 563056Sgblack@eecs.umich.edu } 573056Sgblack@eecs.umich.edu //Branch Never 583056Sgblack@eecs.umich.edu 0x0: decode A 593056Sgblack@eecs.umich.edu { 603056Sgblack@eecs.umich.edu 0x0: bn(19, {{ 613056Sgblack@eecs.umich.edu NNPC = NNPC;//Don't do anything 623056Sgblack@eecs.umich.edu }}); 633056Sgblack@eecs.umich.edu 0x1: bn(19, {{ 643056Sgblack@eecs.umich.edu NPC = xc->readNextPC() + 4; 653056Sgblack@eecs.umich.edu NNPC = NPC + 4; 663056Sgblack@eecs.umich.edu }}, ',a'); 673056Sgblack@eecs.umich.edu } 683056Sgblack@eecs.umich.edu default: decode BPCC 693056Sgblack@eecs.umich.edu { 703056Sgblack@eecs.umich.edu 0x0: bpcci(19, {{ 713056Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 723056Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 733056Sgblack@eecs.umich.edu else 743056Sgblack@eecs.umich.edu handle_annul 753056Sgblack@eecs.umich.edu }}); 763056Sgblack@eecs.umich.edu 0x2: bpccx(19, {{ 773056Sgblack@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND2)) 783056Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 793056Sgblack@eecs.umich.edu else 803056Sgblack@eecs.umich.edu handle_annul 813056Sgblack@eecs.umich.edu }}); 823056Sgblack@eecs.umich.edu } 832482SN/A } 842944Sgblack@eecs.umich.edu 0x2: bicc(22, {{ 852944Sgblack@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 862944Sgblack@eecs.umich.edu NNPC = xc->readPC() + disp; 872944Sgblack@eecs.umich.edu else 882944Sgblack@eecs.umich.edu handle_annul 892944Sgblack@eecs.umich.edu }}); 902516SN/A } 912516SN/A 0x3: decode RCOND2 922516SN/A { 932516SN/A format BranchSplit 942482SN/A { 952482SN/A 0x1: bpreq({{ 962591SN/A if(Rs1.sdw == 0) 972516SN/A NNPC = xc->readPC() + disp; 982580SN/A else 992580SN/A handle_annul 1002482SN/A }}); 1012482SN/A 0x2: bprle({{ 1022591SN/A if(Rs1.sdw <= 0) 1032516SN/A NNPC = xc->readPC() + disp; 1042580SN/A else 1052580SN/A handle_annul 1062482SN/A }}); 1072482SN/A 0x3: bprl({{ 1082591SN/A if(Rs1.sdw < 0) 1092516SN/A NNPC = xc->readPC() + disp; 1102580SN/A else 1112580SN/A handle_annul 1122482SN/A }}); 1132482SN/A 0x5: bprne({{ 1142591SN/A if(Rs1.sdw != 0) 1152516SN/A NNPC = xc->readPC() + disp; 1162580SN/A else 1172580SN/A handle_annul 1182482SN/A }}); 1192482SN/A 0x6: bprg({{ 1202591SN/A if(Rs1.sdw > 0) 1212516SN/A NNPC = xc->readPC() + disp; 1222580SN/A else 1232580SN/A handle_annul 1242482SN/A }}); 1252482SN/A 0x7: bprge({{ 1262591SN/A if(Rs1.sdw >= 0) 1272516SN/A NNPC = xc->readPC() + disp; 1282580SN/A else 1292580SN/A handle_annul 1302482SN/A }}); 1312469SN/A } 1322482SN/A } 1332516SN/A //SETHI (or NOP if rd == 0 and imm == 0) 1343042Sgblack@eecs.umich.edu 0x4: SetHi::sethi({{Rd.udw = imm;}}); 1352516SN/A 0x5: Trap::fbpfcc({{fault = new FpDisabled;}}); 1362516SN/A 0x6: Trap::fbfcc({{fault = new FpDisabled;}}); 1372469SN/A } 1382944Sgblack@eecs.umich.edu 0x1: BranchN::call(30, {{ 1392516SN/A R15 = xc->readPC(); 1402516SN/A NNPC = R15 + disp; 1412469SN/A }}); 1422469SN/A 0x2: decode OP3 { 1432482SN/A format IntOp { 1442482SN/A 0x00: add({{Rd = Rs1.sdw + Rs2_or_imm13;}}); 1452974Sgblack@eecs.umich.edu 0x01: and({{Rd = Rs1.sdw & Rs2_or_imm13;}}); 1462974Sgblack@eecs.umich.edu 0x02: or({{Rd = Rs1.sdw | Rs2_or_imm13;}}); 1472974Sgblack@eecs.umich.edu 0x03: xor({{Rd = Rs1.sdw ^ Rs2_or_imm13;}}); 1482526SN/A 0x04: sub({{Rd = Rs1.sdw - Rs2_or_imm13;}}); 1492974Sgblack@eecs.umich.edu 0x05: andn({{Rd = Rs1.sdw & ~Rs2_or_imm13;}}); 1502974Sgblack@eecs.umich.edu 0x06: orn({{Rd = Rs1.sdw | ~Rs2_or_imm13;}}); 1512974Sgblack@eecs.umich.edu 0x07: xnor({{Rd = ~(Rs1.sdw ^ Rs2_or_imm13);}}); 1522646Ssaidi@eecs.umich.edu 0x08: addc({{Rd = Rs1.sdw + Rs2_or_imm13 + Ccr<0:0>;}}); 1532974Sgblack@eecs.umich.edu 0x09: mulx({{Rd = Rs1.sdw * Rs2_or_imm13;}}); 1542469SN/A 0x0A: umul({{ 1552516SN/A Rd = Rs1.udw<31:0> * Rs2_or_imm13<31:0>; 1562646Ssaidi@eecs.umich.edu Y = Rd<63:32>; 1572482SN/A }}); 1582469SN/A 0x0B: smul({{ 1592516SN/A Rd.sdw = Rs1.sdw<31:0> * Rs2_or_imm13<31:0>; 1602646Ssaidi@eecs.umich.edu Y = Rd.sdw; 1612482SN/A }}); 1622954Sgblack@eecs.umich.edu 0x0C: subc({{Rd.sdw = Rs1.sdw + (~Rs2_or_imm13) + 1 - Ccr<0:0>}}); 1632469SN/A 0x0D: udivx({{ 1642516SN/A if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 1652516SN/A else Rd.udw = Rs1.udw / Rs2_or_imm13; 1662482SN/A }}); 1672469SN/A 0x0E: udiv({{ 1682516SN/A if(Rs2_or_imm13 == 0) fault = new DivisionByZero; 1692482SN/A else 1702482SN/A { 1712646Ssaidi@eecs.umich.edu Rd.udw = ((Y << 32) | Rs1.udw<31:0>) / Rs2_or_imm13; 1722482SN/A if(Rd.udw >> 32 != 0) 1732482SN/A Rd.udw = 0xFFFFFFFF; 1742482SN/A } 1752482SN/A }}); 1762482SN/A 0x0F: sdiv({{ 1772615SN/A if(Rs2_or_imm13.sdw == 0) 1782469SN/A fault = new DivisionByZero; 1792469SN/A else 1802482SN/A { 1812646Ssaidi@eecs.umich.edu Rd.udw = ((int64_t)((Y << 32) | Rs1.sdw<31:0>)) / Rs2_or_imm13.sdw; 1822482SN/A if(Rd.udw<63:31> != 0) 1832482SN/A Rd.udw = 0x7FFFFFFF; 1842482SN/A else if(Rd.udw<63:> && Rd.udw<62:31> != 0xFFFFFFFF) 1852588SN/A Rd.udw = 0xFFFFFFFF80000000ULL; 1862482SN/A } 1872526SN/A }}); 1882469SN/A } 1892482SN/A format IntOpCc { 1902469SN/A 0x10: addcc({{ 1912516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 1922469SN/A Rd = resTemp = Rs1 + val2;}}, 1932580SN/A {{(Rs1<31:0> + val2<31:0>)<32:>}}, 1942469SN/A {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 1952580SN/A {{(Rs1<63:1> + val2<63:1> + (Rs1 & val2)<0:>)<63:>}}, 1962469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 1972526SN/A ); 1982482SN/A 0x11: IntOpCcRes::andcc({{Rd = Rs1 & Rs2_or_imm13;}}); 1992482SN/A 0x12: IntOpCcRes::orcc({{Rd = Rs1 | Rs2_or_imm13;}}); 2002482SN/A 0x13: IntOpCcRes::xorcc({{Rd = Rs1 ^ Rs2_or_imm13;}}); 2012469SN/A 0x14: subcc({{ 2022580SN/A int64_t val2 = Rs2_or_imm13; 2032580SN/A Rd = Rs1 - val2;}}, 2042580SN/A {{(~(Rs1<31:0> + (~val2)<31:0> + 1))<32:>}}, 2052580SN/A {{(Rs1<31:> != val2<31:>) && (Rs1<31:> != Rd<31:>)}}, 2062580SN/A {{(~(Rs1<63:1> + (~val2)<63:1> + 2072580SN/A (Rs1 | ~val2)<0:>))<63:>}}, 2082580SN/A {{Rs1<63:> != val2<63:> && Rs1<63:> != Rd<63:>}} 2092526SN/A ); 2102482SN/A 0x15: IntOpCcRes::andncc({{Rd = Rs1 & ~Rs2_or_imm13;}}); 2112482SN/A 0x16: IntOpCcRes::orncc({{Rd = Rs1 | ~Rs2_or_imm13;}}); 2122482SN/A 0x17: IntOpCcRes::xnorcc({{Rd = ~(Rs1 ^ Rs2_or_imm13);}}); 2132469SN/A 0x18: addccc({{ 2142516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 2152646Ssaidi@eecs.umich.edu int64_t carryin = Ccr<0:0>; 2162469SN/A Rd = resTemp = Rs1 + val2 + carryin;}}, 2172580SN/A {{(Rs1<31:0> + val2<31:0> + carryin)<32:>}}, 2182469SN/A {{Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>}}, 2192580SN/A {{(Rs1<63:1> + val2<63:1> + 2202580SN/A ((Rs1 & val2) | (carryin & (Rs1 | val2)))<0:>)<63:>}}, 2212469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 2222526SN/A ); 2232469SN/A 0x1A: umulcc({{ 2242615SN/A uint64_t resTemp; 2252615SN/A Rd = resTemp = Rs1.udw<31:0> * Rs2_or_imm13.udw<31:0>; 2262646Ssaidi@eecs.umich.edu Y = resTemp<63:32>;}}, 2272526SN/A {{0}},{{0}},{{0}},{{0}}); 2282469SN/A 0x1B: smulcc({{ 2292615SN/A int64_t resTemp; 2302615SN/A Rd = resTemp = Rs1.sdw<31:0> * Rs2_or_imm13.sdw<31:0>; 2312646Ssaidi@eecs.umich.edu Y = resTemp<63:32>;}}, 2322526SN/A {{0}},{{0}},{{0}},{{0}}); 2332469SN/A 0x1C: subccc({{ 2342516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 2352646Ssaidi@eecs.umich.edu int64_t carryin = Ccr<0:0>; 2362954Sgblack@eecs.umich.edu Rd = resTemp = Rs1 + ~val2 + 1 - carryin;}}, 2372580SN/A {{(~((Rs1<31:0> + (~(val2 + carryin))<31:0> + 1))<32:>)}}, 2382469SN/A {{Rs1<31:> != val2<31:> && Rs1<31:> != resTemp<31:>}}, 2392580SN/A {{(~((Rs1<63:1> + (~(val2 + carryin))<63:1>) + (Rs1<0:> + (~(val2+carryin))<0:> + 1)<63:1>))<63:>}}, 2402469SN/A {{Rs1<63:> != val2<63:> && Rs1<63:> != resTemp<63:>}} 2412526SN/A ); 2422469SN/A 0x1D: udivxcc({{ 2432615SN/A if(Rs2_or_imm13.udw == 0) fault = new DivisionByZero; 2442615SN/A else Rd = Rs1.udw / Rs2_or_imm13.udw;}} 2452526SN/A ,{{0}},{{0}},{{0}},{{0}}); 2462469SN/A 0x1E: udivcc({{ 2472615SN/A uint32_t resTemp, val2 = Rs2_or_imm13.udw; 2482989Ssaidi@eecs.umich.edu int32_t overflow = 0; 2492469SN/A if(val2 == 0) fault = new DivisionByZero; 2502469SN/A else 2512224SN/A { 2522646Ssaidi@eecs.umich.edu resTemp = (uint64_t)((Y << 32) | Rs1.udw<31:0>) / val2; 2532516SN/A overflow = (resTemp<63:32> != 0); 2542516SN/A if(overflow) Rd = resTemp = 0xFFFFFFFF; 2552516SN/A else Rd = resTemp; 2562469SN/A } }}, 2572469SN/A {{0}}, 2582469SN/A {{overflow}}, 2592469SN/A {{0}}, 2602469SN/A {{0}} 2612526SN/A ); 2622469SN/A 0x1F: sdivcc({{ 2632996Sgblack@eecs.umich.edu int64_t val2 = Rs2_or_imm13.sdw<31:0>; 2642996Sgblack@eecs.umich.edu bool overflow = false, underflow = false; 2652469SN/A if(val2 == 0) fault = new DivisionByZero; 2662469SN/A else 2672469SN/A { 2682996Sgblack@eecs.umich.edu Rd = (int64_t)((Y << 32) | Rs1.sdw<31:0>) / val2; 2692996Sgblack@eecs.umich.edu overflow = (Rd<63:31> != 0); 2702996Sgblack@eecs.umich.edu underflow = (Rd<63:> && Rd<62:31> != 0xFFFFFFFF); 2712996Sgblack@eecs.umich.edu if(overflow) Rd = 0x7FFFFFFF; 2722996Sgblack@eecs.umich.edu else if(underflow) Rd = 0xFFFFFFFF80000000ULL; 2732469SN/A } }}, 2742469SN/A {{0}}, 2752469SN/A {{overflow || underflow}}, 2762469SN/A {{0}}, 2772469SN/A {{0}} 2782526SN/A ); 2792469SN/A 0x20: taddcc({{ 2802516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 2812469SN/A Rd = resTemp = Rs1 + val2; 2822469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}}, 2832469SN/A {{((Rs1 & 0xFFFFFFFF + val2 & 0xFFFFFFFF) >> 31)}}, 2842469SN/A {{overflow}}, 2852469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 2862469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 2872526SN/A ); 2882469SN/A 0x21: tsubcc({{ 2892516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 2902469SN/A Rd = resTemp = Rs1 + val2; 2912469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>);}}, 2922516SN/A {{(Rs1 & 0xFFFFFFFF + val2 & 0xFFFFFFFF) >> 31}}, 2932469SN/A {{overflow}}, 2942469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 2952469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 2962526SN/A ); 2972469SN/A 0x22: taddcctv({{ 2982996Sgblack@eecs.umich.edu int64_t val2 = Rs2_or_imm13; 2992996Sgblack@eecs.umich.edu Rd = Rs1 + val2; 3002954Sgblack@eecs.umich.edu int32_t overflow = Rs1<1:0> || val2<1:0> || 3012954Sgblack@eecs.umich.edu (Rs1<31:> == val2<31:> && val2<31:> != Rd<31:>); 3022469SN/A if(overflow) fault = new TagOverflow;}}, 3032469SN/A {{((Rs1 & 0xFFFFFFFF + val2 & 0xFFFFFFFF) >> 31)}}, 3042469SN/A {{overflow}}, 3052469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3062996Sgblack@eecs.umich.edu {{Rs1<63:> == val2<63:> && val2<63:> != Rd<63:>}} 3072526SN/A ); 3082469SN/A 0x23: tsubcctv({{ 3092516SN/A int64_t resTemp, val2 = Rs2_or_imm13; 3102469SN/A Rd = resTemp = Rs1 + val2; 3112469SN/A int32_t overflow = Rs1<1:0> || val2<1:0> || (Rs1<31:> == val2<31:> && val2<31:> != resTemp<31:>); 3122469SN/A if(overflow) fault = new TagOverflow;}}, 3132469SN/A {{((Rs1 & 0xFFFFFFFF + val2 & 0xFFFFFFFF) >> 31)}}, 3142469SN/A {{overflow}}, 3152469SN/A {{((Rs1 >> 1) + (val2 >> 1) + (Rs1 & val2 & 0x1))<63:>}}, 3162469SN/A {{Rs1<63:> == val2<63:> && val2<63:> != resTemp<63:>}} 3172526SN/A ); 3182469SN/A 0x24: mulscc({{ 3192516SN/A int64_t resTemp, multiplicand = Rs2_or_imm13; 3202469SN/A int32_t multiplier = Rs1<31:0>; 3212469SN/A int32_t savedLSB = Rs1<0:>; 3222516SN/A multiplier = multiplier<31:1> | 3232646Ssaidi@eecs.umich.edu ((Ccr<3:3> 3242646Ssaidi@eecs.umich.edu ^ Ccr<1:1>) << 32); 3252646Ssaidi@eecs.umich.edu if(!Y<0:>) 3262469SN/A multiplicand = 0; 3272469SN/A Rd = resTemp = multiplicand + multiplier; 3282646Ssaidi@eecs.umich.edu Y = Y<31:1> | (savedLSB << 31);}}, 3292469SN/A {{((multiplicand & 0xFFFFFFFF + multiplier & 0xFFFFFFFF) >> 31)}}, 3302469SN/A {{multiplicand<31:> == multiplier<31:> && multiplier<31:> != resTemp<31:>}}, 3312469SN/A {{((multiplicand >> 1) + (multiplier >> 1) + (multiplicand & multiplier & 0x1))<63:>}}, 3322469SN/A {{multiplicand<63:> == multiplier<63:> && multiplier<63:> != resTemp<63:>}} 3332526SN/A ); 3342526SN/A } 3352526SN/A format IntOp 3362526SN/A { 3372526SN/A 0x25: decode X { 3382526SN/A 0x0: sll({{Rd = Rs1 << (I ? SHCNT32 : Rs2<4:0>);}}); 3392526SN/A 0x1: sllx({{Rd = Rs1 << (I ? SHCNT64 : Rs2<5:0>);}}); 3402469SN/A } 3412526SN/A 0x26: decode X { 3422526SN/A 0x0: srl({{Rd = Rs1.uw >> (I ? SHCNT32 : Rs2<4:0>);}}); 3432526SN/A 0x1: srlx({{Rd = Rs1.udw >> (I ? SHCNT64 : Rs2<5:0>);}}); 3442526SN/A } 3452526SN/A 0x27: decode X { 3462526SN/A 0x0: sra({{Rd = Rs1.sw >> (I ? SHCNT32 : Rs2<4:0>);}}); 3472526SN/A 0x1: srax({{Rd = Rs1.sdw >> (I ? SHCNT64 : Rs2<5:0>);}}); 3482526SN/A } 3492954Sgblack@eecs.umich.edu 0x28: decode RS1 { 3503587Sgblack@eecs.umich.edu 0x00: NoPriv::rdy({{Rd = Y;}}); 3513587Sgblack@eecs.umich.edu //1 should cause an illegal instruction exception 3523587Sgblack@eecs.umich.edu 0x02: NoPriv::rdccr({{Rd = Ccr;}}); 3533587Sgblack@eecs.umich.edu 0x03: NoPriv::rdasi({{Rd = Asi;}}); 3543587Sgblack@eecs.umich.edu 0x04: PrivCheck::rdtick({{Rd = Tick;}}, {{Tick<63:>}}); 3553587Sgblack@eecs.umich.edu 0x05: NoPriv::rdpc({{ 3563587Sgblack@eecs.umich.edu if(Pstate<3:>) 3573587Sgblack@eecs.umich.edu Rd = (xc->readPC())<31:0>; 3583587Sgblack@eecs.umich.edu else 3593587Sgblack@eecs.umich.edu Rd = xc->readPC();}}); 3603587Sgblack@eecs.umich.edu 0x06: NoPriv::rdfprs({{ 3613587Sgblack@eecs.umich.edu //Wait for all fpops to finish. 3623587Sgblack@eecs.umich.edu Rd = Fprs; 3633587Sgblack@eecs.umich.edu }}); 3643587Sgblack@eecs.umich.edu //7-14 should cause an illegal instruction exception 3653587Sgblack@eecs.umich.edu 0x0F: decode I { 3662954Sgblack@eecs.umich.edu 0x0: Nop::stbar({{/*stuff*/}}); 3672954Sgblack@eecs.umich.edu 0x1: Nop::membar({{/*stuff*/}}); 3682954Sgblack@eecs.umich.edu } 3693587Sgblack@eecs.umich.edu 0x10: Priv::rdpcr({{Rd = Pcr;}}); 3703587Sgblack@eecs.umich.edu 0x11: PrivCheck::rdpic({{Rd = Pic;}}, {{Pcr<0:>}}); 3713587Sgblack@eecs.umich.edu //0x12 should cause an illegal instruction exception 3723587Sgblack@eecs.umich.edu 0x13: NoPriv::rdgsr({{ 3733587Sgblack@eecs.umich.edu if(Fprs<2:> == 0 || Pstate<4:> == 0) 3743587Sgblack@eecs.umich.edu Rd = Gsr; 3753587Sgblack@eecs.umich.edu else 3763587Sgblack@eecs.umich.edu fault = new FpDisabled; 3772954Sgblack@eecs.umich.edu }}); 3783587Sgblack@eecs.umich.edu //0x14-0x15 should cause an illegal instruction exception 3793587Sgblack@eecs.umich.edu 0x16: Priv::rdsoftint({{Rd = Softint;}}); 3803587Sgblack@eecs.umich.edu 0x17: Priv::rdtick_cmpr({{Rd = TickCmpr;}}); 3813587Sgblack@eecs.umich.edu 0x18: PrivCheck::rdstick({{Rd = Stick}}, {{Stick<63:>}}); 3823587Sgblack@eecs.umich.edu 0x19: Priv::rdstick_cmpr({{Rd = StickCmpr;}}); 3833587Sgblack@eecs.umich.edu //0x1A-0x1F should cause an illegal instruction exception 3842954Sgblack@eecs.umich.edu } 3853587Sgblack@eecs.umich.edu 0x29: decode RS1 { 3863587Sgblack@eecs.umich.edu 0x00: HPriv::rdhprhpstate({{Rd = Hpstate;}}); 3873587Sgblack@eecs.umich.edu 0x01: HPriv::rdhprhtstate({{ 3883587Sgblack@eecs.umich.edu if(Tl == 0) 3893587Sgblack@eecs.umich.edu return new IllegalInstruction; 3903587Sgblack@eecs.umich.edu Rd = Htstate; 3913587Sgblack@eecs.umich.edu }}); 3923587Sgblack@eecs.umich.edu //0x02 should cause an illegal instruction exception 3933587Sgblack@eecs.umich.edu 0x03: HPriv::rdhprhintp({{Rd = Hintp;}}); 3943587Sgblack@eecs.umich.edu //0x04 should cause an illegal instruction exception 3953587Sgblack@eecs.umich.edu 0x05: HPriv::rdhprhtba({{Rd = Htba;}}); 3963587Sgblack@eecs.umich.edu 0x06: HPriv::rdhprhver({{Rd = Hver;}}); 3973587Sgblack@eecs.umich.edu //0x07-0x1E should cause an illegal instruction exception 3983587Sgblack@eecs.umich.edu 0x1F: HPriv::rdhprhstick_cmpr({{Rd = HstickCmpr;}}); 3993587Sgblack@eecs.umich.edu } 4003587Sgblack@eecs.umich.edu 0x2A: decode RS1 { 4013587Sgblack@eecs.umich.edu 0x00: Priv::rdprtpc({{ 4023587Sgblack@eecs.umich.edu if(Tl == 0) 4033587Sgblack@eecs.umich.edu return new IllegalInstruction; 4043587Sgblack@eecs.umich.edu Rd = Tpc; 4053587Sgblack@eecs.umich.edu }}); 4063587Sgblack@eecs.umich.edu 0x01: Priv::rdprtnpc({{ 4073587Sgblack@eecs.umich.edu if(Tl == 0) 4083587Sgblack@eecs.umich.edu return new IllegalInstruction; 4093587Sgblack@eecs.umich.edu Rd = Tnpc; 4103587Sgblack@eecs.umich.edu }}); 4113587Sgblack@eecs.umich.edu 0x02: Priv::rdprtstate({{ 4123587Sgblack@eecs.umich.edu if(Tl == 0) 4133587Sgblack@eecs.umich.edu return new IllegalInstruction; 4143587Sgblack@eecs.umich.edu Rd = Tstate; 4153587Sgblack@eecs.umich.edu }}); 4163587Sgblack@eecs.umich.edu 0x03: Priv::rdprtt({{ 4173587Sgblack@eecs.umich.edu if(Tl == 0) 4183587Sgblack@eecs.umich.edu return new IllegalInstruction; 4193587Sgblack@eecs.umich.edu Rd = Tt; 4203587Sgblack@eecs.umich.edu }}); 4213587Sgblack@eecs.umich.edu 0x04: Priv::rdprtick({{Rd = Tick;}}); 4223587Sgblack@eecs.umich.edu 0x05: Priv::rdprtba({{Rd = Tba;}}); 4233587Sgblack@eecs.umich.edu 0x06: Priv::rdprpstate({{Rd = Pstate;}}); 4243587Sgblack@eecs.umich.edu 0x07: Priv::rdprtl({{Rd = Tl;}}); 4253587Sgblack@eecs.umich.edu 0x08: Priv::rdprpil({{Rd = Pil;}}); 4263587Sgblack@eecs.umich.edu 0x09: Priv::rdprcwp({{Rd = Cwp;}}); 4273587Sgblack@eecs.umich.edu 0x0A: Priv::rdprcansave({{Rd = Cansave;}}); 4283587Sgblack@eecs.umich.edu 0x0B: Priv::rdprcanrestore({{Rd = Canrestore;}}); 4293587Sgblack@eecs.umich.edu 0x0C: Priv::rdprcleanwin({{Rd = Cleanwin;}}); 4303587Sgblack@eecs.umich.edu 0x0D: Priv::rdprotherwin({{Rd = Otherwin;}}); 4313587Sgblack@eecs.umich.edu 0x0E: Priv::rdprwstate({{Rd = Wstate;}}); 4323587Sgblack@eecs.umich.edu //0x0F should cause an illegal instruction exception 4333587Sgblack@eecs.umich.edu 0x10: Priv::rdprgl({{Rd = Gl;}}); 4343587Sgblack@eecs.umich.edu //0x11-0x1F should cause an illegal instruction exception 4353587Sgblack@eecs.umich.edu } 4362526SN/A 0x2B: BasicOperate::flushw({{ 4372526SN/A if(NWindows - 2 - Cansave == 0) 4382526SN/A { 4392526SN/A if(Otherwin) 4402646Ssaidi@eecs.umich.edu fault = new SpillNOther(Wstate<5:3>); 4412526SN/A else 4422646Ssaidi@eecs.umich.edu fault = new SpillNNormal(Wstate<2:0>); 4432526SN/A } 4442526SN/A }}); 4452526SN/A 0x2C: decode MOVCC3 4462469SN/A { 4472526SN/A 0x0: Trap::movccfcc({{fault = new FpDisabled;}}); 4482526SN/A 0x1: decode CC 4492526SN/A { 4502526SN/A 0x0: movcci({{ 4512646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND4)) 4522591SN/A Rd = Rs2_or_imm11; 4532591SN/A else 4542591SN/A Rd = Rd; 4552526SN/A }}); 4562526SN/A 0x2: movccx({{ 4572646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND4)) 4582591SN/A Rd = Rs2_or_imm11; 4592591SN/A else 4602591SN/A Rd = Rd; 4612526SN/A }}); 4622224SN/A } 4632526SN/A } 4642526SN/A 0x2D: sdivx({{ 4652615SN/A if(Rs2_or_imm13.sdw == 0) fault = new DivisionByZero; 4662615SN/A else Rd.sdw = Rs1.sdw / Rs2_or_imm13.sdw; 4672526SN/A }}); 4682526SN/A 0x2E: decode RS1 { 4692526SN/A 0x0: IntOp::popc({{ 4702526SN/A int64_t count = 0; 4712526SN/A uint64_t temp = Rs2_or_imm13; 4722526SN/A //Count the 1s in the front 4bits until none are left 4732526SN/A uint8_t oneBits[] = {0,1,1,2,1,2,2,3,1,2,2,3,2,3,3,4}; 4742526SN/A while(temp) 4752469SN/A { 4762526SN/A count += oneBits[temp & 0xF]; 4772526SN/A temp = temp >> 4; 4782516SN/A } 4792591SN/A Rd = count; 4802516SN/A }}); 4812526SN/A } 4822526SN/A 0x2F: decode RCOND3 4832526SN/A { 4842615SN/A 0x1: movreq({{Rd = (Rs1.sdw == 0) ? Rs2_or_imm10 : Rd;}}); 4852615SN/A 0x2: movrle({{Rd = (Rs1.sdw <= 0) ? Rs2_or_imm10 : Rd;}}); 4862615SN/A 0x3: movrl({{Rd = (Rs1.sdw < 0) ? Rs2_or_imm10 : Rd;}}); 4872615SN/A 0x5: movrne({{Rd = (Rs1.sdw != 0) ? Rs2_or_imm10 : Rd;}}); 4882615SN/A 0x6: movrg({{Rd = (Rs1.sdw > 0) ? Rs2_or_imm10 : Rd;}}); 4892615SN/A 0x7: movrge({{Rd = (Rs1.sdw >= 0) ? Rs2_or_imm10 : Rd;}}); 4902526SN/A } 4913587Sgblack@eecs.umich.edu 0x30: decode RD { 4923587Sgblack@eecs.umich.edu 0x00: NoPriv::wry({{Y = Rs1 ^ Rs2_or_imm13;}}); 4933587Sgblack@eecs.umich.edu //0x01 should cause an illegal instruction exception 4943587Sgblack@eecs.umich.edu 0x02: NoPriv::wrccr({{Ccr = Rs1 ^ Rs2_or_imm13;}}); 4953587Sgblack@eecs.umich.edu 0x03: NoPriv::wrasi({{Ccr = Rs1 ^ Rs2_or_imm13;}}); 4963587Sgblack@eecs.umich.edu //0x04-0x05 should cause an illegal instruction exception 4973587Sgblack@eecs.umich.edu 0x06: NoPriv::wrfprs({{Fprs = Rs1 ^ Rs2_or_imm13;}}); 4983587Sgblack@eecs.umich.edu //0x07-0x0E should cause an illegal instruction exception 4993587Sgblack@eecs.umich.edu 0x0F: Trap::softreset({{fault = new SoftwareInitiatedReset;}}); 5003587Sgblack@eecs.umich.edu 0x10: Priv::wrpcr({{Pcr = Rs1 ^ Rs2_or_imm13;}}); 5013587Sgblack@eecs.umich.edu 0x11: PrivCheck::wrpic({{Pic = Rs1 ^ Rs2_or_imm13;}}, {{Pcr<0:>}}); 5023587Sgblack@eecs.umich.edu //0x12 should cause an illegal instruction exception 5033587Sgblack@eecs.umich.edu 0x13: NoPriv::wrgsr({{ 5043587Sgblack@eecs.umich.edu if(Fprs<2:> == 0 || Pstate<4:> == 0) 5053587Sgblack@eecs.umich.edu return new FpDisabled; 5063587Sgblack@eecs.umich.edu Gsr = Rs1 ^ Rs2_or_imm13; 5073587Sgblack@eecs.umich.edu }}); 5083587Sgblack@eecs.umich.edu 0x14: Priv::wrsoftint_set({{SoftintSet = Rs1 ^ Rs2_or_imm13;}}); 5093587Sgblack@eecs.umich.edu 0x15: Priv::wrsoftint_clr({{SoftintClr = Rs1 ^ Rs2_or_imm13;}}); 5103587Sgblack@eecs.umich.edu 0x16: Priv::wrsoftint({{Softint = Rs1 ^ Rs2_or_imm13;}}); 5113587Sgblack@eecs.umich.edu 0x17: Priv::wrtick_cmpr({{TickCmpr = Rs1 ^ Rs2_or_imm13;}}); 5123587Sgblack@eecs.umich.edu 0x18: NoPriv::wrstick({{ 5133587Sgblack@eecs.umich.edu if(!Hpstate<2:>) 5143587Sgblack@eecs.umich.edu return new IllegalInstruction; 5153587Sgblack@eecs.umich.edu Stick = Rs1 ^ Rs2_or_imm13; 5163587Sgblack@eecs.umich.edu }}); 5173587Sgblack@eecs.umich.edu 0x19: Priv::wrstick_cmpr({{StickCmpr = Rs1 ^ Rs2_or_imm13;}}); 5183587Sgblack@eecs.umich.edu //0x1A-0x1F should cause an illegal instruction exception 5193587Sgblack@eecs.umich.edu } 5202526SN/A 0x31: decode FCN { 5213417Sgblack@eecs.umich.edu 0x0: Priv::saved({{ 5223417Sgblack@eecs.umich.edu assert(Cansave < NWindows - 2); 5233417Sgblack@eecs.umich.edu assert(Otherwin || Canrestore); 5243417Sgblack@eecs.umich.edu Cansave = Cansave + 1; 5253417Sgblack@eecs.umich.edu if(Otherwin == 0) 5263417Sgblack@eecs.umich.edu Canrestore = Canrestore - 1; 5273417Sgblack@eecs.umich.edu else 5283417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 5293417Sgblack@eecs.umich.edu }}); 5303417Sgblack@eecs.umich.edu 0x1: BasicOperate::restored({{ 5313417Sgblack@eecs.umich.edu assert(Cansave || Otherwin); 5323417Sgblack@eecs.umich.edu assert(Canrestore < NWindows - 2); 5333417Sgblack@eecs.umich.edu Canrestore = Canrestore + 1; 5343417Sgblack@eecs.umich.edu if(Otherwin == 0) 5353417Sgblack@eecs.umich.edu Cansave = Cansave - 1; 5363417Sgblack@eecs.umich.edu else 5373417Sgblack@eecs.umich.edu Otherwin = Otherwin - 1; 5383417Sgblack@eecs.umich.edu }}); 5392526SN/A } 5403587Sgblack@eecs.umich.edu 0x32: decode RD { 5413587Sgblack@eecs.umich.edu 0x00: Priv::wrprtpc({{ 5423587Sgblack@eecs.umich.edu if(Tl == 0) 5433587Sgblack@eecs.umich.edu return new IllegalInstruction; 5443587Sgblack@eecs.umich.edu else 5453587Sgblack@eecs.umich.edu Tpc = Rs1 ^ Rs2_or_imm13; 5463587Sgblack@eecs.umich.edu }}); 5473587Sgblack@eecs.umich.edu 0x01: Priv::wrprtnpc({{ 5483587Sgblack@eecs.umich.edu if(Tl == 0) 5493587Sgblack@eecs.umich.edu return new IllegalInstruction; 5503587Sgblack@eecs.umich.edu else 5513587Sgblack@eecs.umich.edu Tnpc = Rs1 ^ Rs2_or_imm13; 5523587Sgblack@eecs.umich.edu }}); 5533587Sgblack@eecs.umich.edu 0x02: Priv::wrprtstate({{ 5543587Sgblack@eecs.umich.edu if(Tl == 0) 5553587Sgblack@eecs.umich.edu return new IllegalInstruction; 5563587Sgblack@eecs.umich.edu else 5573587Sgblack@eecs.umich.edu Tstate = Rs1 ^ Rs2_or_imm13; 5583587Sgblack@eecs.umich.edu }}); 5593587Sgblack@eecs.umich.edu 0x03: Priv::wrprtt({{ 5603587Sgblack@eecs.umich.edu if(Tl == 0) 5613587Sgblack@eecs.umich.edu return new IllegalInstruction; 5623587Sgblack@eecs.umich.edu else 5633587Sgblack@eecs.umich.edu Tt = Rs1 ^ Rs2_or_imm13; 5643587Sgblack@eecs.umich.edu }}); 5653587Sgblack@eecs.umich.edu 0x04: HPriv::wrprtick({{Tick = Rs1 ^ Rs2_or_imm13;}}); 5663587Sgblack@eecs.umich.edu 0x05: Priv::wrprtba({{Tba = Rs1 ^ Rs2_or_imm13;}}); 5673587Sgblack@eecs.umich.edu 0x06: Priv::wrprpstate({{Pstate = Rs1 ^ Rs2_or_imm13;}}); 5683587Sgblack@eecs.umich.edu 0x07: Priv::wrprtl({{ 5693587Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 5703587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPTL); 5713587Sgblack@eecs.umich.edu else 5723587Sgblack@eecs.umich.edu Tl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxTL); 5733587Sgblack@eecs.umich.edu }}); 5743587Sgblack@eecs.umich.edu 0x08: Priv::wrprpil({{Pil = Rs1 ^ Rs2_or_imm13;}}); 5753587Sgblack@eecs.umich.edu 0x09: Priv::wrprcwp({{Cwp = Rs1 ^ Rs2_or_imm13;}}); 5763587Sgblack@eecs.umich.edu 0x0A: Priv::wrprcansave({{Cansave = Rs1 ^ Rs2_or_imm13;}}); 5773587Sgblack@eecs.umich.edu 0x0B: Priv::wrprcanrestore({{Canrestore = Rs1 ^ Rs2_or_imm13;}}); 5783587Sgblack@eecs.umich.edu 0x0C: Priv::wrprcleanwin({{Cleanwin = Rs1 ^ Rs2_or_imm13;}}); 5793587Sgblack@eecs.umich.edu 0x0D: Priv::wrprotherwin({{Otherwin = Rs1 ^ Rs2_or_imm13;}}); 5803587Sgblack@eecs.umich.edu 0x0E: Priv::wrprwstate({{Wstate = Rs1 ^ Rs2_or_imm13;}}); 5813587Sgblack@eecs.umich.edu //0x0F should cause an illegal instruction exception 5823587Sgblack@eecs.umich.edu 0x10: Priv::wrprgl({{ 5833587Sgblack@eecs.umich.edu if(Pstate<2:> && !Hpstate<2:>) 5843587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxPGL); 5853587Sgblack@eecs.umich.edu else 5863587Sgblack@eecs.umich.edu Gl = std::min<uint64_t>(Rs1 ^ Rs2_or_imm13, MaxGL); 5873587Sgblack@eecs.umich.edu }}); 5883587Sgblack@eecs.umich.edu //0x11-0x1F should cause an illegal instruction exception 5893587Sgblack@eecs.umich.edu } 5903587Sgblack@eecs.umich.edu 0x33: decode RD { 5913587Sgblack@eecs.umich.edu 0x00: HPriv::wrhprhpstate({{Hpstate = Rs1 ^ Rs2_or_imm13;}}); 5923587Sgblack@eecs.umich.edu 0x01: HPriv::wrhprhtstate({{ 5933587Sgblack@eecs.umich.edu if(Tl == 0) 5943587Sgblack@eecs.umich.edu return new IllegalInstruction; 5953587Sgblack@eecs.umich.edu Htstate = Rs1 ^ Rs2_or_imm13; 5963587Sgblack@eecs.umich.edu }}); 5973587Sgblack@eecs.umich.edu //0x02 should cause an illegal instruction exception 5983587Sgblack@eecs.umich.edu 0x03: HPriv::wrhprhintp({{Hintp = Rs1 ^ Rs2_or_imm13;}}); 5993587Sgblack@eecs.umich.edu //0x04 should cause an illegal instruction exception 6003587Sgblack@eecs.umich.edu 0x05: HPriv::wrhprhtba({{Htba = Rs1 ^ Rs2_or_imm13;}}); 6013587Sgblack@eecs.umich.edu //0x06-0x01D should cause an illegal instruction exception 6023587Sgblack@eecs.umich.edu 0x1F: HPriv::wrhprhstick_cmpr({{HstickCmpr = Rs1 ^ Rs2_or_imm13;}}); 6033587Sgblack@eecs.umich.edu } 6042954Sgblack@eecs.umich.edu 0x34: decode OPF{ 6052963Sgblack@eecs.umich.edu format BasicOperate{ 6062963Sgblack@eecs.umich.edu 0x01: fmovs({{ 6073279Sgblack@eecs.umich.edu Frds.uw = Frs2s.uw; 6082963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6092963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6102963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6112963Sgblack@eecs.umich.edu }}); 6122963Sgblack@eecs.umich.edu 0x02: fmovd({{ 6133057Sgblack@eecs.umich.edu Frd.udw = Frs2.udw; 6142963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6152963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6162963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6172963Sgblack@eecs.umich.edu }}); 6182963Sgblack@eecs.umich.edu 0x03: Trap::fmovq({{fault = new FpDisabled;}}); 6192963Sgblack@eecs.umich.edu 0x05: fnegs({{ 6203279Sgblack@eecs.umich.edu Frds.uw = Frs2s.uw ^ (1UL << 31); 6212963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6222963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6232963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6242963Sgblack@eecs.umich.edu }}); 6252963Sgblack@eecs.umich.edu 0x06: fnegd({{ 6263057Sgblack@eecs.umich.edu Frd.udw = Frs2.udw ^ (1ULL << 63); 6272963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6282963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6292963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6302963Sgblack@eecs.umich.edu }}); 6312963Sgblack@eecs.umich.edu 0x07: Trap::fnegq({{fault = new FpDisabled;}}); 6322963Sgblack@eecs.umich.edu 0x09: fabss({{ 6333279Sgblack@eecs.umich.edu Frds.uw = ((1UL << 31) - 1) & Frs2s.uw; 6342963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6352963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6362963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6372963Sgblack@eecs.umich.edu }}); 6382963Sgblack@eecs.umich.edu 0x0A: fabsd({{ 6393057Sgblack@eecs.umich.edu Frd.udw = ((1ULL << 63) - 1) & Frs2.udw; 6402963Sgblack@eecs.umich.edu //fsr.ftt = fsr.cexc = 0 6412963Sgblack@eecs.umich.edu Fsr &= ~(7 << 14); 6422963Sgblack@eecs.umich.edu Fsr &= ~(0x1F); 6432963Sgblack@eecs.umich.edu }}); 6442963Sgblack@eecs.umich.edu 0x0B: Trap::fabsq({{fault = new FpDisabled;}}); 6453279Sgblack@eecs.umich.edu 0x29: fsqrts({{Frds.sf = sqrt(Frs2s.sf);}}); 6462963Sgblack@eecs.umich.edu 0x2A: fsqrtd({{Frd.df = sqrt(Frs2.df);}}); 6472963Sgblack@eecs.umich.edu 0x2B: Trap::fsqrtq({{fault = new FpDisabled;}}); 6483279Sgblack@eecs.umich.edu 0x41: fadds({{Frds.sf = Frs1s.sf + Frs2s.sf;}}); 6492963Sgblack@eecs.umich.edu 0x42: faddd({{Frd.df = Frs1.df + Frs2.df;}}); 6502963Sgblack@eecs.umich.edu 0x43: Trap::faddq({{fault = new FpDisabled;}}); 6513279Sgblack@eecs.umich.edu 0x45: fsubs({{Frds.sf = Frs1s.sf - Frs2s.sf;}}); 6522963Sgblack@eecs.umich.edu 0x46: fsubd({{Frd.df = Frs1.df - Frs2.df;}}); 6532963Sgblack@eecs.umich.edu 0x47: Trap::fsubq({{fault = new FpDisabled;}}); 6543279Sgblack@eecs.umich.edu 0x49: fmuls({{Frds.sf = Frs1s.sf * Frs2s.sf;}}); 6552963Sgblack@eecs.umich.edu 0x4A: fmuld({{Frd.df = Frs1.df * Frs2.df;}}); 6562963Sgblack@eecs.umich.edu 0x4B: Trap::fmulq({{fault = new FpDisabled;}}); 6573279Sgblack@eecs.umich.edu 0x4D: fdivs({{Frds.sf = Frs1s.sf / Frs2s.sf;}}); 6582963Sgblack@eecs.umich.edu 0x4E: fdivd({{Frd.df = Frs1.df / Frs2.df;}}); 6592963Sgblack@eecs.umich.edu 0x4F: Trap::fdivq({{fault = new FpDisabled;}}); 6603279Sgblack@eecs.umich.edu 0x69: fsmuld({{Frd.df = Frs1s.sf * Frs2s.sf;}}); 6612963Sgblack@eecs.umich.edu 0x6E: Trap::fdmulq({{fault = new FpDisabled;}}); 6622963Sgblack@eecs.umich.edu 0x81: fstox({{ 6633279Sgblack@eecs.umich.edu Frd.df = (double)static_cast<int64_t>(Frs2s.sf); 6642963Sgblack@eecs.umich.edu }}); 6652963Sgblack@eecs.umich.edu 0x82: fdtox({{ 6662963Sgblack@eecs.umich.edu Frd.df = (double)static_cast<int64_t>(Frs2.df); 6672963Sgblack@eecs.umich.edu }}); 6682963Sgblack@eecs.umich.edu 0x83: Trap::fqtox({{fault = new FpDisabled;}}); 6692963Sgblack@eecs.umich.edu 0x84: fxtos({{ 6703279Sgblack@eecs.umich.edu Frds.sf = static_cast<float>((int64_t)Frs2.df); 6712963Sgblack@eecs.umich.edu }}); 6722963Sgblack@eecs.umich.edu 0x88: fxtod({{ 6732963Sgblack@eecs.umich.edu Frd.df = static_cast<double>((int64_t)Frs2.df); 6742963Sgblack@eecs.umich.edu }}); 6752963Sgblack@eecs.umich.edu 0x8C: Trap::fxtoq({{fault = new FpDisabled;}}); 6762963Sgblack@eecs.umich.edu 0xC4: fitos({{ 6773279Sgblack@eecs.umich.edu Frds.sf = static_cast<float>((int32_t)Frs2s.sf); 6782963Sgblack@eecs.umich.edu }}); 6793279Sgblack@eecs.umich.edu 0xC6: fdtos({{Frds.sf = Frs2.df;}}); 6802963Sgblack@eecs.umich.edu 0xC7: Trap::fqtos({{fault = new FpDisabled;}}); 6812963Sgblack@eecs.umich.edu 0xC8: fitod({{ 6823279Sgblack@eecs.umich.edu Frd.df = static_cast<double>((int32_t)Frs2s.sf); 6832963Sgblack@eecs.umich.edu }}); 6843279Sgblack@eecs.umich.edu 0xC9: fstod({{Frd.df = Frs2s.sf;}}); 6852963Sgblack@eecs.umich.edu 0xCB: Trap::fqtod({{fault = new FpDisabled;}}); 6862963Sgblack@eecs.umich.edu 0xCC: Trap::fitoq({{fault = new FpDisabled;}}); 6872963Sgblack@eecs.umich.edu 0xCD: Trap::fstoq({{fault = new FpDisabled;}}); 6882963Sgblack@eecs.umich.edu 0xCE: Trap::fdtoq({{fault = new FpDisabled;}}); 6892963Sgblack@eecs.umich.edu 0xD1: fstoi({{ 6903279Sgblack@eecs.umich.edu Frds.sf = (float)static_cast<int32_t>(Frs2s.sf); 6912963Sgblack@eecs.umich.edu }}); 6922963Sgblack@eecs.umich.edu 0xD2: fdtoi({{ 6933279Sgblack@eecs.umich.edu Frds.sf = (float)static_cast<int32_t>(Frs2.df); 6942963Sgblack@eecs.umich.edu }}); 6952963Sgblack@eecs.umich.edu 0xD3: Trap::fqtoi({{fault = new FpDisabled;}}); 6962963Sgblack@eecs.umich.edu default: Trap::fpop1({{fault = new FpDisabled;}}); 6972963Sgblack@eecs.umich.edu } 6982954Sgblack@eecs.umich.edu } 6992526SN/A 0x35: Trap::fpop2({{fault = new FpDisabled;}}); 7002954Sgblack@eecs.umich.edu //This used to be just impdep1, but now it's a whole bunch 7012954Sgblack@eecs.umich.edu //of instructions 7022954Sgblack@eecs.umich.edu 0x36: decode OPF{ 7032954Sgblack@eecs.umich.edu 0x00: Trap::edge8({{fault = new IllegalInstruction;}}); 7042954Sgblack@eecs.umich.edu 0x01: Trap::edge8n({{fault = new IllegalInstruction;}}); 7052954Sgblack@eecs.umich.edu 0x02: Trap::edge8l({{fault = new IllegalInstruction;}}); 7062954Sgblack@eecs.umich.edu 0x03: Trap::edge8ln({{fault = new IllegalInstruction;}}); 7072954Sgblack@eecs.umich.edu 0x04: Trap::edge16({{fault = new IllegalInstruction;}}); 7082954Sgblack@eecs.umich.edu 0x05: Trap::edge16n({{fault = new IllegalInstruction;}}); 7092954Sgblack@eecs.umich.edu 0x06: Trap::edge16l({{fault = new IllegalInstruction;}}); 7102954Sgblack@eecs.umich.edu 0x07: Trap::edge16ln({{fault = new IllegalInstruction;}}); 7112954Sgblack@eecs.umich.edu 0x08: Trap::edge32({{fault = new IllegalInstruction;}}); 7122954Sgblack@eecs.umich.edu 0x09: Trap::edge32n({{fault = new IllegalInstruction;}}); 7132954Sgblack@eecs.umich.edu 0x0A: Trap::edge32l({{fault = new IllegalInstruction;}}); 7142954Sgblack@eecs.umich.edu 0x0B: Trap::edge32ln({{fault = new IllegalInstruction;}}); 7152954Sgblack@eecs.umich.edu 0x10: Trap::array8({{fault = new IllegalInstruction;}}); 7162954Sgblack@eecs.umich.edu 0x12: Trap::array16({{fault = new IllegalInstruction;}}); 7172954Sgblack@eecs.umich.edu 0x14: Trap::array32({{fault = new IllegalInstruction;}}); 7183042Sgblack@eecs.umich.edu 0x18: BasicOperate::alignaddr({{ 7192963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 7203042Sgblack@eecs.umich.edu Rd = sum & ~7; 7212963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | (sum & 7); 7222963Sgblack@eecs.umich.edu }}); 7232954Sgblack@eecs.umich.edu 0x19: Trap::bmask({{fault = new IllegalInstruction;}}); 7242963Sgblack@eecs.umich.edu 0x1A: BasicOperate::alignaddresslittle({{ 7252963Sgblack@eecs.umich.edu uint64_t sum = Rs1 + Rs2; 7263042Sgblack@eecs.umich.edu Rd = sum & ~7; 7272963Sgblack@eecs.umich.edu Gsr = (Gsr & ~7) | ((~sum + 1) & 7); 7282963Sgblack@eecs.umich.edu }}); 7292954Sgblack@eecs.umich.edu 0x20: Trap::fcmple16({{fault = new IllegalInstruction;}}); 7302954Sgblack@eecs.umich.edu 0x22: Trap::fcmpne16({{fault = new IllegalInstruction;}}); 7312954Sgblack@eecs.umich.edu 0x24: Trap::fcmple32({{fault = new IllegalInstruction;}}); 7322954Sgblack@eecs.umich.edu 0x26: Trap::fcmpne32({{fault = new IllegalInstruction;}}); 7332954Sgblack@eecs.umich.edu 0x28: Trap::fcmpgt16({{fault = new IllegalInstruction;}}); 7342954Sgblack@eecs.umich.edu 0x2A: Trap::fcmpeq16({{fault = new IllegalInstruction;}}); 7352954Sgblack@eecs.umich.edu 0x2C: Trap::fcmpgt32({{fault = new IllegalInstruction;}}); 7362954Sgblack@eecs.umich.edu 0x2E: Trap::fcmpeq32({{fault = new IllegalInstruction;}}); 7372954Sgblack@eecs.umich.edu 0x31: Trap::fmul8x16({{fault = new IllegalInstruction;}}); 7382954Sgblack@eecs.umich.edu 0x33: Trap::fmul8x16au({{fault = new IllegalInstruction;}}); 7392954Sgblack@eecs.umich.edu 0x35: Trap::fmul8x16al({{fault = new IllegalInstruction;}}); 7402954Sgblack@eecs.umich.edu 0x36: Trap::fmul8sux16({{fault = new IllegalInstruction;}}); 7412954Sgblack@eecs.umich.edu 0x37: Trap::fmul8ulx16({{fault = new IllegalInstruction;}}); 7422954Sgblack@eecs.umich.edu 0x38: Trap::fmuld8sux16({{fault = new IllegalInstruction;}}); 7432954Sgblack@eecs.umich.edu 0x39: Trap::fmuld8ulx16({{fault = new IllegalInstruction;}}); 7442954Sgblack@eecs.umich.edu 0x3A: Trap::fpack32({{fault = new IllegalInstruction;}}); 7452954Sgblack@eecs.umich.edu 0x3B: Trap::fpack16({{fault = new IllegalInstruction;}}); 7462954Sgblack@eecs.umich.edu 0x3D: Trap::fpackfix({{fault = new IllegalInstruction;}}); 7472954Sgblack@eecs.umich.edu 0x3E: Trap::pdist({{fault = new IllegalInstruction;}}); 7482963Sgblack@eecs.umich.edu 0x48: BasicOperate::faligndata({{ 7493057Sgblack@eecs.umich.edu uint64_t msbX = Frs1.udw; 7503057Sgblack@eecs.umich.edu uint64_t lsbX = Frs2.udw; 7513057Sgblack@eecs.umich.edu //Some special cases need to be split out, first 7523057Sgblack@eecs.umich.edu //because they're the most likely to be used, and 7533057Sgblack@eecs.umich.edu //second because otherwise, we end up shifting by 7543057Sgblack@eecs.umich.edu //greater than the width of the type being shifted, 7553057Sgblack@eecs.umich.edu //namely 64, which produces undefined results according 7563057Sgblack@eecs.umich.edu //to the C standard. 7573057Sgblack@eecs.umich.edu switch(Gsr<2:0>) 7583057Sgblack@eecs.umich.edu { 7593057Sgblack@eecs.umich.edu case 0: 7603057Sgblack@eecs.umich.edu Frd.udw = msbX; 7613057Sgblack@eecs.umich.edu break; 7623057Sgblack@eecs.umich.edu case 8: 7633057Sgblack@eecs.umich.edu Frd.udw = lsbX; 7643057Sgblack@eecs.umich.edu break; 7653057Sgblack@eecs.umich.edu default: 7663057Sgblack@eecs.umich.edu uint64_t msbShift = Gsr<2:0> * 8; 7673057Sgblack@eecs.umich.edu uint64_t lsbShift = (8 - Gsr<2:0>) * 8; 7683057Sgblack@eecs.umich.edu uint64_t msbMask = ((uint64_t)(-1)) >> msbShift; 7693057Sgblack@eecs.umich.edu uint64_t lsbMask = ((uint64_t)(-1)) << lsbShift; 7703057Sgblack@eecs.umich.edu Frd.udw = ((msbX & msbMask) << msbShift) | 7713057Sgblack@eecs.umich.edu ((lsbX & lsbMask) >> lsbShift); 7723057Sgblack@eecs.umich.edu } 7732963Sgblack@eecs.umich.edu }}); 7742954Sgblack@eecs.umich.edu 0x4B: Trap::fpmerge({{fault = new IllegalInstruction;}}); 7752954Sgblack@eecs.umich.edu 0x4C: Trap::bshuffle({{fault = new IllegalInstruction;}}); 7762954Sgblack@eecs.umich.edu 0x4D: Trap::fexpand({{fault = new IllegalInstruction;}}); 7772954Sgblack@eecs.umich.edu 0x50: Trap::fpadd16({{fault = new IllegalInstruction;}}); 7782954Sgblack@eecs.umich.edu 0x51: Trap::fpadd16s({{fault = new IllegalInstruction;}}); 7792954Sgblack@eecs.umich.edu 0x52: Trap::fpadd32({{fault = new IllegalInstruction;}}); 7802954Sgblack@eecs.umich.edu 0x53: Trap::fpadd32s({{fault = new IllegalInstruction;}}); 7812954Sgblack@eecs.umich.edu 0x54: Trap::fpsub16({{fault = new IllegalInstruction;}}); 7822954Sgblack@eecs.umich.edu 0x55: Trap::fpsub16s({{fault = new IllegalInstruction;}}); 7832954Sgblack@eecs.umich.edu 0x56: Trap::fpsub32({{fault = new IllegalInstruction;}}); 7842954Sgblack@eecs.umich.edu 0x57: Trap::fpsub32s({{fault = new IllegalInstruction;}}); 7852963Sgblack@eecs.umich.edu 0x60: BasicOperate::fzero({{Frd.df = 0;}}); 7863279Sgblack@eecs.umich.edu 0x61: BasicOperate::fzeros({{Frds.sf = 0;}}); 7872954Sgblack@eecs.umich.edu 0x62: Trap::fnor({{fault = new IllegalInstruction;}}); 7882954Sgblack@eecs.umich.edu 0x63: Trap::fnors({{fault = new IllegalInstruction;}}); 7892954Sgblack@eecs.umich.edu 0x64: Trap::fandnot2({{fault = new IllegalInstruction;}}); 7902954Sgblack@eecs.umich.edu 0x65: Trap::fandnot2s({{fault = new IllegalInstruction;}}); 7912963Sgblack@eecs.umich.edu 0x66: BasicOperate::fnot2({{ 7922963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs2.df)); 7932963Sgblack@eecs.umich.edu }}); 7942963Sgblack@eecs.umich.edu 0x67: BasicOperate::fnot2s({{ 7953279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs2s.sf)); 7962963Sgblack@eecs.umich.edu }}); 7972954Sgblack@eecs.umich.edu 0x68: Trap::fandnot1({{fault = new IllegalInstruction;}}); 7982954Sgblack@eecs.umich.edu 0x69: Trap::fandnot1s({{fault = new IllegalInstruction;}}); 7992963Sgblack@eecs.umich.edu 0x6A: BasicOperate::fnot1({{ 8002963Sgblack@eecs.umich.edu Frd.df = (double)(~((uint64_t)Frs1.df)); 8012963Sgblack@eecs.umich.edu }}); 8022963Sgblack@eecs.umich.edu 0x6B: BasicOperate::fnot1s({{ 8033279Sgblack@eecs.umich.edu Frds.sf = (float)(~((uint32_t)Frs1s.sf)); 8042963Sgblack@eecs.umich.edu }}); 8052954Sgblack@eecs.umich.edu 0x6C: Trap::fxor({{fault = new IllegalInstruction;}}); 8062954Sgblack@eecs.umich.edu 0x6D: Trap::fxors({{fault = new IllegalInstruction;}}); 8072954Sgblack@eecs.umich.edu 0x6E: Trap::fnand({{fault = new IllegalInstruction;}}); 8082954Sgblack@eecs.umich.edu 0x6F: Trap::fnands({{fault = new IllegalInstruction;}}); 8092954Sgblack@eecs.umich.edu 0x70: Trap::fand({{fault = new IllegalInstruction;}}); 8102954Sgblack@eecs.umich.edu 0x71: Trap::fands({{fault = new IllegalInstruction;}}); 8112954Sgblack@eecs.umich.edu 0x72: Trap::fxnor({{fault = new IllegalInstruction;}}); 8122954Sgblack@eecs.umich.edu 0x73: Trap::fxnors({{fault = new IllegalInstruction;}}); 8133057Sgblack@eecs.umich.edu 0x74: BasicOperate::fsrc1({{Frd.udw = Frs1.udw;}}); 8143057Sgblack@eecs.umich.edu 0x75: BasicOperate::fsrc1s({{Frd.uw = Frs1.uw;}}); 8152954Sgblack@eecs.umich.edu 0x76: Trap::fornot2({{fault = new IllegalInstruction;}}); 8162954Sgblack@eecs.umich.edu 0x77: Trap::fornot2s({{fault = new IllegalInstruction;}}); 8173057Sgblack@eecs.umich.edu 0x78: BasicOperate::fsrc2({{Frd.udw = Frs2.udw;}}); 8183057Sgblack@eecs.umich.edu 0x79: BasicOperate::fsrc2s({{Frd.uw = Frs2.uw;}}); 8192954Sgblack@eecs.umich.edu 0x7A: Trap::fornot1({{fault = new IllegalInstruction;}}); 8202954Sgblack@eecs.umich.edu 0x7B: Trap::fornot1s({{fault = new IllegalInstruction;}}); 8212954Sgblack@eecs.umich.edu 0x7C: Trap::for({{fault = new IllegalInstruction;}}); 8222954Sgblack@eecs.umich.edu 0x7D: Trap::fors({{fault = new IllegalInstruction;}}); 8232954Sgblack@eecs.umich.edu 0x7E: Trap::fone({{fault = new IllegalInstruction;}}); 8242954Sgblack@eecs.umich.edu 0x7F: Trap::fones({{fault = new IllegalInstruction;}}); 8252954Sgblack@eecs.umich.edu 0x80: Trap::shutdown({{fault = new IllegalInstruction;}}); 8262954Sgblack@eecs.umich.edu 0x81: Trap::siam({{fault = new IllegalInstruction;}}); 8272954Sgblack@eecs.umich.edu } 8282954Sgblack@eecs.umich.edu 0x37: Trap::impdep2({{fault = new IllegalInstruction;}}); 8292526SN/A 0x38: Branch::jmpl({{ 8302526SN/A Addr target = Rs1 + Rs2_or_imm13; 8312526SN/A if(target & 0x3) 8322526SN/A fault = new MemAddressNotAligned; 8332526SN/A else 8342526SN/A { 8352526SN/A Rd = xc->readPC(); 8362526SN/A NNPC = target; 8372526SN/A } 8382526SN/A }}); 8392526SN/A 0x39: Branch::return({{ 8402561SN/A //If both MemAddressNotAligned and 8412561SN/A //a fill trap happen, it's not clear 8422561SN/A //which one should be returned. 8432526SN/A Addr target = Rs1 + Rs2_or_imm13; 8442526SN/A if(target & 0x3) 8452526SN/A fault = new MemAddressNotAligned; 8462526SN/A else 8472526SN/A NNPC = target; 8482561SN/A if(fault == NoFault) 8492561SN/A { 8502561SN/A if(Canrestore == 0) 8512561SN/A { 8522561SN/A if(Otherwin) 8532646Ssaidi@eecs.umich.edu fault = new FillNOther(Wstate<5:3>); 8542561SN/A else 8552646Ssaidi@eecs.umich.edu fault = new FillNNormal(Wstate<2:0>); 8562561SN/A } 8572561SN/A else 8582561SN/A { 8593417Sgblack@eecs.umich.edu //CWP should be set directly so that it always happens 8603417Sgblack@eecs.umich.edu //Also, this will allow writing to the new window and 8613417Sgblack@eecs.umich.edu //reading from the old one 8623417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 8632561SN/A Cansave = Cansave + 1; 8642561SN/A Canrestore = Canrestore - 1; 8653417Sgblack@eecs.umich.edu //This is here to make sure the CWP is written 8663417Sgblack@eecs.umich.edu //no matter what. This ensures that the results 8673417Sgblack@eecs.umich.edu //are written in the new window as well. 8683417Sgblack@eecs.umich.edu xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 8692561SN/A } 8702561SN/A } 8712526SN/A }}); 8722526SN/A 0x3A: decode CC 8732526SN/A { 8742526SN/A 0x0: Trap::tcci({{ 8752646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<3:0>, COND2)) 8762561SN/A { 8773039Sstever@eecs.umich.edu#if FULL_SYSTEM 8782561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 8792561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 8803531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 8812526SN/A#else 8822561SN/A DPRINTF(Sparc, "The syscall number is %d\n", R1); 8832561SN/A xc->syscall(R1); 8842561SN/A#endif 8852561SN/A } 8862526SN/A }}); 8872526SN/A 0x2: Trap::tccx({{ 8882646Ssaidi@eecs.umich.edu if(passesCondition(Ccr<7:4>, COND2)) 8892561SN/A { 8903039Sstever@eecs.umich.edu#if FULL_SYSTEM 8912561SN/A int lTrapNum = I ? (Rs1 + SW_TRAP) : (Rs1 + Rs2); 8922561SN/A DPRINTF(Sparc, "The trap number is %d\n", lTrapNum); 8933531Sgblack@eecs.umich.edu fault = new TrapInstruction(lTrapNum); 8942526SN/A#else 8952561SN/A DPRINTF(Sparc, "The syscall number is %d\n", R1); 8962561SN/A xc->syscall(R1); 8972561SN/A#endif 8982526SN/A } 8992526SN/A }}); 9002526SN/A } 9012526SN/A 0x3B: Nop::flush({{/*Instruction memory flush*/}}); 9022526SN/A 0x3C: save({{ 9032526SN/A //CWP should be set directly so that it always happens 9042526SN/A //Also, this will allow writing to the new window and 9052526SN/A //reading from the old one 9062526SN/A if(Cansave == 0) 9072526SN/A { 9082526SN/A if(Otherwin) 9092646Ssaidi@eecs.umich.edu fault = new SpillNOther(Wstate<5:3>); 9102526SN/A else 9112646Ssaidi@eecs.umich.edu fault = new SpillNNormal(Wstate<2:0>); 9123417Sgblack@eecs.umich.edu //Cwp = (Cwp + 2) % NWindows; 9132526SN/A } 9142526SN/A else if(Cleanwin - Canrestore == 0) 9152526SN/A { 9163417Sgblack@eecs.umich.edu //Cwp = (Cwp + 1) % NWindows; 9172526SN/A fault = new CleanWindow; 9182526SN/A } 9192526SN/A else 9202526SN/A { 9212526SN/A Cwp = (Cwp + 1) % NWindows; 9222526SN/A Rd = Rs1 + Rs2_or_imm13; 9232561SN/A Cansave = Cansave - 1; 9242561SN/A Canrestore = Canrestore + 1; 9253417Sgblack@eecs.umich.edu //This is here to make sure the CWP is written 9263417Sgblack@eecs.umich.edu //no matter what. This ensures that the results 9273417Sgblack@eecs.umich.edu //are written in the new window as well. 9283417Sgblack@eecs.umich.edu xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 9292526SN/A } 9302526SN/A }}); 9312526SN/A 0x3D: restore({{ 9322526SN/A if(Canrestore == 0) 9332526SN/A { 9342526SN/A if(Otherwin) 9352646Ssaidi@eecs.umich.edu fault = new FillNOther(Wstate<5:3>); 9362526SN/A else 9372646Ssaidi@eecs.umich.edu fault = new FillNNormal(Wstate<2:0>); 9382526SN/A } 9392526SN/A else 9402526SN/A { 9413417Sgblack@eecs.umich.edu //CWP should be set directly so that it always happens 9423417Sgblack@eecs.umich.edu //Also, this will allow writing to the new window and 9433417Sgblack@eecs.umich.edu //reading from the old one 9443417Sgblack@eecs.umich.edu Cwp = (Cwp - 1 + NWindows) % NWindows; 9452526SN/A Rd = Rs1 + Rs2_or_imm13; 9462561SN/A Cansave = Cansave + 1; 9472561SN/A Canrestore = Canrestore - 1; 9483417Sgblack@eecs.umich.edu //This is here to make sure the CWP is written 9493417Sgblack@eecs.umich.edu //no matter what. This ensures that the results 9503417Sgblack@eecs.umich.edu //are written in the new window as well. 9513417Sgblack@eecs.umich.edu xc->setMiscRegWithEffect(MISCREG_CWP, Cwp); 9522526SN/A } 9532526SN/A }}); 9542526SN/A 0x3E: decode FCN { 9552526SN/A 0x0: Priv::done({{ 9562526SN/A if(Tl == 0) 9572526SN/A return new IllegalInstruction; 9582646Ssaidi@eecs.umich.edu 9592646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 9602646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 9612646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 9622646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 9632646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 9642646Ssaidi@eecs.umich.edu NPC = Tnpc; 9652646Ssaidi@eecs.umich.edu NNPC = Tnpc + 4; 9662526SN/A Tl = Tl - 1; 9672526SN/A }}); 9682938Sgblack@eecs.umich.edu 0x1: Priv::retry({{ 9692526SN/A if(Tl == 0) 9702526SN/A return new IllegalInstruction; 9712646Ssaidi@eecs.umich.edu Cwp = Tstate<4:0>; 9722646Ssaidi@eecs.umich.edu Pstate = Tstate<20:8>; 9732646Ssaidi@eecs.umich.edu Asi = Tstate<31:24>; 9742646Ssaidi@eecs.umich.edu Ccr = Tstate<39:32>; 9752646Ssaidi@eecs.umich.edu Gl = Tstate<42:40>; 9762646Ssaidi@eecs.umich.edu NPC = Tpc; 9773417Sgblack@eecs.umich.edu NNPC = Tnpc; 9782526SN/A Tl = Tl - 1; 9792526SN/A }}); 9802526SN/A } 9812526SN/A } 9822469SN/A } 9832469SN/A 0x3: decode OP3 { 9842526SN/A format Load { 9853272Sgblack@eecs.umich.edu 0x00: lduw({{Rd = Mem.uw;}}); 9863272Sgblack@eecs.umich.edu 0x01: ldub({{Rd = Mem.ub;}}); 9873272Sgblack@eecs.umich.edu 0x02: lduh({{Rd = Mem.uhw;}}); 9882526SN/A 0x03: ldd({{ 9893272Sgblack@eecs.umich.edu uint64_t val = Mem.udw; 9902526SN/A RdLow = val<31:0>; 9912526SN/A RdHigh = val<63:32>; 9923272Sgblack@eecs.umich.edu }}); 9932526SN/A } 9942526SN/A format Store { 9953272Sgblack@eecs.umich.edu 0x04: stw({{Mem.uw = Rd.sw;}}); 9963272Sgblack@eecs.umich.edu 0x05: stb({{Mem.ub = Rd.sb;}}); 9973272Sgblack@eecs.umich.edu 0x06: sth({{Mem.uhw = Rd.shw;}}); 9983272Sgblack@eecs.umich.edu 0x07: std({{Mem.udw = RdLow<31:0> | (RdHigh<31:0> << 32);}}); 9992526SN/A } 10002526SN/A format Load { 10013272Sgblack@eecs.umich.edu 0x08: ldsw({{Rd = (int32_t)Mem.sw;}}); 10023272Sgblack@eecs.umich.edu 0x09: ldsb({{Rd = (int8_t)Mem.sb;}}); 10033272Sgblack@eecs.umich.edu 0x0A: ldsh({{Rd = (int16_t)Mem.shw;}}); 10043272Sgblack@eecs.umich.edu 0x0B: ldx({{Rd = (int64_t)Mem.sdw;}}); 10052526SN/A } 10063438Sgblack@eecs.umich.edu 0x0D: LoadStore::ldstub( 10073438Sgblack@eecs.umich.edu {{Rd = Mem.ub;}}, 10083438Sgblack@eecs.umich.edu {{Mem.ub = 0xFF;}}); 10093272Sgblack@eecs.umich.edu 0x0E: Store::stx({{Mem.udw = Rd}}); 10103388Sgblack@eecs.umich.edu 0x0F: LoadStore::swap( 10113438Sgblack@eecs.umich.edu {{uReg0 = Rd.uw; 10123388Sgblack@eecs.umich.edu Rd.uw = Mem.uw;}}, 10133438Sgblack@eecs.umich.edu {{Mem.uw = uReg0;}}); 10142526SN/A format Load { 10153272Sgblack@eecs.umich.edu 0x10: lduwa({{Rd = Mem.uw;}}); 10163272Sgblack@eecs.umich.edu 0x11: lduba({{Rd = Mem.ub;}}); 10173272Sgblack@eecs.umich.edu 0x12: lduha({{Rd = Mem.uhw;}}); 10182526SN/A 0x13: ldda({{ 10193272Sgblack@eecs.umich.edu uint64_t val = Mem.udw; 10202526SN/A RdLow = val<31:0>; 10212526SN/A RdHigh = val<63:32>; 10223272Sgblack@eecs.umich.edu }}); 10232526SN/A } 10242526SN/A format Store { 10253272Sgblack@eecs.umich.edu 0x14: stwa({{Mem.uw = Rd;}}); 10263272Sgblack@eecs.umich.edu 0x15: stba({{Mem.ub = Rd;}}); 10273272Sgblack@eecs.umich.edu 0x16: stha({{Mem.uhw = Rd;}}); 10283272Sgblack@eecs.umich.edu 0x17: stda({{Mem.udw = RdLow<31:0> | RdHigh<31:0> << 32;}}); 10292526SN/A } 10302526SN/A format Load { 10313272Sgblack@eecs.umich.edu 0x18: ldswa({{Rd = (int32_t)Mem.sw;}}); 10323272Sgblack@eecs.umich.edu 0x19: ldsba({{Rd = (int8_t)Mem.sb;}}); 10333272Sgblack@eecs.umich.edu 0x1A: ldsha({{Rd = (int16_t)Mem.shw;}}); 10343272Sgblack@eecs.umich.edu 0x1B: ldxa({{Rd = (int64_t)Mem.sdw;}}); 10352526SN/A } 10363388Sgblack@eecs.umich.edu 0x1D: LoadStore::ldstuba( 10373388Sgblack@eecs.umich.edu {{Rd = Mem.ub;}}, 10383388Sgblack@eecs.umich.edu {{Mem.ub = 0xFF}}); 10393272Sgblack@eecs.umich.edu 0x1E: Store::stxa({{Mem.udw = Rd}}); 10403388Sgblack@eecs.umich.edu 0x1F: LoadStore::swapa( 10413438Sgblack@eecs.umich.edu {{uReg0 = Rd.uw; 10423388Sgblack@eecs.umich.edu Rd.uw = Mem.uw;}}, 10433438Sgblack@eecs.umich.edu {{Mem.uw = uReg0;}}); 10442526SN/A format Trap { 10453272Sgblack@eecs.umich.edu 0x20: Load::ldf({{Frd.uw = Mem.uw;}}); 10462526SN/A 0x21: decode X { 10473272Sgblack@eecs.umich.edu 0x0: Load::ldfsr({{Fsr = Mem.uw | Fsr<63:32>;}}); 10483272Sgblack@eecs.umich.edu 0x1: Load::ldxfsr({{Fsr = Mem.udw;}}); 10492469SN/A } 10502526SN/A 0x22: ldqf({{fault = new FpDisabled;}}); 10513272Sgblack@eecs.umich.edu 0x23: Load::lddf({{Frd.udw = Mem.udw;}}); 10523272Sgblack@eecs.umich.edu 0x24: Store::stf({{Mem.uw = Frd.uw;}}); 10532526SN/A 0x25: decode X { 10543272Sgblack@eecs.umich.edu 0x0: Store::stfsr({{Mem.uw = Fsr<31:0>;}}); 10553272Sgblack@eecs.umich.edu 0x1: Store::stxfsr({{Mem.udw = Fsr;}}); 10562526SN/A } 10572526SN/A 0x26: stqf({{fault = new FpDisabled;}}); 10583272Sgblack@eecs.umich.edu 0x27: Store::stdf({{Mem.udw = Frd.udw;}}); 10592526SN/A 0x2D: Nop::prefetch({{ }}); 10603272Sgblack@eecs.umich.edu 0x30: Load::ldfa({{Frd.uw = Mem.uw;}}); 10612526SN/A 0x32: ldqfa({{fault = new FpDisabled;}}); 10623272Sgblack@eecs.umich.edu format LoadAlt { 10633272Sgblack@eecs.umich.edu 0x33: decode EXT_ASI { 10643272Sgblack@eecs.umich.edu //ASI_NUCLEUS 10653272Sgblack@eecs.umich.edu 0x04: FailUnimpl::lddfa_n(); 10663272Sgblack@eecs.umich.edu //ASI_NUCLEUS_LITTLE 10673272Sgblack@eecs.umich.edu 0x0C: FailUnimpl::lddfa_nl(); 10683272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY 10693272Sgblack@eecs.umich.edu 0x10: FailUnimpl::lddfa_aiup(); 10703272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY_LITTLE 10713272Sgblack@eecs.umich.edu 0x18: FailUnimpl::lddfa_aiupl(); 10723272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY 10733272Sgblack@eecs.umich.edu 0x11: FailUnimpl::lddfa_aius(); 10743272Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY_LITTLE 10753272Sgblack@eecs.umich.edu 0x19: FailUnimpl::lddfa_aiusl(); 10763272Sgblack@eecs.umich.edu //ASI_REAL 10773272Sgblack@eecs.umich.edu 0x14: FailUnimpl::lddfa_real(); 10783272Sgblack@eecs.umich.edu //ASI_REAL_LITTLE 10793272Sgblack@eecs.umich.edu 0x1C: FailUnimpl::lddfa_real_l(); 10803272Sgblack@eecs.umich.edu //ASI_REAL_IO 10813272Sgblack@eecs.umich.edu 0x15: FailUnimpl::lddfa_real_io(); 10823272Sgblack@eecs.umich.edu //ASI_REAL_IO_LITTLE 10833272Sgblack@eecs.umich.edu 0x1D: FailUnimpl::lddfa_real_io_l(); 10843272Sgblack@eecs.umich.edu //ASI_PRIMARY 10853272Sgblack@eecs.umich.edu 0x80: FailUnimpl::lddfa_p(); 10863272Sgblack@eecs.umich.edu //ASI_PRIMARY_LITTLE 10873272Sgblack@eecs.umich.edu 0x88: FailUnimpl::lddfa_pl(); 10883272Sgblack@eecs.umich.edu //ASI_SECONDARY 10893272Sgblack@eecs.umich.edu 0x81: FailUnimpl::lddfa_s(); 10903272Sgblack@eecs.umich.edu //ASI_SECONDARY_LITTLE 10913272Sgblack@eecs.umich.edu 0x89: FailUnimpl::lddfa_sl(); 10923272Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT 10933272Sgblack@eecs.umich.edu 0x82: FailUnimpl::lddfa_pnf(); 10943272Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT_LITTLE 10953272Sgblack@eecs.umich.edu 0x8A: FailUnimpl::lddfa_pnfl(); 10963272Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT 10973272Sgblack@eecs.umich.edu 0x83: FailUnimpl::lddfa_snf(); 10983272Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT_LITTLE 10993272Sgblack@eecs.umich.edu 0x8B: FailUnimpl::lddfa_snfl(); 11003272Sgblack@eecs.umich.edu 11013272Sgblack@eecs.umich.edu format BlockLoad { 11023272Sgblack@eecs.umich.edu // LDBLOCKF 11033272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY 11043272Sgblack@eecs.umich.edu 0x16: FailUnimpl::ldblockf_aiup(); 11053272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY 11063272Sgblack@eecs.umich.edu 0x17: FailUnimpl::ldblockf_aius(); 11073272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 11083272Sgblack@eecs.umich.edu 0x1E: FailUnimpl::ldblockf_aiupl(); 11093272Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 11103272Sgblack@eecs.umich.edu 0x1F: FailUnimpl::ldblockf_aiusl(); 11113272Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY 11123378Sgblack@eecs.umich.edu 0xF0: ldblockf_p({{Frd_N.udw = Mem.udw;}}); 11133272Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY 11143272Sgblack@eecs.umich.edu 0xF1: FailUnimpl::ldblockf_s(); 11153272Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY_LITTLE 11163272Sgblack@eecs.umich.edu 0xF8: FailUnimpl::ldblockf_pl(); 11173272Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY_LITTLE 11183272Sgblack@eecs.umich.edu 0xF9: FailUnimpl::ldblockf_sl(); 11193272Sgblack@eecs.umich.edu } 11203272Sgblack@eecs.umich.edu 11213272Sgblack@eecs.umich.edu //LDSHORTF 11223272Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY 11233272Sgblack@eecs.umich.edu 0xD0: FailUnimpl::ldshortf_8p(); 11243272Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY 11253272Sgblack@eecs.umich.edu 0xD1: FailUnimpl::ldshortf_8s(); 11263272Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY_LITTLE 11273272Sgblack@eecs.umich.edu 0xD8: FailUnimpl::ldshortf_8pl(); 11283272Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY_LITTLE 11293272Sgblack@eecs.umich.edu 0xD9: FailUnimpl::ldshortf_8sl(); 11303272Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY 11313272Sgblack@eecs.umich.edu 0xD2: FailUnimpl::ldshortf_16p(); 11323272Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY 11333272Sgblack@eecs.umich.edu 0xD3: FailUnimpl::ldshortf_16s(); 11343272Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY_LITTLE 11353272Sgblack@eecs.umich.edu 0xDA: FailUnimpl::ldshortf_16pl(); 11363272Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY_LITTLE 11373272Sgblack@eecs.umich.edu 0xDB: FailUnimpl::ldshortf_16sl(); 11383272Sgblack@eecs.umich.edu //Not an ASI which is legal with lddfa 11393378Sgblack@eecs.umich.edu default: Trap::lddfa_bad_asi( 11403378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 11413272Sgblack@eecs.umich.edu } 11423272Sgblack@eecs.umich.edu } 11433272Sgblack@eecs.umich.edu 0x34: Store::stfa({{Mem.uw = Frd.uw;}}); 11442954Sgblack@eecs.umich.edu 0x36: stqfa({{fault = new FpDisabled;}}); 11453378Sgblack@eecs.umich.edu format StoreAlt { 11463378Sgblack@eecs.umich.edu 0x37: decode EXT_ASI { 11473378Sgblack@eecs.umich.edu //ASI_NUCLEUS 11483378Sgblack@eecs.umich.edu 0x04: FailUnimpl::stdfa_n(); 11493378Sgblack@eecs.umich.edu //ASI_NUCLEUS_LITTLE 11503378Sgblack@eecs.umich.edu 0x0C: FailUnimpl::stdfa_nl(); 11513378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY 11523378Sgblack@eecs.umich.edu 0x10: FailUnimpl::stdfa_aiup(); 11533378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_PRIMARY_LITTLE 11543378Sgblack@eecs.umich.edu 0x18: FailUnimpl::stdfa_aiupl(); 11553378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY 11563378Sgblack@eecs.umich.edu 0x11: FailUnimpl::stdfa_aius(); 11573378Sgblack@eecs.umich.edu //ASI_AS_IF_USER_SECONDARY_LITTLE 11583378Sgblack@eecs.umich.edu 0x19: FailUnimpl::stdfa_aiusl(); 11593378Sgblack@eecs.umich.edu //ASI_REAL 11603378Sgblack@eecs.umich.edu 0x14: FailUnimpl::stdfa_real(); 11613378Sgblack@eecs.umich.edu //ASI_REAL_LITTLE 11623378Sgblack@eecs.umich.edu 0x1C: FailUnimpl::stdfa_real_l(); 11633378Sgblack@eecs.umich.edu //ASI_REAL_IO 11643378Sgblack@eecs.umich.edu 0x15: FailUnimpl::stdfa_real_io(); 11653378Sgblack@eecs.umich.edu //ASI_REAL_IO_LITTLE 11663378Sgblack@eecs.umich.edu 0x1D: FailUnimpl::stdfa_real_io_l(); 11673378Sgblack@eecs.umich.edu //ASI_PRIMARY 11683378Sgblack@eecs.umich.edu 0x80: FailUnimpl::stdfa_p(); 11693378Sgblack@eecs.umich.edu //ASI_PRIMARY_LITTLE 11703378Sgblack@eecs.umich.edu 0x88: FailUnimpl::stdfa_pl(); 11713378Sgblack@eecs.umich.edu //ASI_SECONDARY 11723378Sgblack@eecs.umich.edu 0x81: FailUnimpl::stdfa_s(); 11733378Sgblack@eecs.umich.edu //ASI_SECONDARY_LITTLE 11743378Sgblack@eecs.umich.edu 0x89: FailUnimpl::stdfa_sl(); 11753378Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT 11763378Sgblack@eecs.umich.edu 0x82: FailUnimpl::stdfa_pnf(); 11773378Sgblack@eecs.umich.edu //ASI_PRIMARY_NO_FAULT_LITTLE 11783378Sgblack@eecs.umich.edu 0x8A: FailUnimpl::stdfa_pnfl(); 11793378Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT 11803378Sgblack@eecs.umich.edu 0x83: FailUnimpl::stdfa_snf(); 11813378Sgblack@eecs.umich.edu //ASI_SECONDARY_NO_FAULT_LITTLE 11823378Sgblack@eecs.umich.edu 0x8B: FailUnimpl::stdfa_snfl(); 11833378Sgblack@eecs.umich.edu 11843378Sgblack@eecs.umich.edu format BlockStore { 11853378Sgblack@eecs.umich.edu // STBLOCKF 11863378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY 11873378Sgblack@eecs.umich.edu 0x16: FailUnimpl::stblockf_aiup(); 11883378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY 11893378Sgblack@eecs.umich.edu 0x17: FailUnimpl::stblockf_aius(); 11903378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE 11913378Sgblack@eecs.umich.edu 0x1E: FailUnimpl::stblockf_aiupl(); 11923378Sgblack@eecs.umich.edu //ASI_BLOCK_AS_IF_USER_SECONDARY_LITTLE 11933378Sgblack@eecs.umich.edu 0x1F: FailUnimpl::stblockf_aiusl(); 11943378Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY 11953378Sgblack@eecs.umich.edu 0xF0: stblockf_p({{Mem.udw = Frd_N.udw;}}); 11963378Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY 11973378Sgblack@eecs.umich.edu 0xF1: FailUnimpl::stblockf_s(); 11983378Sgblack@eecs.umich.edu //ASI_BLOCK_PRIMARY_LITTLE 11993378Sgblack@eecs.umich.edu 0xF8: FailUnimpl::stblockf_pl(); 12003378Sgblack@eecs.umich.edu //ASI_BLOCK_SECONDARY_LITTLE 12013378Sgblack@eecs.umich.edu 0xF9: FailUnimpl::stblockf_sl(); 12023378Sgblack@eecs.umich.edu } 12033378Sgblack@eecs.umich.edu 12043378Sgblack@eecs.umich.edu //STSHORTF 12053378Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY 12063378Sgblack@eecs.umich.edu 0xD0: FailUnimpl::stshortf_8p(); 12073378Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY 12083378Sgblack@eecs.umich.edu 0xD1: FailUnimpl::stshortf_8s(); 12093378Sgblack@eecs.umich.edu //ASI_FL8_PRIMARY_LITTLE 12103378Sgblack@eecs.umich.edu 0xD8: FailUnimpl::stshortf_8pl(); 12113378Sgblack@eecs.umich.edu //ASI_FL8_SECONDARY_LITTLE 12123378Sgblack@eecs.umich.edu 0xD9: FailUnimpl::stshortf_8sl(); 12133378Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY 12143378Sgblack@eecs.umich.edu 0xD2: FailUnimpl::stshortf_16p(); 12153378Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY 12163378Sgblack@eecs.umich.edu 0xD3: FailUnimpl::stshortf_16s(); 12173378Sgblack@eecs.umich.edu //ASI_FL16_PRIMARY_LITTLE 12183378Sgblack@eecs.umich.edu 0xDA: FailUnimpl::stshortf_16pl(); 12193378Sgblack@eecs.umich.edu //ASI_FL16_SECONDARY_LITTLE 12203378Sgblack@eecs.umich.edu 0xDB: FailUnimpl::stshortf_16sl(); 12213378Sgblack@eecs.umich.edu //Not an ASI which is legal with lddfa 12223378Sgblack@eecs.umich.edu default: Trap::stdfa_bad_asi( 12233378Sgblack@eecs.umich.edu {{fault = new DataAccessException;}}); 12243378Sgblack@eecs.umich.edu } 12253378Sgblack@eecs.umich.edu } 12263439Sgblack@eecs.umich.edu 0x3C: Cas::casa( 12273439Sgblack@eecs.umich.edu {{uReg0 = Mem.uw;}}, 12283439Sgblack@eecs.umich.edu {{if(Rs2.uw == uReg0) 12292526SN/A Mem.uw = Rd.uw; 12303439Sgblack@eecs.umich.edu else 12313439Sgblack@eecs.umich.edu storeCond = false; 12323439Sgblack@eecs.umich.edu Rd.uw = uReg0;}}); 12332526SN/A 0x3D: Nop::prefetcha({{ }}); 12343439Sgblack@eecs.umich.edu 0x3E: Cas::casxa( 12353439Sgblack@eecs.umich.edu {{uReg0 = Mem.udw;}}, 12363439Sgblack@eecs.umich.edu {{if(Rs2 == uReg0) 12372526SN/A Mem.udw = Rd; 12383439Sgblack@eecs.umich.edu else 12393439Sgblack@eecs.umich.edu storeCond = false; 12403439Sgblack@eecs.umich.edu Rd = uReg0;}}); 12412526SN/A } 12422469SN/A } 12432022SN/A} 1244