bitfields.isa revision 3416
12632Sstever@eecs.umich.edu// Copyright (c) 2006 The Regents of The University of Michigan
22632Sstever@eecs.umich.edu// All rights reserved.
32632Sstever@eecs.umich.edu//
42632Sstever@eecs.umich.edu// Redistribution and use in source and binary forms, with or without
52632Sstever@eecs.umich.edu// modification, are permitted provided that the following conditions are
62632Sstever@eecs.umich.edu// met: redistributions of source code must retain the above copyright
72632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer;
82632Sstever@eecs.umich.edu// redistributions in binary form must reproduce the above copyright
92632Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the
102632Sstever@eecs.umich.edu// documentation and/or other materials provided with the distribution;
112632Sstever@eecs.umich.edu// neither the name of the copyright holders nor the names of its
122632Sstever@eecs.umich.edu// contributors may be used to endorse or promote products derived from
132632Sstever@eecs.umich.edu// this software without specific prior written permission.
142632Sstever@eecs.umich.edu//
152632Sstever@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
162632Sstever@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
172632Sstever@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
182632Sstever@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
192632Sstever@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
202632Sstever@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
212632Sstever@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
222632Sstever@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
232632Sstever@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
242632Sstever@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
252632Sstever@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
262632Sstever@eecs.umich.edu//
272632Sstever@eecs.umich.edu// Authors: Ali Saidi
282632Sstever@eecs.umich.edu//          Gabe Black
292632Sstever@eecs.umich.edu//          Steve Reinhardt
302632Sstever@eecs.umich.edu
312022SN/A////////////////////////////////////////////////////////////////////
322022SN/A//
332022SN/A// Bitfield definitions.
342022SN/A//
352022SN/A
362022SN/A// Bitfields are shared liberally between instruction formats, so they are
372022SN/A// simply defined alphabetically
382022SN/A
392022SN/Adef bitfield A		<29>;
402485SN/Adef bitfield BPCC       <21:20>; // for BPcc & FBPcc
412485SN/Adef bitfield FCMPCC     <26:56>; // for FCMP & FCMPEa
422487SN/Adef bitfield FMOVCC     <13:11>; // for FMOVcc
432485SN/Adef bitfield CC         <12:11>; // for MOVcc & Tcc
442487SN/Adef bitfield MOVCC3     <18>; // also for MOVcc
452022SN/Adef bitfield CMASK	<6:4>;
462022SN/Adef bitfield COND2	<28:25>;
472022SN/Adef bitfield COND4	<17:14>;
482022SN/Adef bitfield D16HI	<21:20>;
492022SN/Adef bitfield D16LO	<13:0>;
502022SN/Adef bitfield DISP19	<18:0>;
512022SN/Adef bitfield DISP22	<21:0>;
522022SN/Adef bitfield DISP30	<29:0>;
533416Sgblack@eecs.umich.edudef bitfield FCN	<29:25>;
542022SN/Adef bitfield I		<13>;
552022SN/Adef bitfield IMM_ASI	<12:5>;
562022SN/Adef bitfield IMM22	<21:0>;
572022SN/Adef bitfield MMASK	<3:0>;
582022SN/Adef bitfield OP		<31:30>;
592022SN/Adef bitfield OP2	<24:22>;
602022SN/Adef bitfield OP3	<24:19>;
612022SN/Adef bitfield OPF	<13:5>;
622022SN/Adef bitfield OPF_CC	<13:11>;
632022SN/Adef bitfield OPF_LOW5	<9:5>;
642022SN/Adef bitfield OPF_LOW6	<10:5>;
652022SN/Adef bitfield P		<19>;
662022SN/Adef bitfield RCOND2	<27:25>;
672022SN/Adef bitfield RCOND3	<12:10>;
682022SN/Adef bitfield RCOND4	<12:10>;
692022SN/Adef bitfield RD		<29:25>;
702022SN/Adef bitfield RS1	<18:14>;
712022SN/Adef bitfield RS2	<4:0>;
722022SN/Adef bitfield SHCNT32	<4:0>;
732022SN/Adef bitfield SHCNT64	<5:0>;
742022SN/Adef bitfield SIMM10	<9:0>;
752022SN/Adef bitfield SIMM11	<10:0>;
762022SN/Adef bitfield SIMM13	<12:0>;
772475SN/Adef bitfield SW_TRAP	<7:0>;
782022SN/Adef bitfield X		<12>;
793272Sgblack@eecs.umich.edu
803272Sgblack@eecs.umich.edu// Extended bitfields which aren't part of the actual instruction.
813272Sgblack@eecs.umich.edu
823272Sgblack@eecs.umich.edudef bitfield EXT_ASI	<39:32>;
83