base.isa revision 2482
14876Sstever@eecs.umich.edu////////////////////////////////////////////////////////////////////
23646Srdreslin@umich.edu//
33646Srdreslin@umich.edu// Base class for sparc instructions, and some support functions
43646Srdreslin@umich.edu//
53646Srdreslin@umich.edu
63646Srdreslin@umich.eduoutput header {{
73646Srdreslin@umich.edu
83646Srdreslin@umich.edu        union CondCodes
93646Srdreslin@umich.edu        {
103646Srdreslin@umich.edu            struct
113646Srdreslin@umich.edu            {
123646Srdreslin@umich.edu                uint8_t c:1;
133646Srdreslin@umich.edu                uint8_t v:1;
143646Srdreslin@umich.edu                uint8_t z:1;
153646Srdreslin@umich.edu                uint8_t n:1;
163646Srdreslin@umich.edu            };
173646Srdreslin@umich.edu            uint32_t bits;
183646Srdreslin@umich.edu        };
193646Srdreslin@umich.edu
203646Srdreslin@umich.edu        enum CondTest
213646Srdreslin@umich.edu        {
223646Srdreslin@umich.edu            Always=0x8,
233646Srdreslin@umich.edu            Never=0x0,
243646Srdreslin@umich.edu            NotEqual=0x9,
253646Srdreslin@umich.edu            Equal=0x1,
263646Srdreslin@umich.edu            Greater=0xA,
273646Srdreslin@umich.edu            LessOrEqual=0x2,
283646Srdreslin@umich.edu            GreaterOrEqual=0xB,
293646Srdreslin@umich.edu            Less=0x3,
303646Srdreslin@umich.edu            GreaterUnsigned=0xC,
313646Srdreslin@umich.edu            LessOrEqualUnsigned=0x4,
323646Srdreslin@umich.edu            CarryClear=0xD,
336654Snate@binkert.org            CarrySet=0x5,
346654Snate@binkert.org            Positive=0xE,
356654Snate@binkert.org            Negative=0x6,
366654Snate@binkert.org            OverflowClear=0xF,
373646Srdreslin@umich.edu            OverflowSet=0x7
383646Srdreslin@umich.edu        };
396654Snate@binkert.org
406654Snate@binkert.org        /**
413646Srdreslin@umich.edu         * Base class for all SPARC static instructions.
423646Srdreslin@umich.edu         */
433646Srdreslin@umich.edu        class SparcStaticInst : public StaticInst
443646Srdreslin@umich.edu        {
453646Srdreslin@umich.edu          protected:
463646Srdreslin@umich.edu            // Constructor.
473646Srdreslin@umich.edu            SparcStaticInst(const char *mnem,
483646Srdreslin@umich.edu                 MachInst _machInst, OpClass __opClass)
493646Srdreslin@umich.edu                    : StaticInst(mnem, _machInst, __opClass)
503646Srdreslin@umich.edu                {
513646Srdreslin@umich.edu                }
523646Srdreslin@umich.edu
533646Srdreslin@umich.edu            std::string generateDisassembly(Addr pc,
543646Srdreslin@umich.edu                const SymbolTable *symtab) const;
553646Srdreslin@umich.edu
563646Srdreslin@umich.edu            void printReg(std::ostream &os, int reg) const;
573646Srdreslin@umich.edu        };
583646Srdreslin@umich.edu
593646Srdreslin@umich.edu        bool passesCondition(uint32_t codes, uint32_t condition);
603646Srdreslin@umich.edu}};
613646Srdreslin@umich.edu
623646Srdreslin@umich.edudef template ROrImmDecode {{
633646Srdreslin@umich.edu    {
643646Srdreslin@umich.edu        return (I ? (SparcStaticInst *)(new %(class_name)sImm(machInst))
653646Srdreslin@umich.edu                  : (SparcStaticInst *)(new %(class_name)s(machInst)));
663646Srdreslin@umich.edu    }
673646Srdreslin@umich.edu}};
683646Srdreslin@umich.edu
693646Srdreslin@umich.edulet {{
703646Srdreslin@umich.edu    def splitOutImm(code):
713646Srdreslin@umich.edu        matcher = re.compile(r'Rs(?P<rNum>\d)_or_imm(?P<iNum>d{0,2})')
723646Srdreslin@umich.edu        rOrImmMatch = matcher.search(code)
733646Srdreslin@umich.edu        if (rOrImmMatch == None):
743646Srdreslin@umich.edu            return (False, CodeBlock(code), None, '', '')
753646Srdreslin@umich.edu        rString = matcher.sub(r'(?P=rNum)', rOrImmMatch.string)
763646Srdreslin@umich.edu        iString = matcher.sub(r'(?P=iNum)', rOrImmMatch.string)
773646Srdreslin@umich.edu        orig_code = code
783646Srdreslin@umich.edu        code = matcher.sub(r'Rs(?P<rNum>)', orig_code)
793646Srdreslin@umich.edu        imm_code = matcher.sub('imm', orig_code)
803646Srdreslin@umich.edu        return (True, CodeBlock(code), CodeBlock(imm_code), rString, iString)
813646Srdreslin@umich.edu}};
823646Srdreslin@umich.edu
833646Srdreslin@umich.eduoutput decoder {{
843646Srdreslin@umich.edu
853646Srdreslin@umich.edu        void
863646Srdreslin@umich.edu        SparcStaticInst::printReg(std::ostream &os, int reg) const
873646Srdreslin@umich.edu        {
883646Srdreslin@umich.edu            if (reg < FP_Base_DepTag) {
893646Srdreslin@umich.edu                ccprintf(os, "r%d", reg);
903646Srdreslin@umich.edu            }
913646Srdreslin@umich.edu            else {
923646Srdreslin@umich.edu                ccprintf(os, "f%d", reg - FP_Base_DepTag);
933646Srdreslin@umich.edu            }
943646Srdreslin@umich.edu        }
953646Srdreslin@umich.edu
963646Srdreslin@umich.edu        std::string SparcStaticInst::generateDisassembly(Addr pc,
973646Srdreslin@umich.edu            const SymbolTable *symtab) const
983646Srdreslin@umich.edu        {
993646Srdreslin@umich.edu            std::stringstream ss;
1003646Srdreslin@umich.edu
1013646Srdreslin@umich.edu            ccprintf(ss, "%-10s ", mnemonic);
1023646Srdreslin@umich.edu
1033646Srdreslin@umich.edu            // just print the first two source regs... if there's
1043646Srdreslin@umich.edu            // a third one, it's a read-modify-write dest (Rc),
1053646Srdreslin@umich.edu            // e.g. for CMOVxx
1063646Srdreslin@umich.edu            if(_numSrcRegs > 0)
1073646Srdreslin@umich.edu            {
1083646Srdreslin@umich.edu                printReg(ss, _srcRegIdx[0]);
1093646Srdreslin@umich.edu            }
1103646Srdreslin@umich.edu            if(_numSrcRegs > 1)
1113646Srdreslin@umich.edu            {
1123646Srdreslin@umich.edu                ss << ",";
1133646Srdreslin@umich.edu                printReg(ss, _srcRegIdx[1]);
1143646Srdreslin@umich.edu            }
1153646Srdreslin@umich.edu
1163646Srdreslin@umich.edu            // just print the first dest... if there's a second one,
1173646Srdreslin@umich.edu            // it's generally implicit
1183646Srdreslin@umich.edu            if(_numDestRegs > 0)
1193646Srdreslin@umich.edu            {
1203646Srdreslin@umich.edu                if(_numSrcRegs > 0)
1213646Srdreslin@umich.edu                    ss << ",";
1223646Srdreslin@umich.edu                    printReg(ss, _destRegIdx[0]);
1233646Srdreslin@umich.edu            }
1243646Srdreslin@umich.edu
1253646Srdreslin@umich.edu            return ss.str();
1263646Srdreslin@umich.edu        }
1273646Srdreslin@umich.edu
1283646Srdreslin@umich.edu        bool passesCondition(uint32_t codes, uint32_t condition)
1293646Srdreslin@umich.edu        {
1303646Srdreslin@umich.edu            CondCodes condCodes;
1313646Srdreslin@umich.edu            condCodes.bits = codes;
1323646Srdreslin@umich.edu            switch(condition)
1333646Srdreslin@umich.edu            {
1343646Srdreslin@umich.edu              case Always:
1353646Srdreslin@umich.edu                return true;
1363646Srdreslin@umich.edu              case Never:
1373646Srdreslin@umich.edu                return false;
1383646Srdreslin@umich.edu              case NotEqual:
1393646Srdreslin@umich.edu                return !condCodes.z;
1403646Srdreslin@umich.edu              case Equal:
1413646Srdreslin@umich.edu                return condCodes.z;
1423646Srdreslin@umich.edu              case Greater:
1433646Srdreslin@umich.edu                return !(condCodes.z | (condCodes.n ^ condCodes.v));
1443646Srdreslin@umich.edu              case LessOrEqual:
1453646Srdreslin@umich.edu                return condCodes.z | (condCodes.n ^ condCodes.v);
1463646Srdreslin@umich.edu              case GreaterOrEqual:
1473646Srdreslin@umich.edu                return !(condCodes.n ^ condCodes.v);
1483646Srdreslin@umich.edu              case Less:
1493646Srdreslin@umich.edu                return (condCodes.n ^ condCodes.v);
1503646Srdreslin@umich.edu              case GreaterUnsigned:
1513646Srdreslin@umich.edu                return !(condCodes.c | condCodes.z);
1523646Srdreslin@umich.edu              case LessOrEqualUnsigned:
1533646Srdreslin@umich.edu                return (condCodes.c | condCodes.z);
1543646Srdreslin@umich.edu              case CarryClear:
1553646Srdreslin@umich.edu                return !condCodes.c;
1563646Srdreslin@umich.edu              case CarrySet:
1573646Srdreslin@umich.edu                return condCodes.c;
1583646Srdreslin@umich.edu              case Positive:
1593646Srdreslin@umich.edu                return !condCodes.n;
1603646Srdreslin@umich.edu              case Negative:
1613646Srdreslin@umich.edu                return condCodes.n;
1623646Srdreslin@umich.edu              case OverflowClear:
1633646Srdreslin@umich.edu                return !condCodes.v;
1643646Srdreslin@umich.edu              case OverflowSet:
1653646Srdreslin@umich.edu                return condCodes.v;
1663646Srdreslin@umich.edu            }
1673646Srdreslin@umich.edu            panic("Tried testing condition nonexistant "
1683646Srdreslin@umich.edu                    "condition code %d", condition);
1693646Srdreslin@umich.edu        }
1703646Srdreslin@umich.edu}};
1713646Srdreslin@umich.edu
1723646Srdreslin@umich.edu