registers.hh revision 11726
111723Sar4jc@virginia.edu/* 211723Sar4jc@virginia.edu * Copyright (c) 2013 ARM Limited 311723Sar4jc@virginia.edu * Copyright (c) 2014-2015 Sven Karlsson 411723Sar4jc@virginia.edu * All rights reserved 511723Sar4jc@virginia.edu * 611723Sar4jc@virginia.edu * The license below extends only to copyright in the software and shall 711723Sar4jc@virginia.edu * not be construed as granting a license to any other intellectual 811723Sar4jc@virginia.edu * property including but not limited to intellectual property relating 911723Sar4jc@virginia.edu * to a hardware implementation of the functionality of the software 1011723Sar4jc@virginia.edu * licensed hereunder. You may use the software subject to the license 1111723Sar4jc@virginia.edu * terms below provided that you ensure that this notice is replicated 1211723Sar4jc@virginia.edu * unmodified and in its entirety in all distributions of the software, 1311723Sar4jc@virginia.edu * modified or unmodified, in source code or in binary form. 1411723Sar4jc@virginia.edu * 1511723Sar4jc@virginia.edu * Copyright (c) 2016 RISC-V Foundation 1611723Sar4jc@virginia.edu * Copyright (c) 2016 The University of Virginia 1711723Sar4jc@virginia.edu * All rights reserved. 1811723Sar4jc@virginia.edu * 1911723Sar4jc@virginia.edu * Redistribution and use in source and binary forms, with or without 2011723Sar4jc@virginia.edu * modification, are permitted provided that the following conditions are 2111723Sar4jc@virginia.edu * met: redistributions of source code must retain the above copyright 2211723Sar4jc@virginia.edu * notice, this list of conditions and the following disclaimer; 2311723Sar4jc@virginia.edu * redistributions in binary form must reproduce the above copyright 2411723Sar4jc@virginia.edu * notice, this list of conditions and the following disclaimer in the 2511723Sar4jc@virginia.edu * documentation and/or other materials provided with the distribution; 2611723Sar4jc@virginia.edu * neither the name of the copyright holders nor the names of its 2711723Sar4jc@virginia.edu * contributors may be used to endorse or promote products derived from 2811723Sar4jc@virginia.edu * this software without specific prior written permission. 2911723Sar4jc@virginia.edu * 3011723Sar4jc@virginia.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 3111723Sar4jc@virginia.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 3211723Sar4jc@virginia.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 3311723Sar4jc@virginia.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 3411723Sar4jc@virginia.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3511723Sar4jc@virginia.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3611723Sar4jc@virginia.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3711723Sar4jc@virginia.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3811723Sar4jc@virginia.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3911723Sar4jc@virginia.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 4011723Sar4jc@virginia.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 4111723Sar4jc@virginia.edu * 4211723Sar4jc@virginia.edu * Authors: Andreas Hansson 4311723Sar4jc@virginia.edu * Sven Karlsson 4411723Sar4jc@virginia.edu * Alec Roelke 4511723Sar4jc@virginia.edu */ 4611723Sar4jc@virginia.edu 4711723Sar4jc@virginia.edu#ifndef __ARCH_RISCV_REGISTERS_HH__ 4811723Sar4jc@virginia.edu#define __ARCH_RISCV_REGISTERS_HH__ 4911723Sar4jc@virginia.edu 5011723Sar4jc@virginia.edu#include <map> 5111723Sar4jc@virginia.edu#include <string> 5211723Sar4jc@virginia.edu 5311723Sar4jc@virginia.edu#include "arch/riscv/generated/max_inst_regs.hh" 5411723Sar4jc@virginia.edu#include "base/types.hh" 5511723Sar4jc@virginia.edu#include "sim/system.hh" 5611723Sar4jc@virginia.edu 5711723Sar4jc@virginia.edunamespace RiscvISA { 5811723Sar4jc@virginia.edu 5911723Sar4jc@virginia.eduusing RiscvISAInst::MaxInstSrcRegs; 6011723Sar4jc@virginia.eduusing RiscvISAInst::MaxInstDestRegs; 6111723Sar4jc@virginia.educonst int MaxMiscDestRegs = 1; 6211723Sar4jc@virginia.edu 6311723Sar4jc@virginia.edutypedef uint_fast16_t RegIndex; 6411723Sar4jc@virginia.edutypedef uint64_t IntReg; 6511723Sar4jc@virginia.edutypedef uint64_t FloatRegBits; 6611723Sar4jc@virginia.edutypedef double FloatReg; 6711723Sar4jc@virginia.edutypedef uint8_t CCReg; // Not applicable to Riscv 6811723Sar4jc@virginia.edutypedef uint64_t MiscReg; 6911723Sar4jc@virginia.edu 7011723Sar4jc@virginia.educonst int NumIntArchRegs = 32; 7111726Sar4jc@virginia.educonst int NumMicroIntRegs = 1; 7211726Sar4jc@virginia.educonst int NumIntRegs = NumIntArchRegs + NumMicroIntRegs; 7311725Sar4jc@virginia.educonst int NumFloatRegs = 32; 7411723Sar4jc@virginia.educonst int NumCCRegs = 0; 7511723Sar4jc@virginia.educonst int NumMiscRegs = 4096; 7611723Sar4jc@virginia.edu 7711723Sar4jc@virginia.edu// These help enumerate all the registers for dependence tracking. 7811723Sar4jc@virginia.educonst int FP_Reg_Base = NumIntRegs; 7911723Sar4jc@virginia.educonst int CC_Reg_Base = FP_Reg_Base + NumFloatRegs; 8011723Sar4jc@virginia.educonst int Misc_Reg_Base = CC_Reg_Base + NumCCRegs; 8111723Sar4jc@virginia.educonst int Max_Reg_Index = Misc_Reg_Base + NumMiscRegs; 8211723Sar4jc@virginia.edu 8311723Sar4jc@virginia.edu// Semantically meaningful register indices 8411723Sar4jc@virginia.educonst int ZeroReg = 0; 8511723Sar4jc@virginia.educonst int ReturnAddrReg = 1; 8611723Sar4jc@virginia.educonst int StackPointerReg = 2; 8711723Sar4jc@virginia.educonst int GlobalPointerReg = 3; 8811723Sar4jc@virginia.educonst int ThreadPointerReg = 4; 8911723Sar4jc@virginia.educonst int FramePointerReg = 8; 9011723Sar4jc@virginia.educonst int ReturnValueRegs[] = {10, 11}; 9111723Sar4jc@virginia.educonst int ReturnValueReg = ReturnValueRegs[0]; 9211723Sar4jc@virginia.educonst int ArgumentRegs[] = {10, 11, 12, 13, 14, 15, 16, 17}; 9311726Sar4jc@virginia.educonst int AMOTempReg = 32; 9411723Sar4jc@virginia.edu 9511723Sar4jc@virginia.educonst char* const RegisterNames[] = {"zero", "ra", "sp", "gp", 9611723Sar4jc@virginia.edu "tp", "t0", "t1", "t2", 9711723Sar4jc@virginia.edu "s0", "s1", "a0", "a1", 9811723Sar4jc@virginia.edu "a2", "a3", "a4", "a5", 9911723Sar4jc@virginia.edu "a6", "a7", "s2", "s3", 10011723Sar4jc@virginia.edu "s4", "s5", "s6", "s7", 10111723Sar4jc@virginia.edu "s8", "s9", "s10", "s11", 10211723Sar4jc@virginia.edu "t3", "t4", "t5", "t6"}; 10311723Sar4jc@virginia.edu 10411723Sar4jc@virginia.educonst int SyscallNumReg = ArgumentRegs[7]; 10511723Sar4jc@virginia.educonst int SyscallArgumentRegs[] = {ArgumentRegs[0], ArgumentRegs[1], 10611723Sar4jc@virginia.edu ArgumentRegs[2], ArgumentRegs[3]}; 10711723Sar4jc@virginia.educonst int SyscallPseudoReturnReg = ReturnValueRegs[0]; 10811723Sar4jc@virginia.edu 10911723Sar4jc@virginia.eduenum MiscRegIndex { 11011723Sar4jc@virginia.edu MISCREG_FFLAGS = 0x001, 11111723Sar4jc@virginia.edu MISCREG_FRM = 0x002, 11211723Sar4jc@virginia.edu MISCREG_FCSR = 0x003, 11311723Sar4jc@virginia.edu MISCREG_CYCLE = 0xC00, 11411723Sar4jc@virginia.edu MISCREG_TIME = 0xC01, 11511723Sar4jc@virginia.edu MISCREG_INSTRET = 0xC02, 11611723Sar4jc@virginia.edu MISCREG_CYCLEH = 0xC80, 11711723Sar4jc@virginia.edu MISCREG_TIMEH = 0xC81, 11811723Sar4jc@virginia.edu MISCREG_INSTRETH = 0xC82, 11911723Sar4jc@virginia.edu 12011723Sar4jc@virginia.edu MISCREG_SSTATUS = 0x100, 12111723Sar4jc@virginia.edu MISCREG_STVEC = 0x101, 12211723Sar4jc@virginia.edu MISCREG_SIE = 0x104, 12311723Sar4jc@virginia.edu MISCREG_STIMECMP = 0x121, 12411723Sar4jc@virginia.edu MISCREG_STIME = 0xD01, 12511723Sar4jc@virginia.edu MISCREG_STIMEH = 0xD81, 12611723Sar4jc@virginia.edu MISCREG_SSCRATCH = 0x140, 12711723Sar4jc@virginia.edu MISCREG_SEPC = 0x141, 12811723Sar4jc@virginia.edu MISCREG_SCAUSE = 0xD42, 12911723Sar4jc@virginia.edu MISCREG_SBADADDR = 0xD43, 13011723Sar4jc@virginia.edu MISCREG_SIP = 0x144, 13111723Sar4jc@virginia.edu MISCREG_SPTBR = 0x180, 13211723Sar4jc@virginia.edu MISCREG_SASID = 0x181, 13311723Sar4jc@virginia.edu MISCREG_CYCLEW = 0x900, 13411723Sar4jc@virginia.edu MISCREG_TIMEW = 0x901, 13511723Sar4jc@virginia.edu MISCREG_INSTRETW = 0x902, 13611723Sar4jc@virginia.edu MISCREG_CYCLEHW = 0x980, 13711723Sar4jc@virginia.edu MISCREG_TIMEHW = 0x981, 13811723Sar4jc@virginia.edu MISCREG_INSTRETHW = 0x982, 13911723Sar4jc@virginia.edu 14011723Sar4jc@virginia.edu MISCREG_HSTATUS = 0x200, 14111723Sar4jc@virginia.edu MISCREG_HTVEC = 0x201, 14211723Sar4jc@virginia.edu MISCREG_HTDELEG = 0x202, 14311723Sar4jc@virginia.edu MISCREG_HTIMECMP = 0x221, 14411723Sar4jc@virginia.edu MISCREG_HTIME = 0xE01, 14511723Sar4jc@virginia.edu MISCREG_HTIMEH = 0xE81, 14611723Sar4jc@virginia.edu MISCREG_HSCRATCH = 0x240, 14711723Sar4jc@virginia.edu MISCREG_HEPC = 0x241, 14811723Sar4jc@virginia.edu MISCREG_HCAUSE = 0x242, 14911723Sar4jc@virginia.edu MISCREG_HBADADDR = 0x243, 15011723Sar4jc@virginia.edu MISCREG_STIMEW = 0xA01, 15111723Sar4jc@virginia.edu MISCREG_STIMEHW = 0xA81, 15211723Sar4jc@virginia.edu 15311723Sar4jc@virginia.edu MISCREG_MCPUID = 0xF00, 15411723Sar4jc@virginia.edu MISCREG_MIMPID = 0xF01, 15511723Sar4jc@virginia.edu MISCREG_MHARTID = 0xF10, 15611723Sar4jc@virginia.edu MISCREG_MSTATUS = 0x300, 15711723Sar4jc@virginia.edu MISCREG_MTVEC = 0x301, 15811723Sar4jc@virginia.edu MISCREG_MTDELEG = 0x302, 15911723Sar4jc@virginia.edu MISCREG_MIE = 0x304, 16011723Sar4jc@virginia.edu MISCREG_MTIMECMP = 0x321, 16111723Sar4jc@virginia.edu MISCREG_MTIME = 0x701, 16211723Sar4jc@virginia.edu MISCREG_MTIMEH = 0x741, 16311723Sar4jc@virginia.edu MISCREG_MSCRATCH = 0x340, 16411723Sar4jc@virginia.edu MISCREG_MEPC = 0x341, 16511723Sar4jc@virginia.edu MISCREG_MCAUSE = 0x342, 16611723Sar4jc@virginia.edu MISCREG_MBADADDR = 0x343, 16711723Sar4jc@virginia.edu MISCREG_MIP = 0x344, 16811723Sar4jc@virginia.edu MISCREG_MBASE = 0x380, 16911723Sar4jc@virginia.edu MISCREG_MBOUND = 0x381, 17011723Sar4jc@virginia.edu MISCREG_MIBASE = 0x382, 17111723Sar4jc@virginia.edu MISCREG_MIBOUND = 0x383, 17211723Sar4jc@virginia.edu MISCREG_MDBASE = 0x384, 17311723Sar4jc@virginia.edu MISCREG_MDBOUND = 0x385, 17411723Sar4jc@virginia.edu MISCREG_HTIMEW = 0xB01, 17511723Sar4jc@virginia.edu MISCREG_HTIMEHW = 0xB81, 17611723Sar4jc@virginia.edu MISCREG_MTOHOST = 0x780, 17711723Sar4jc@virginia.edu MISCREG_MFROMHOST = 0x781 17811723Sar4jc@virginia.edu}; 17911723Sar4jc@virginia.edu 18011723Sar4jc@virginia.edu} 18111723Sar4jc@virginia.edu 18211723Sar4jc@virginia.edu#endif // __ARCH_RISCV_REGISTERS_HH__ 183