faults.cc revision 11725
111723Sar4jc@virginia.edu/* 211723Sar4jc@virginia.edu * Copyright (c) 2016 RISC-V Foundation 311723Sar4jc@virginia.edu * Copyright (c) 2016 The University of Virginia 411723Sar4jc@virginia.edu * All rights reserved. 511723Sar4jc@virginia.edu * 611723Sar4jc@virginia.edu * Redistribution and use in source and binary forms, with or without 711723Sar4jc@virginia.edu * modification, are permitted provided that the following conditions are 811723Sar4jc@virginia.edu * met: redistributions of source code must retain the above copyright 911723Sar4jc@virginia.edu * notice, this list of conditions and the following disclaimer; 1011723Sar4jc@virginia.edu * redistributions in binary form must reproduce the above copyright 1111723Sar4jc@virginia.edu * notice, this list of conditions and the following disclaimer in the 1211723Sar4jc@virginia.edu * documentation and/or other materials provided with the distribution; 1311723Sar4jc@virginia.edu * neither the name of the copyright holders nor the names of its 1411723Sar4jc@virginia.edu * contributors may be used to endorse or promote products derived from 1511723Sar4jc@virginia.edu * this software without specific prior written permission. 1611723Sar4jc@virginia.edu * 1711723Sar4jc@virginia.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1811723Sar4jc@virginia.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1911723Sar4jc@virginia.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2011723Sar4jc@virginia.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2111723Sar4jc@virginia.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 2211723Sar4jc@virginia.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 2311723Sar4jc@virginia.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 2411723Sar4jc@virginia.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 2511723Sar4jc@virginia.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 2611723Sar4jc@virginia.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 2711723Sar4jc@virginia.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 2811723Sar4jc@virginia.edu * 2911723Sar4jc@virginia.edu * Authors: Alec Roelke 3011723Sar4jc@virginia.edu */ 3111723Sar4jc@virginia.edu#include "arch/riscv/faults.hh" 3211723Sar4jc@virginia.edu 3311723Sar4jc@virginia.edu#include "arch/riscv/utility.hh" 3411723Sar4jc@virginia.edu#include "cpu/thread_context.hh" 3511723Sar4jc@virginia.edu#include "sim/debug.hh" 3611723Sar4jc@virginia.edu#include "sim/full_system.hh" 3711723Sar4jc@virginia.edu 3811723Sar4jc@virginia.eduusing namespace RiscvISA; 3911723Sar4jc@virginia.edu 4011723Sar4jc@virginia.eduvoid 4111723Sar4jc@virginia.eduRiscvFault::invoke_se(ThreadContext *tc, const StaticInstPtr &inst) 4211723Sar4jc@virginia.edu{ 4311723Sar4jc@virginia.edu panic("Fault %s encountered at pc 0x%016llx.", name(), tc->pcState().pc()); 4411723Sar4jc@virginia.edu} 4511723Sar4jc@virginia.edu 4611723Sar4jc@virginia.eduvoid 4711723Sar4jc@virginia.eduRiscvFault::invoke(ThreadContext *tc, const StaticInstPtr &inst) 4811723Sar4jc@virginia.edu{ 4911723Sar4jc@virginia.edu if (FullSystem) { 5011723Sar4jc@virginia.edu panic("Full system mode not supported for RISC-V."); 5111723Sar4jc@virginia.edu } else { 5211723Sar4jc@virginia.edu invoke_se(tc, inst); 5311723Sar4jc@virginia.edu PCState pcState = tc->pcState(); 5411723Sar4jc@virginia.edu advancePC(pcState, inst); 5511723Sar4jc@virginia.edu tc->pcState(pcState); 5611723Sar4jc@virginia.edu } 5711723Sar4jc@virginia.edu} 5811723Sar4jc@virginia.edu 5911723Sar4jc@virginia.eduvoid 6011723Sar4jc@virginia.eduUnknownInstFault::invoke_se(ThreadContext *tc, const StaticInstPtr &inst) 6111723Sar4jc@virginia.edu{ 6211723Sar4jc@virginia.edu panic("Unknown instruction 0x%08x at pc 0x%016llx", inst->machInst, 6311723Sar4jc@virginia.edu tc->pcState().pc()); 6411723Sar4jc@virginia.edu} 6511723Sar4jc@virginia.edu 6611723Sar4jc@virginia.eduvoid 6711723Sar4jc@virginia.eduUnimplementedFault::invoke_se(ThreadContext *tc, 6811723Sar4jc@virginia.edu const StaticInstPtr &inst) 6911723Sar4jc@virginia.edu{ 7011723Sar4jc@virginia.edu panic("Unimplemented instruction %s at pc 0x%016llx", instName, 7111723Sar4jc@virginia.edu tc->pcState().pc()); 7211723Sar4jc@virginia.edu} 7311723Sar4jc@virginia.edu 7411723Sar4jc@virginia.eduvoid 7511725Sar4jc@virginia.eduIllegalFrmFault::invoke_se(ThreadContext *tc, const StaticInstPtr &inst) 7611725Sar4jc@virginia.edu{ 7711725Sar4jc@virginia.edu panic("Illegal floating-point rounding mode 0x%x at pc 0x%016llx.", 7811725Sar4jc@virginia.edu frm, tc->pcState().pc()); 7911725Sar4jc@virginia.edu} 8011725Sar4jc@virginia.edu 8111725Sar4jc@virginia.eduvoid 8211723Sar4jc@virginia.eduBreakpointFault::invoke_se(ThreadContext *tc, const StaticInstPtr &inst) 8311723Sar4jc@virginia.edu{ 8411723Sar4jc@virginia.edu schedRelBreak(0); 8511723Sar4jc@virginia.edu} 8611723Sar4jc@virginia.edu 8711723Sar4jc@virginia.eduvoid 8811723Sar4jc@virginia.eduSyscallFault::invoke_se(ThreadContext *tc, const StaticInstPtr &inst) 8911723Sar4jc@virginia.edu{ 9011723Sar4jc@virginia.edu tc->syscall(tc->readIntReg(SyscallNumReg)); 9111723Sar4jc@virginia.edu} 92