utility.cc revision 13611
15086Sgblack@eecs.umich.edu/*
25086Sgblack@eecs.umich.edu * Copyright (c) 2003-2005 The Regents of The University of Michigan
35086Sgblack@eecs.umich.edu * Copyright (c) 2007-2008 The Florida State University
45086Sgblack@eecs.umich.edu * Copyright (c) 2009 The University of Edinburgh
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85086Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are
95086Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright
105086Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer;
115086Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright
125086Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the
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165086Sgblack@eecs.umich.edu * this software without specific prior written permission.
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185086Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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295086Sgblack@eecs.umich.edu *
305086Sgblack@eecs.umich.edu * Authors: Korey Sewell
315086Sgblack@eecs.umich.edu *          Stephen Hines
325086Sgblack@eecs.umich.edu *          Timothy M. Jones
335086Sgblack@eecs.umich.edu */
345086Sgblack@eecs.umich.edu
355086Sgblack@eecs.umich.edu#include "arch/power/utility.hh"
365086Sgblack@eecs.umich.edu
375086Sgblack@eecs.umich.edu#include "base/logging.hh"
385086Sgblack@eecs.umich.edu
395086Sgblack@eecs.umich.edunamespace PowerISA {
405086Sgblack@eecs.umich.edu
415086Sgblack@eecs.umich.eduvoid
425086Sgblack@eecs.umich.educopyRegs(ThreadContext *src, ThreadContext *dest)
435086Sgblack@eecs.umich.edu{
445086Sgblack@eecs.umich.edu    // First loop through the integer registers.
455086Sgblack@eecs.umich.edu    for (int i = 0; i < NumIntRegs; ++i)
465086Sgblack@eecs.umich.edu        dest->setIntReg(i, src->readIntReg(i));
475086Sgblack@eecs.umich.edu
485086Sgblack@eecs.umich.edu    // Then loop through the floating point registers.
495086Sgblack@eecs.umich.edu    for (int i = 0; i < NumFloatRegs; ++i)
505086Sgblack@eecs.umich.edu        dest->setFloatReg(i, src->readFloatReg(i));
515086Sgblack@eecs.umich.edu
525086Sgblack@eecs.umich.edu    // Would need to add condition-code regs if implemented
535086Sgblack@eecs.umich.edu    assert(NumCCRegs == 0);
545086Sgblack@eecs.umich.edu
555086Sgblack@eecs.umich.edu    // Copy misc. registers
565086Sgblack@eecs.umich.edu    copyMiscRegs(src, dest);
575086Sgblack@eecs.umich.edu
585135Sgblack@eecs.umich.edu    // Lastly copy PC/NPC
595135Sgblack@eecs.umich.edu    dest->pcState(src->pcState());
605135Sgblack@eecs.umich.edu}
615086Sgblack@eecs.umich.edu
625135Sgblack@eecs.umich.eduuint64_t
635234Sgblack@eecs.umich.edugetArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
645086Sgblack@eecs.umich.edu{
655086Sgblack@eecs.umich.edu    panic("getArgument not implemented for POWER.\n");
665086Sgblack@eecs.umich.edu    return 0;
675086Sgblack@eecs.umich.edu}
685086Sgblack@eecs.umich.edu
695086Sgblack@eecs.umich.eduvoid
705086Sgblack@eecs.umich.eduskipFunction(ThreadContext *tc)
715086Sgblack@eecs.umich.edu{
725086Sgblack@eecs.umich.edu    panic("Not Implemented for POWER");
735086Sgblack@eecs.umich.edu}
745086Sgblack@eecs.umich.edu
755135Sgblack@eecs.umich.eduvoid
765135Sgblack@eecs.umich.eduinitCPU(ThreadContext *tc, int cpuId)
775135Sgblack@eecs.umich.edu{
785135Sgblack@eecs.umich.edu    panic("initCPU not implemented for POWER.\n");
795135Sgblack@eecs.umich.edu}
805135Sgblack@eecs.umich.edu
815135Sgblack@eecs.umich.edu
825135Sgblack@eecs.umich.edu} // namespace PowerISA
835135Sgblack@eecs.umich.edu