registers.hh revision 8961:ff4762285f99
1/* 2 * Copyright (c) 2009 The University of Edinburgh 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Timothy M. Jones 29 */ 30 31#ifndef __ARCH_POWER_REGISTERS_HH__ 32#define __ARCH_POWER_REGISTERS_HH__ 33 34#include "arch/power/generated/max_inst_regs.hh" 35#include "arch/power/miscregs.hh" 36 37namespace PowerISA { 38 39using PowerISAInst::MaxInstSrcRegs; 40using PowerISAInst::MaxInstDestRegs; 41 42typedef uint8_t RegIndex; 43 44typedef uint64_t IntReg; 45 46// Floating point register file entry type 47typedef uint64_t FloatRegBits; 48typedef double FloatReg; 49typedef uint64_t MiscReg; 50 51// Constants Related to the number of registers 52const int NumIntArchRegs = 32; 53 54// CR, XER, LR, CTR, FPSCR, RSV, RSV-LEN, RSV-ADDR 55// and zero register, which doesn't actually exist but needs a number 56const int NumIntSpecialRegs = 9; 57const int NumFloatArchRegs = 32; 58const int NumFloatSpecialRegs = 0; 59const int NumInternalProcRegs = 0; 60 61const int NumIntRegs = NumIntArchRegs + NumIntSpecialRegs; 62const int NumFloatRegs = NumFloatArchRegs + NumFloatSpecialRegs; 63const int NumMiscRegs = NUM_MISCREGS; 64 65// Semantically meaningful register indices 66const int ReturnValueReg = 3; 67const int ArgumentReg0 = 3; 68const int ArgumentReg1 = 4; 69const int ArgumentReg2 = 5; 70const int ArgumentReg3 = 6; 71const int ArgumentReg4 = 7; 72const int FramePointerReg = 31; 73const int StackPointerReg = 1; 74 75// There isn't one in Power, but we need to define one somewhere 76const int ZeroReg = NumIntRegs - 1; 77 78const int SyscallNumReg = 0; 79const int SyscallPseudoReturnReg = 3; 80const int SyscallSuccessReg = 3; 81 82// These help enumerate all the registers for dependence tracking. 83const int FP_Base_DepTag = NumIntRegs; 84const int Ctrl_Base_DepTag = FP_Base_DepTag + NumFloatRegs; 85const int Max_DepTag = Ctrl_Base_DepTag + NumMiscRegs; 86 87typedef union { 88 IntReg intreg; 89 FloatReg fpreg; 90 MiscReg ctrlreg; 91} AnyReg; 92 93enum MiscIntRegNums { 94 INTREG_CR = NumIntArchRegs, 95 INTREG_XER, 96 INTREG_LR, 97 INTREG_CTR, 98 INTREG_FPSCR, 99 INTREG_RSV, 100 INTREG_RSV_LEN, 101 INTREG_RSV_ADDR 102}; 103 104} // namespace PowerISA 105 106#endif // __ARCH_POWER_REGISTERS_HH__ 107