isa_traits.hh revision 6691:cd68b6ecd68d
1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * Copyright (c) 2007-2008 The Florida State University 4 * Copyright (c) 2009 The University of Edinburgh 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions are 9 * met: redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer; 11 * redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution; 14 * neither the name of the copyright holders nor the names of its 15 * contributors may be used to endorse or promote products derived from 16 * this software without specific prior written permission. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 21 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 22 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 23 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 24 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 25 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 26 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 27 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 28 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 29 * 30 * Authors: Timothy M. Jones 31 * Gabe Black 32 * Stephen Hines 33 */ 34 35#ifndef __ARCH_POWER_ISA_TRAITS_HH__ 36#define __ARCH_POWER_ISA_TRAITS_HH__ 37 38#include "arch/power/types.hh" 39#include "base/types.hh" 40 41namespace BigEndianGuest {}; 42 43class StaticInstPtr; 44 45namespace PowerISA 46{ 47 48using namespace BigEndianGuest; 49 50StaticInstPtr decodeInst(ExtMachInst); 51 52// POWER DOES NOT have a delay slot 53#define ISA_HAS_DELAY_SLOT 0 54 55const Addr PageShift = 12; 56const Addr PageBytes = ULL(1) << PageShift; 57const Addr Page_Mask = ~(PageBytes - 1); 58const Addr PageOffset = PageBytes - 1; 59 60const Addr PteShift = 3; 61const Addr NPtePageShift = PageShift - PteShift; 62const Addr NPtePage = ULL(1) << NPtePageShift; 63const Addr PteMask = NPtePage - 1; 64 65const int LogVMPageSize = 12; // 4K bytes 66const int VMPageSize = (1 << LogVMPageSize); 67 68const int MachineBytes = 4; 69 70// This is ori 0, 0, 0 71const ExtMachInst NoopMachInst = 0x60000000; 72 73} // PowerISA namespace 74 75#endif // __ARCH_POWER_ISA_TRAITS_HH__ 76