interrupts.hh revision 11566
18745Sgblack@eecs.umich.edu/* 28745Sgblack@eecs.umich.edu * Copyright (c) 2011 Google 38745Sgblack@eecs.umich.edu * All rights reserved. 48745Sgblack@eecs.umich.edu * 58745Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 68745Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 78745Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 88745Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 98745Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 108745Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 118745Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 128745Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 138745Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 148745Sgblack@eecs.umich.edu * this software without specific prior written permission. 158745Sgblack@eecs.umich.edu * 168745Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 178745Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 188745Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 198745Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 208745Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 218745Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 228745Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 238745Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 248745Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 258745Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 268745Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 278745Sgblack@eecs.umich.edu * 288745Sgblack@eecs.umich.edu * Authors: Gabe Black 298745Sgblack@eecs.umich.edu */ 308745Sgblack@eecs.umich.edu 318745Sgblack@eecs.umich.edu#ifndef __ARCH_POWER_INTERRUPT_HH__ 328745Sgblack@eecs.umich.edu#define __ARCH_POWER_INTERRUPT_HH__ 338745Sgblack@eecs.umich.edu 348745Sgblack@eecs.umich.edu#include "base/misc.hh" 358745Sgblack@eecs.umich.edu#include "params/PowerInterrupts.hh" 368745Sgblack@eecs.umich.edu#include "sim/sim_object.hh" 378745Sgblack@eecs.umich.edu 388745Sgblack@eecs.umich.educlass ThreadContext; 398745Sgblack@eecs.umich.edu 408745Sgblack@eecs.umich.edunamespace PowerISA { 418745Sgblack@eecs.umich.edu 428745Sgblack@eecs.umich.educlass Interrupts : public SimObject 438745Sgblack@eecs.umich.edu{ 448745Sgblack@eecs.umich.edu private: 458745Sgblack@eecs.umich.edu BaseCPU * cpu; 468745Sgblack@eecs.umich.edu 478745Sgblack@eecs.umich.edu public: 488745Sgblack@eecs.umich.edu typedef PowerInterruptsParams Params; 498745Sgblack@eecs.umich.edu 508745Sgblack@eecs.umich.edu const Params * 518745Sgblack@eecs.umich.edu params() const 528745Sgblack@eecs.umich.edu { 538745Sgblack@eecs.umich.edu return dynamic_cast<const Params *>(_params); 548745Sgblack@eecs.umich.edu } 558745Sgblack@eecs.umich.edu 568745Sgblack@eecs.umich.edu Interrupts(Params * p) : SimObject(p), cpu(NULL) 578745Sgblack@eecs.umich.edu {} 588745Sgblack@eecs.umich.edu 598745Sgblack@eecs.umich.edu void 608745Sgblack@eecs.umich.edu setCPU(BaseCPU * _cpu) 618745Sgblack@eecs.umich.edu { 628745Sgblack@eecs.umich.edu cpu = _cpu; 638745Sgblack@eecs.umich.edu } 648745Sgblack@eecs.umich.edu 658745Sgblack@eecs.umich.edu void 668745Sgblack@eecs.umich.edu post(int int_num, int index) 678745Sgblack@eecs.umich.edu { 688745Sgblack@eecs.umich.edu panic("Interrupts::post not implemented.\n"); 698745Sgblack@eecs.umich.edu } 708745Sgblack@eecs.umich.edu 718745Sgblack@eecs.umich.edu void 728745Sgblack@eecs.umich.edu clear(int int_num, int index) 738745Sgblack@eecs.umich.edu { 748745Sgblack@eecs.umich.edu panic("Interrupts::clear not implemented.\n"); 758745Sgblack@eecs.umich.edu } 768745Sgblack@eecs.umich.edu 778745Sgblack@eecs.umich.edu void 788745Sgblack@eecs.umich.edu clearAll() 798745Sgblack@eecs.umich.edu { 808745Sgblack@eecs.umich.edu panic("Interrupts::clearAll not implemented.\n"); 818745Sgblack@eecs.umich.edu } 828745Sgblack@eecs.umich.edu 838745Sgblack@eecs.umich.edu bool 848745Sgblack@eecs.umich.edu checkInterrupts(ThreadContext *tc) const 858745Sgblack@eecs.umich.edu { 868745Sgblack@eecs.umich.edu panic("Interrupts::checkInterrupts not implemented.\n"); 878745Sgblack@eecs.umich.edu } 888745Sgblack@eecs.umich.edu 898745Sgblack@eecs.umich.edu Fault 908745Sgblack@eecs.umich.edu getInterrupt(ThreadContext *tc) 918745Sgblack@eecs.umich.edu { 9211566Smitch.hayenga@arm.com assert(checkInterrupts(tc)); 938745Sgblack@eecs.umich.edu panic("Interrupts::getInterrupt not implemented.\n"); 948745Sgblack@eecs.umich.edu } 958745Sgblack@eecs.umich.edu 968745Sgblack@eecs.umich.edu void 978745Sgblack@eecs.umich.edu updateIntrInfo(ThreadContext *tc) 988745Sgblack@eecs.umich.edu { 998745Sgblack@eecs.umich.edu panic("Interrupts::updateIntrInfo not implemented.\n"); 1008745Sgblack@eecs.umich.edu } 1018745Sgblack@eecs.umich.edu}; 1028745Sgblack@eecs.umich.edu 1038745Sgblack@eecs.umich.edu} // namespace PowerISA 1048745Sgblack@eecs.umich.edu 1058745Sgblack@eecs.umich.edu#endif // __ARCH_POWER_INTERRUPT_HH__ 1068745Sgblack@eecs.umich.edu 107