static_inst.cc revision 9913:7f43babfde6a
12221SN/A/* 22221SN/A * Copyright (c) 2009 The University of Edinburgh 32221SN/A * Copyright (c) 2013 Advanced Micro Devices, Inc. 42221SN/A * All rights reserved. 52221SN/A * 62221SN/A * Redistribution and use in source and binary forms, with or without 72221SN/A * modification, are permitted provided that the following conditions are 82221SN/A * met: redistributions of source code must retain the above copyright 92221SN/A * notice, this list of conditions and the following disclaimer; 102221SN/A * redistributions in binary form must reproduce the above copyright 112221SN/A * notice, this list of conditions and the following disclaimer in the 122221SN/A * documentation and/or other materials provided with the distribution; 132221SN/A * neither the name of the copyright holders nor the names of its 142221SN/A * contributors may be used to endorse or promote products derived from 152221SN/A * this software without specific prior written permission. 162221SN/A * 172221SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182221SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192221SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202221SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212221SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222221SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232221SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242221SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252221SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262221SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272665Ssaidi@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu * 292665Ssaidi@eecs.umich.edu * Authors: Timothy M. Jones 302221SN/A */ 312221SN/A 323890Ssaidi@eecs.umich.edu#include "arch/power/insts/static_inst.hh" 333890Ssaidi@eecs.umich.edu#include "cpu/reg_class.hh" 342221SN/A 357678Sgblack@eecs.umich.eduusing namespace PowerISA; 362221SN/A 372221SN/Avoid 382221SN/APowerStaticInst::printReg(std::ostream &os, int reg) const 392221SN/A{ 402223SN/A RegIndex rel_reg; 412221SN/A 422221SN/A switch (regIdxToClass(reg, &rel_reg)) { 433415Sgblack@eecs.umich.edu case IntRegClass: 443415Sgblack@eecs.umich.edu ccprintf(os, "r%d", rel_reg); 452221SN/A break; 464997Sgblack@eecs.umich.edu case FloatRegClass: 474997Sgblack@eecs.umich.edu ccprintf(os, "f%d", rel_reg); 483573Sgblack@eecs.umich.edu break; 492221SN/A case MiscRegClass: 502221SN/A switch (rel_reg) { 513576Sgblack@eecs.umich.edu case 0: ccprintf(os, "cr"); break; 523576Sgblack@eecs.umich.edu case 1: ccprintf(os, "xer"); break; 533576Sgblack@eecs.umich.edu case 2: ccprintf(os, "lr"); break; 543576Sgblack@eecs.umich.edu case 3: ccprintf(os, "ctr"); break; 553576Sgblack@eecs.umich.edu default: ccprintf(os, "unknown_reg"); 563576Sgblack@eecs.umich.edu break; 573576Sgblack@eecs.umich.edu } 583576Sgblack@eecs.umich.edu } 593576Sgblack@eecs.umich.edu} 603573Sgblack@eecs.umich.edu 613573Sgblack@eecs.umich.edustd::string 623573Sgblack@eecs.umich.eduPowerStaticInst::generateDisassembly(Addr pc, 633573Sgblack@eecs.umich.edu const SymbolTable *symtab) const 643573Sgblack@eecs.umich.edu{ 653576Sgblack@eecs.umich.edu std::stringstream ss; 663573Sgblack@eecs.umich.edu 673573Sgblack@eecs.umich.edu ccprintf(ss, "%-10s ", mnemonic); 687678Sgblack@eecs.umich.edu 697678Sgblack@eecs.umich.edu return ss.str(); 702223SN/A} 712223SN/A