static_inst.cc revision 11793
1/* 2 * Copyright (c) 2009 The University of Edinburgh 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer; 10 * redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution; 13 * neither the name of the copyright holders nor the names of its 14 * contributors may be used to endorse or promote products derived from 15 * this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 28 * 29 * Authors: Timothy M. Jones 30 */ 31 32#include "arch/power/insts/static_inst.hh" 33 34#include "cpu/reg_class.hh" 35 36using namespace PowerISA; 37 38void 39PowerStaticInst::printReg(std::ostream &os, int reg) const 40{ 41 RegIndex rel_reg; 42 43 switch (regIdxToClass(reg, &rel_reg)) { 44 case IntRegClass: 45 ccprintf(os, "r%d", rel_reg); 46 break; 47 case FloatRegClass: 48 ccprintf(os, "f%d", rel_reg); 49 break; 50 case MiscRegClass: 51 switch (rel_reg) { 52 case 0: ccprintf(os, "cr"); break; 53 case 1: ccprintf(os, "xer"); break; 54 case 2: ccprintf(os, "lr"); break; 55 case 3: ccprintf(os, "ctr"); break; 56 default: ccprintf(os, "unknown_reg"); 57 break; 58 } 59 case CCRegClass: 60 panic("printReg: POWER does not implement CCRegClass\n"); 61 } 62} 63 64std::string 65PowerStaticInst::generateDisassembly(Addr pc, 66 const SymbolTable *symtab) const 67{ 68 std::stringstream ss; 69 70 ccprintf(ss, "%-10s ", mnemonic); 71 72 return ss.str(); 73} 74