mem.cc revision 6691
1/* 2 * Copyright (c) 2009 The University of Edinburgh 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Timothy M. Jones 29 */ 30 31#include "arch/power/insts/mem.hh" 32#include "base/loader/symtab.hh" 33 34using namespace PowerISA; 35 36std::string 37MemOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 38{ 39 return csprintf("%-10s", mnemonic); 40} 41 42std::string 43MemDispOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const 44{ 45 std::stringstream ss; 46 47 ccprintf(ss, "%-10s ", mnemonic); 48 49 // Print the destination only for a load 50 if (!flags[IsStore]) { 51 if (_numDestRegs > 0) { 52 53 // If the instruction updates the source register with the 54 // EA, then this source register is placed in position 0, 55 // therefore we print the last destination register. 56 printReg(ss, _destRegIdx[_numDestRegs-1]); 57 } 58 } 59 60 // Print the data register for a store 61 else { 62 printReg(ss, _srcRegIdx[1]); 63 } 64 65 // Print the displacement 66 ss << ", " << (int32_t)disp; 67 68 // Print the address register 69 ss << "("; 70 printReg(ss, _srcRegIdx[0]); 71 ss << ")"; 72 73 return ss.str(); 74} 75