decoder.hh revision 9023:e9201a7bce59
1/* 2 * Copyright (c) 2012 Google 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#ifndef __ARCH_POWER_DECODER_HH__ 32#define __ARCH_POWER_DECODER_HH__ 33 34#include "arch/types.hh" 35#include "cpu/decode_cache.hh" 36#include "cpu/static_inst_fwd.hh" 37 38namespace PowerISA 39{ 40 41class Decoder 42{ 43 protected: 44 ThreadContext * tc; 45 46 // The extended machine instruction being generated 47 ExtMachInst emi; 48 bool instDone; 49 50 public: 51 Decoder(ThreadContext * _tc) : tc(_tc), instDone(false) 52 { 53 } 54 55 ThreadContext * 56 getTC() 57 { 58 return tc; 59 } 60 61 void 62 setTC(ThreadContext * _tc) 63 { 64 tc = _tc; 65 } 66 67 void 68 process() 69 { 70 } 71 72 void 73 reset() 74 { 75 instDone = false; 76 } 77 78 // Use this to give data to the predecoder. This should be used 79 // when there is control flow. 80 void 81 moreBytes(const PCState &pc, Addr fetchPC, MachInst inst) 82 { 83 emi = inst; 84 instDone = true; 85 } 86 87 // Use this to give data to the predecoder. This should be used 88 // when instructions are executed in order. 89 void 90 moreBytes(MachInst machInst) 91 { 92 moreBytes(0, 0, machInst); 93 } 94 95 bool 96 needMoreBytes() 97 { 98 return true; 99 } 100 101 bool 102 instReady() 103 { 104 return instDone; 105 } 106 protected: 107 /// A cache of decoded instruction objects. 108 static DecodeCache defaultCache; 109 110 public: 111 StaticInstPtr decodeInst(ExtMachInst mach_inst); 112 113 /// Decode a machine instruction. 114 /// @param mach_inst The binary instruction to decode. 115 /// @retval A pointer to the corresponding StaticInst object. 116 StaticInstPtr 117 decode(ExtMachInst mach_inst, Addr addr) 118 { 119 return defaultCache.decode(this, mach_inst, addr); 120 } 121 122 StaticInstPtr 123 decode(PowerISA::PCState &nextPC) 124 { 125 if (!instDone) 126 return NULL; 127 instDone = false; 128 return decode(emi, nextPC.instAddr()); 129 } 130}; 131 132} // namespace PowerISA 133 134#endif // __ARCH_POWER_DECODER_HH__ 135