utility.hh revision 4194 
1/*
2 * Copyright (c) 2003-2005 The Regents of The University of Michigan
3 * Copyright (c) 2007 MIPS Technologies, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Nathan Binkert
30 *          Steve Reinhardt
31 *          Korey Sewell
32 */
33
34#ifndef __ARCH_MIPS_UTILITY_HH__
35#define __ARCH_MIPS_UTILITY_HH__
36
37#include "arch/mips/types.hh"
38#include "base/misc.hh"
39#include "config/full_system.hh"
40#include "cpu/thread_context.hh"
41//XXX This is needed for size_t. We should use something other than size_t
42//#include "kern/linux/linux.hh"
43#include "sim/host.hh"
44
45class ThreadContext;
46
47namespace MipsISA {
48
49    //Floating Point Utility Functions
50    uint64_t fpConvert(ConvertType cvt_type, double fp_val);
51    double roundFP(double val, int digits);
52    double truncFP(double val);
53
54    bool getCondCode(uint32_t fcsr, int cc);
55    uint32_t genCCVector(uint32_t fcsr, int num, uint32_t cc_val);
56    uint32_t genInvalidVector(uint32_t fcsr);
57
58    bool isNan(void *val_ptr, int size);
59    bool isQnan(void *val_ptr, int size);
60    bool isSnan(void *val_ptr, int size);
61
62    /**
63     * Function to insure ISA semantics about 0 registers.
64     * @param tc The thread context.
65     */
66    template <class TC>
67    void zeroRegisters(TC *tc);
68
69    void copyRegs(ThreadContext *src, ThreadContext *dest);
70
71    // Instruction address compression hooks
72    static inline Addr realPCToFetchPC(const Addr &addr) {
73        return addr;
74    }
75
76    static inline Addr fetchPCToRealPC(const Addr &addr) {
77        return addr;
78    }
79
80    // the size of "fetched" instructions (not necessarily the size
81    // of real instructions for PISA)
82    static inline size_t fetchInstSize() {
83        return sizeof(MachInst);
84    }
85
86    static inline MachInst makeRegisterCopy(int dest, int src) {
87        panic("makeRegisterCopy not implemented");
88        return 0;
89    }
90
91    static inline ExtMachInst
92    makeExtMI(MachInst inst, ThreadContext * xc) {
93#if FULL_SYSTEM
94        ExtMachInst ext_inst = inst;
95        if (xc->readPC() && 0x1)
96            return ext_inst|=(static_cast<ExtMachInst>(xc->readPC() & 0x1) << 32);
97        else
98            return ext_inst;
99#else
100        return ExtMachInst(inst);
101#endif
102    }
103
104    inline void startupCPU(ThreadContext *tc, int cpuId)
105    {
106        tc->activate(0);
107    }
108};
109
110
111#endif
112