utility.hh revision 2972:f84c6c5309ce
1/* 2 * Copyright (c) 2003-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Nathan Binkert 29 * Steve Reinhardt 30 */ 31 32#ifndef __ARCH_MIPS_UTILITY_HH__ 33#define __ARCH_MIPS_UTILITY_HH__ 34 35#include "arch/mips/types.hh" 36#include "arch/mips/isa_traits.hh" 37#include "base/misc.hh" 38//XXX This is needed for size_t. We should use something other than size_t 39#include "kern/linux/linux.hh" 40#include "sim/host.hh" 41 42namespace MipsISA { 43 44 //Floating Point Utility Functions 45 uint64_t fpConvert(ConvertType cvt_type, double fp_val); 46 double roundFP(double val, int digits); 47 double truncFP(double val); 48 49 bool getCondCode(uint32_t fcsr, int cc); 50 uint32_t genCCVector(uint32_t fcsr, int num, uint32_t cc_val); 51 uint32_t genInvalidVector(uint32_t fcsr); 52 53 bool isNan(void *val_ptr, int size); 54 bool isQnan(void *val_ptr, int size); 55 bool isSnan(void *val_ptr, int size); 56 57 /** 58 * Function to insure ISA semantics about 0 registers. 59 * @param tc The thread context. 60 */ 61 template <class TC> 62 void zeroRegisters(TC *tc); 63 64 void copyRegs(ThreadContext *src, ThreadContext *dest); 65 66 // Instruction address compression hooks 67 static inline Addr realPCToFetchPC(const Addr &addr) { 68 return addr; 69 } 70 71 static inline Addr fetchPCToRealPC(const Addr &addr) { 72 return addr; 73 } 74 75 // the size of "fetched" instructions (not necessarily the size 76 // of real instructions for PISA) 77 static inline size_t fetchInstSize() { 78 return sizeof(MachInst); 79 } 80 81 static inline MachInst makeRegisterCopy(int dest, int src) { 82 panic("makeRegisterCopy not implemented"); 83 return 0; 84 } 85 86 static inline ExtMachInst 87 makeExtMI(MachInst inst, const uint64_t &pc) { 88#if FULL_SYSTEM 89 ExtMachInst ext_inst = inst; 90 if (pc && 0x1) 91 return ext_inst|=(static_cast<ExtMachInst>(pc & 0x1) << 32); 92 else 93 return ext_inst; 94#else 95 return ExtMachInst(inst); 96#endif 97 } 98}; 99 100 101#endif 102