utility.cc revision 2706:d88c27f75121
1/* 2 * Copyright (c) 2003-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Korey Sewell 29 */ 30 31#include "arch/mips/isa_traits.hh" 32#include "arch/mips/utility.hh" 33#include "config/full_system.hh" 34#include "cpu/static_inst.hh" 35#include "sim/serialize.hh" 36#include "base/bitfield.hh" 37 38using namespace MipsISA; 39using namespace std; 40 41uint64_t 42MipsISA::fpConvert(ConvertType cvt_type, double fp_val) 43{ 44 45 switch (cvt_type) 46 { 47 case SINGLE_TO_DOUBLE: 48 { 49 double sdouble_val = fp_val; 50 void *sdouble_ptr = &sdouble_val; 51 uint64_t sdp_bits = *(uint64_t *) sdouble_ptr; 52 return sdp_bits; 53 } 54 55 case SINGLE_TO_WORD: 56 { 57 int32_t sword_val = (int32_t) fp_val; 58 void *sword_ptr = &sword_val; 59 uint64_t sword_bits= *(uint32_t *) sword_ptr; 60 return sword_bits; 61 } 62 63 case WORD_TO_SINGLE: 64 { 65 float wfloat_val = fp_val; 66 void *wfloat_ptr = &wfloat_val; 67 uint64_t wfloat_bits = *(uint32_t *) wfloat_ptr; 68 return wfloat_bits; 69 } 70 71 case WORD_TO_DOUBLE: 72 { 73 double wdouble_val = fp_val; 74 void *wdouble_ptr = &wdouble_val; 75 uint64_t wdp_bits = *(uint64_t *) wdouble_ptr; 76 return wdp_bits; 77 } 78 79 default: 80 panic("Invalid Floating Point Conversion Type (%d). See \"types.hh\" for List of Conversions\n",cvt_type); 81 return 0; 82 } 83} 84 85double 86MipsISA::roundFP(double val, int digits) 87{ 88 double digit_offset = pow(10.0,digits); 89 val = val * digit_offset; 90 val = val + 0.5; 91 val = floor(val); 92 val = val / digit_offset; 93 return val; 94} 95 96double 97MipsISA::truncFP(double val) 98{ 99 int trunc_val = (int) val; 100 return (double) trunc_val; 101} 102 103bool 104MipsISA::getCondCode(uint32_t fcsr, int cc_idx) 105{ 106 int shift = (cc_idx == 0) ? 23 : cc_idx + 24; 107 bool cc_val = (fcsr >> shift) & 0x00000001; 108 return cc_val; 109} 110 111uint32_t 112MipsISA::genCCVector(uint32_t fcsr, int cc_num, uint32_t cc_val) 113{ 114 int cc_idx = (cc_num == 0) ? 23 : cc_num + 24; 115 116 fcsr = bits(fcsr, 31, cc_idx + 1) << cc_idx + 1 | 117 cc_val << cc_idx | 118 bits(fcsr, cc_idx - 1, 0); 119 120 return fcsr; 121} 122 123uint32_t 124MipsISA::genInvalidVector(uint32_t fcsr_bits) 125{ 126 //Set FCSR invalid in "flag" field 127 int invalid_offset = Invalid + Flag_Field; 128 fcsr_bits = fcsr_bits | (1 << invalid_offset); 129 130 //Set FCSR invalid in "cause" flag 131 int cause_offset = Invalid + Cause_Field; 132 fcsr_bits = fcsr_bits | (1 << cause_offset); 133 134 return fcsr_bits; 135} 136 137bool 138MipsISA::isNan(void *val_ptr, int size) 139{ 140 switch (size) 141 { 142 case 32: 143 { 144 uint32_t val_bits = *(uint32_t *) val_ptr; 145 return (bits(val_bits, 30, 23) == 0xFF); 146 } 147 148 case 64: 149 { 150 uint64_t val_bits = *(uint64_t *) val_ptr; 151 return (bits(val_bits, 62, 52) == 0x7FF); 152 } 153 154 default: 155 panic("Type unsupported. Size mismatch\n"); 156 } 157} 158 159 160bool 161MipsISA::isQnan(void *val_ptr, int size) 162{ 163 switch (size) 164 { 165 case 32: 166 { 167 uint32_t val_bits = *(uint32_t *) val_ptr; 168 return (bits(val_bits, 30, 22) == 0x1FE); 169 } 170 171 case 64: 172 { 173 uint64_t val_bits = *(uint64_t *) val_ptr; 174 return (bits(val_bits, 62, 51) == 0xFFE); 175 } 176 177 default: 178 panic("Type unsupported. Size mismatch\n"); 179 } 180} 181 182bool 183MipsISA::isSnan(void *val_ptr, int size) 184{ 185 switch (size) 186 { 187 case 32: 188 { 189 uint32_t val_bits = *(uint32_t *) val_ptr; 190 return (bits(val_bits, 30, 22) == 0x1FF); 191 } 192 193 case 64: 194 { 195 uint64_t val_bits = *(uint64_t *) val_ptr; 196 return (bits(val_bits, 62, 51) == 0xFFF); 197 } 198 199 default: 200 panic("Type unsupported. Size mismatch\n"); 201 } 202} 203