process.cc revision 7676:92274350b953
14238SN/A/* 24238SN/A * Copyright (c) 2004-2005 The Regents of The University of Michigan 34238SN/A * All rights reserved. 44238SN/A * 54238SN/A * Redistribution and use in source and binary forms, with or without 64238SN/A * modification, are permitted provided that the following conditions are 74238SN/A * met: redistributions of source code must retain the above copyright 84238SN/A * notice, this list of conditions and the following disclaimer; 94238SN/A * redistributions in binary form must reproduce the above copyright 104238SN/A * notice, this list of conditions and the following disclaimer in the 114238SN/A * documentation and/or other materials provided with the distribution; 124238SN/A * neither the name of the copyright holders nor the names of its 134238SN/A * contributors may be used to endorse or promote products derived from 144238SN/A * this software without specific prior written permission. 154238SN/A * 164238SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 174238SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 184238SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 194238SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 204238SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 214238SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 224238SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 234238SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 244238SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 254238SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 264238SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 274238SN/A * 284238SN/A * Authors: Gabe Black 294238SN/A * Ali Saidi 30 * Korey Sewell 31 */ 32 33#include "arch/mips/isa_traits.hh" 34#include "arch/mips/process.hh" 35#include "base/loader/object_file.hh" 36#include "base/loader/elf_object.hh" 37#include "base/misc.hh" 38#include "cpu/thread_context.hh" 39#include "mem/page_table.hh" 40#include "sim/process.hh" 41#include "sim/process_impl.hh" 42#include "sim/system.hh" 43 44using namespace std; 45using namespace MipsISA; 46 47MipsLiveProcess::MipsLiveProcess(LiveProcessParams * params, 48 ObjectFile *objFile) 49 : LiveProcess(params, objFile) 50{ 51 // Set up stack. On MIPS, stack starts at the top of kuseg 52 // user address space. MIPS stack grows down from here 53 stack_base = 0x7FFFFFFF; 54 55 // Set pointer for next thread stack. Reserve 8M for main stack. 56 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 57 58 // Set up break point (Top of Heap) 59 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 60 brk_point = roundUp(brk_point, VMPageSize); 61 62 // Set up region for mmaps. Start it 1GB above the top of the heap. 63 mmap_start = mmap_end = brk_point + 0x40000000L; 64} 65 66void 67MipsLiveProcess::initState() 68{ 69 LiveProcess::initState(); 70 71 argsInit<uint32_t>(VMPageSize); 72} 73 74template<class IntType> 75void 76MipsLiveProcess::argsInit(int pageSize) 77{ 78 int intSize = sizeof(IntType); 79 80 // load object file into target memory 81 objFile->loadSections(initVirtMem); 82 83 typedef AuxVector<IntType> auxv_t; 84 std::vector<auxv_t> auxv; 85 86 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 87 if (elfObject) 88 { 89 // Set the system page size 90 auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::VMPageSize)); 91 // Set the frequency at which time() increments 92 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 93 // For statically linked executables, this is the virtual 94 // address of the program header tables if they appear in the 95 // executable image. 96 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 97 DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable()); 98 // This is the size of a program header entry from the elf file. 99 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 100 // This is the number of program headers from the original elf file. 101 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 102 //The entry point to the program 103 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 104 //Different user and group IDs 105 auxv.push_back(auxv_t(M5_AT_UID, uid())); 106 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 107 auxv.push_back(auxv_t(M5_AT_GID, gid())); 108 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 109 } 110 111 // Calculate how much space we need for arg & env & auxv arrays. 112 int argv_array_size = intSize * (argv.size() + 1); 113 int envp_array_size = intSize * (envp.size() + 1); 114 int auxv_array_size = intSize * 2 * (auxv.size() + 1); 115 116 int arg_data_size = 0; 117 for (vector<string>::size_type i = 0; i < argv.size(); ++i) { 118 arg_data_size += argv[i].size() + 1; 119 } 120 int env_data_size = 0; 121 for (vector<string>::size_type i = 0; i < envp.size(); ++i) { 122 env_data_size += envp[i].size() + 1; 123 } 124 125 int space_needed = 126 argv_array_size + 127 envp_array_size + 128 auxv_array_size + 129 arg_data_size + 130 env_data_size; 131 132 // set bottom of stack 133 stack_min = stack_base - space_needed; 134 // align it 135 stack_min = roundDown(stack_min, pageSize); 136 stack_size = stack_base - stack_min; 137 // map memory 138 pTable->allocate(stack_min, roundUp(stack_size, pageSize)); 139 140 // map out initial stack contents 141 IntType argv_array_base = stack_min + intSize; // room for argc 142 IntType envp_array_base = argv_array_base + argv_array_size; 143 IntType auxv_array_base = envp_array_base + envp_array_size; 144 IntType arg_data_base = auxv_array_base + auxv_array_size; 145 IntType env_data_base = arg_data_base + arg_data_size; 146 147 // write contents to stack 148 IntType argc = argv.size(); 149 150 argc = htog((IntType)argc); 151 152 initVirtMem->writeBlob(stack_min, (uint8_t*)&argc, intSize); 153 154 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 155 156 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 157 158 // Copy the aux vector 159 for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) { 160 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 161 (uint8_t*)&(auxv[x].a_type), intSize); 162 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 163 (uint8_t*)&(auxv[x].a_val), intSize); 164 } 165 166 // Write out the terminating zeroed auxilliary vector 167 for (unsigned i = 0; i < 2; i++) { 168 const IntType zero = 0; 169 const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i); 170 initVirtMem->writeBlob(addr, (uint8_t*)&zero, intSize); 171 } 172 173 ThreadContext *tc = system->getThreadContext(contextIds[0]); 174 175 setSyscallArg(tc, 0, argc); 176 setSyscallArg(tc, 1, argv_array_base); 177 tc->setIntReg(StackPointerReg, stack_min); 178 179 Addr prog_entry = objFile->entryPoint(); 180 tc->setPC(prog_entry); 181 tc->setNextPC(prog_entry + sizeof(MachInst)); 182 tc->setNextNPC(prog_entry + (2 * sizeof(MachInst))); 183} 184 185 186MipsISA::IntReg 187MipsLiveProcess::getSyscallArg(ThreadContext *tc, int &i) 188{ 189 assert(i < 6); 190 return tc->readIntReg(FirstArgumentReg + i++); 191} 192 193void 194MipsLiveProcess::setSyscallArg(ThreadContext *tc, 195 int i, MipsISA::IntReg val) 196{ 197 assert(i < 6); 198 tc->setIntReg(FirstArgumentReg + i, val); 199} 200 201void 202MipsLiveProcess::setSyscallReturn(ThreadContext *tc, 203 SyscallReturn return_value) 204{ 205 if (return_value.successful()) { 206 // no error 207 tc->setIntReg(SyscallSuccessReg, 0); 208 tc->setIntReg(ReturnValueReg, return_value.value()); 209 } else { 210 // got an error, return details 211 tc->setIntReg(SyscallSuccessReg, (IntReg) -1); 212 tc->setIntReg(ReturnValueReg, -return_value.value()); 213 } 214} 215