process.cc revision 7532
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 * Korey Sewell 31 */ 32 33#include "arch/mips/isa_traits.hh" 34#include "arch/mips/process.hh" 35 36#include "base/loader/object_file.hh" 37#include "base/loader/elf_object.hh" 38#include "base/misc.hh" 39#include "cpu/thread_context.hh" 40 41#include "mem/page_table.hh" 42 43#include "sim/process.hh" 44#include "sim/process_impl.hh" 45#include "sim/system.hh" 46 47using namespace std; 48using namespace MipsISA; 49 50MipsLiveProcess::MipsLiveProcess(LiveProcessParams * params, 51 ObjectFile *objFile) 52 : LiveProcess(params, objFile) 53{ 54 // Set up stack. On MIPS, stack starts at the top of kuseg 55 // user address space. MIPS stack grows down from here 56 stack_base = 0x7FFFFFFF; 57 58 // Set pointer for next thread stack. Reserve 8M for main stack. 59 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 60 61 // Set up break point (Top of Heap) 62 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 63 brk_point = roundUp(brk_point, VMPageSize); 64 65 // Set up region for mmaps. Start it 1GB above the top of the heap. 66 mmap_start = mmap_end = brk_point + 0x40000000L; 67} 68 69void 70MipsLiveProcess::initState() 71{ 72 LiveProcess::initState(); 73 74 argsInit<uint32_t>(VMPageSize); 75} 76 77template<class IntType> 78void 79MipsLiveProcess::argsInit(int pageSize) 80{ 81 int intSize = sizeof(IntType); 82 83 // load object file into target memory 84 objFile->loadSections(initVirtMem); 85 86 typedef AuxVector<IntType> auxv_t; 87 std::vector<auxv_t> auxv; 88 89 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 90 if (elfObject) 91 { 92 // Set the system page size 93 auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::VMPageSize)); 94 // Set the frequency at which time() increments 95 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 96 // For statically linked executables, this is the virtual 97 // address of the program header tables if they appear in the 98 // executable image. 99 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 100 DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable()); 101 // This is the size of a program header entry from the elf file. 102 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 103 // This is the number of program headers from the original elf file. 104 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 105 //The entry point to the program 106 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 107 //Different user and group IDs 108 auxv.push_back(auxv_t(M5_AT_UID, uid())); 109 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 110 auxv.push_back(auxv_t(M5_AT_GID, gid())); 111 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 112 } 113 114 // Calculate how much space we need for arg & env & auxv arrays. 115 int argv_array_size = intSize * (argv.size() + 1); 116 int envp_array_size = intSize * (envp.size() + 1); 117 int auxv_array_size = intSize * 2 * (auxv.size() + 1); 118 119 int arg_data_size = 0; 120 for (vector<string>::size_type i = 0; i < argv.size(); ++i) { 121 arg_data_size += argv[i].size() + 1; 122 } 123 int env_data_size = 0; 124 for (vector<string>::size_type i = 0; i < envp.size(); ++i) { 125 env_data_size += envp[i].size() + 1; 126 } 127 128 int space_needed = 129 argv_array_size + 130 envp_array_size + 131 auxv_array_size + 132 arg_data_size + 133 env_data_size; 134 135 // set bottom of stack 136 stack_min = stack_base - space_needed; 137 // align it 138 stack_min = roundDown(stack_min, pageSize); 139 stack_size = stack_base - stack_min; 140 // map memory 141 pTable->allocate(stack_min, roundUp(stack_size, pageSize)); 142 143 // map out initial stack contents 144 IntType argv_array_base = stack_min + intSize; // room for argc 145 IntType envp_array_base = argv_array_base + argv_array_size; 146 IntType auxv_array_base = envp_array_base + envp_array_size; 147 IntType arg_data_base = auxv_array_base + auxv_array_size; 148 IntType env_data_base = arg_data_base + arg_data_size; 149 150 // write contents to stack 151 IntType argc = argv.size(); 152 153 argc = htog((IntType)argc); 154 155 initVirtMem->writeBlob(stack_min, (uint8_t*)&argc, intSize); 156 157 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 158 159 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 160 161 // Copy the aux vector 162 for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) { 163 initVirtMem->writeBlob(auxv_array_base + x * 2 * intSize, 164 (uint8_t*)&(auxv[x].a_type), intSize); 165 initVirtMem->writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 166 (uint8_t*)&(auxv[x].a_val), intSize); 167 } 168 169 // Write out the terminating zeroed auxilliary vector 170 for (unsigned i = 0; i < 2; i++) { 171 const IntType zero = 0; 172 const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i); 173 initVirtMem->writeBlob(addr, (uint8_t*)&zero, intSize); 174 } 175 176 ThreadContext *tc = system->getThreadContext(contextIds[0]); 177 178 setSyscallArg(tc, 0, argc); 179 setSyscallArg(tc, 1, argv_array_base); 180 tc->setIntReg(StackPointerReg, stack_min); 181 182 Addr prog_entry = objFile->entryPoint(); 183 tc->setPC(prog_entry); 184 tc->setNextPC(prog_entry + sizeof(MachInst)); 185 tc->setNextNPC(prog_entry + (2 * sizeof(MachInst))); 186} 187 188 189MipsISA::IntReg 190MipsLiveProcess::getSyscallArg(ThreadContext *tc, int &i) 191{ 192 assert(i < 6); 193 return tc->readIntReg(FirstArgumentReg + i++); 194} 195 196void 197MipsLiveProcess::setSyscallArg(ThreadContext *tc, 198 int i, MipsISA::IntReg val) 199{ 200 assert(i < 6); 201 tc->setIntReg(FirstArgumentReg + i, val); 202} 203 204void 205MipsLiveProcess::setSyscallReturn(ThreadContext *tc, 206 SyscallReturn return_value) 207{ 208 if (return_value.successful()) { 209 // no error 210 tc->setIntReg(SyscallSuccessReg, 0); 211 tc->setIntReg(ReturnValueReg, return_value.value()); 212 } else { 213 // got an error, return details 214 tc->setIntReg(SyscallSuccessReg, (IntReg) -1); 215 tc->setIntReg(ReturnValueReg, -return_value.value()); 216 } 217} 218