process.cc revision 10223
1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 * Ali Saidi 30 * Korey Sewell 31 */ 32 33#include "arch/mips/isa_traits.hh" 34#include "arch/mips/process.hh" 35#include "base/loader/elf_object.hh" 36#include "base/loader/object_file.hh" 37#include "base/misc.hh" 38#include "cpu/thread_context.hh" 39#include "debug/Loader.hh" 40#include "mem/page_table.hh" 41#include "sim/process.hh" 42#include "sim/process_impl.hh" 43#include "sim/system.hh" 44 45using namespace std; 46using namespace MipsISA; 47 48MipsLiveProcess::MipsLiveProcess(LiveProcessParams * params, 49 ObjectFile *objFile) 50 : LiveProcess(params, objFile) 51{ 52 // Set up stack. On MIPS, stack starts at the top of kuseg 53 // user address space. MIPS stack grows down from here 54 stack_base = 0x7FFFFFFF; 55 56 // Set pointer for next thread stack. Reserve 8M for main stack. 57 next_thread_stack_base = stack_base - (8 * 1024 * 1024); 58 59 // Set up break point (Top of Heap) 60 brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 61 brk_point = roundUp(brk_point, VMPageSize); 62 63 // Set up region for mmaps. Start it 1GB above the top of the heap. 64 mmap_start = mmap_end = brk_point + 0x40000000L; 65} 66 67void 68MipsLiveProcess::initState() 69{ 70 LiveProcess::initState(); 71 72 argsInit<uint32_t>(VMPageSize); 73} 74 75template<class IntType> 76void 77MipsLiveProcess::argsInit(int pageSize) 78{ 79 int intSize = sizeof(IntType); 80 81 // load object file into target memory 82 objFile->loadSections(initVirtMem); 83 84 typedef AuxVector<IntType> auxv_t; 85 std::vector<auxv_t> auxv; 86 87 ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile); 88 if (elfObject) 89 { 90 // Set the system page size 91 auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::VMPageSize)); 92 // Set the frequency at which time() increments 93 auxv.push_back(auxv_t(M5_AT_CLKTCK, 100)); 94 // For statically linked executables, this is the virtual 95 // address of the program header tables if they appear in the 96 // executable image. 97 auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable())); 98 DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable()); 99 // This is the size of a program header entry from the elf file. 100 auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize())); 101 // This is the number of program headers from the original elf file. 102 auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount())); 103 //The entry point to the program 104 auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint())); 105 //Different user and group IDs 106 auxv.push_back(auxv_t(M5_AT_UID, uid())); 107 auxv.push_back(auxv_t(M5_AT_EUID, euid())); 108 auxv.push_back(auxv_t(M5_AT_GID, gid())); 109 auxv.push_back(auxv_t(M5_AT_EGID, egid())); 110 } 111 112 // Calculate how much space we need for arg & env & auxv arrays. 113 int argv_array_size = intSize * (argv.size() + 1); 114 int envp_array_size = intSize * (envp.size() + 1); 115 int auxv_array_size = intSize * 2 * (auxv.size() + 1); 116 117 int arg_data_size = 0; 118 for (vector<string>::size_type i = 0; i < argv.size(); ++i) { 119 arg_data_size += argv[i].size() + 1; 120 } 121 int env_data_size = 0; 122 for (vector<string>::size_type i = 0; i < envp.size(); ++i) { 123 env_data_size += envp[i].size() + 1; 124 } 125 126 int space_needed = 127 argv_array_size + 128 envp_array_size + 129 auxv_array_size + 130 arg_data_size + 131 env_data_size; 132 133 // set bottom of stack 134 stack_min = stack_base - space_needed; 135 // align it 136 stack_min = roundDown(stack_min, pageSize); 137 stack_size = stack_base - stack_min; 138 // map memory 139 allocateMem(stack_min, roundUp(stack_size, pageSize)); 140 141 // map out initial stack contents 142 IntType argv_array_base = stack_min + intSize; // room for argc 143 IntType envp_array_base = argv_array_base + argv_array_size; 144 IntType auxv_array_base = envp_array_base + envp_array_size; 145 IntType arg_data_base = auxv_array_base + auxv_array_size; 146 IntType env_data_base = arg_data_base + arg_data_size; 147 148 // write contents to stack 149 IntType argc = argv.size(); 150 151 argc = htog((IntType)argc); 152 153 initVirtMem.writeBlob(stack_min, (uint8_t*)&argc, intSize); 154 155 copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem); 156 157 copyStringArray(envp, envp_array_base, env_data_base, initVirtMem); 158 159 // Copy the aux vector 160 for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) { 161 initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize, 162 (uint8_t*)&(auxv[x].a_type), intSize); 163 initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize, 164 (uint8_t*)&(auxv[x].a_val), intSize); 165 } 166 167 // Write out the terminating zeroed auxilliary vector 168 for (unsigned i = 0; i < 2; i++) { 169 const IntType zero = 0; 170 const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i); 171 initVirtMem.writeBlob(addr, (uint8_t*)&zero, intSize); 172 } 173 174 ThreadContext *tc = system->getThreadContext(contextIds[0]); 175 176 setSyscallArg(tc, 0, argc); 177 setSyscallArg(tc, 1, argv_array_base); 178 tc->setIntReg(StackPointerReg, stack_min); 179 180 tc->pcState(objFile->entryPoint()); 181} 182 183 184MipsISA::IntReg 185MipsLiveProcess::getSyscallArg(ThreadContext *tc, int &i) 186{ 187 assert(i < 6); 188 return tc->readIntReg(FirstArgumentReg + i++); 189} 190 191void 192MipsLiveProcess::setSyscallArg(ThreadContext *tc, 193 int i, MipsISA::IntReg val) 194{ 195 assert(i < 6); 196 tc->setIntReg(FirstArgumentReg + i, val); 197} 198 199void 200MipsLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret) 201{ 202 if (sysret.successful()) { 203 // no error 204 tc->setIntReg(SyscallSuccessReg, 0); 205 tc->setIntReg(ReturnValueReg, sysret.returnValue()); 206 } else { 207 // got an error, return details 208 tc->setIntReg(SyscallSuccessReg, (IntReg) -1); 209 tc->setIntReg(ReturnValueReg, sysret.errnoValue()); 210 } 211} 212