process.cc revision 5958
12207SN/A/* 25254Sksewell@umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan 35254Sksewell@umich.edu * All rights reserved. 42207SN/A * 55254Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without 65254Sksewell@umich.edu * modification, are permitted provided that the following conditions are 75254Sksewell@umich.edu * met: redistributions of source code must retain the above copyright 85254Sksewell@umich.edu * notice, this list of conditions and the following disclaimer; 95254Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright 105254Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the 115254Sksewell@umich.edu * documentation and/or other materials provided with the distribution; 125254Sksewell@umich.edu * neither the name of the copyright holders nor the names of its 135254Sksewell@umich.edu * contributors may be used to endorse or promote products derived from 145254Sksewell@umich.edu * this software without specific prior written permission. 152207SN/A * 165254Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 175254Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 185254Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 195254Sksewell@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 205254Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 215254Sksewell@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 225254Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 235254Sksewell@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 245254Sksewell@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 255254Sksewell@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 265254Sksewell@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 272665Ssaidi@eecs.umich.edu * 285254Sksewell@umich.edu * Authors: Gabe Black 295254Sksewell@umich.edu * Ali Saidi 305254Sksewell@umich.edu * Korey Sewell 312207SN/A */ 322207SN/A 332474SN/A#include "arch/mips/isa_traits.hh" 342207SN/A#include "arch/mips/process.hh" 352454SN/A#include "base/loader/object_file.hh" 362454SN/A#include "base/misc.hh" 372680Sktlim@umich.edu#include "cpu/thread_context.hh" 382474SN/A#include "sim/system.hh" 392207SN/A 402447SN/Ausing namespace std; 412474SN/Ausing namespace MipsISA; 422447SN/A 435958Sgblack@eecs.umich.edustatic const int SyscallSuccessReg = 7; 445958Sgblack@eecs.umich.edustatic const int FirstArgumentReg = 4; 455958Sgblack@eecs.umich.edustatic const int ReturnValueReg = 2; 465958Sgblack@eecs.umich.edu 475154Sgblack@eecs.umich.eduMipsLiveProcess::MipsLiveProcess(LiveProcessParams * params, 485154Sgblack@eecs.umich.edu ObjectFile *objFile) 495154Sgblack@eecs.umich.edu : LiveProcess(params, objFile) 502474SN/A{ 512686Sksewell@umich.edu // Set up stack. On MIPS, stack starts at the top of kuseg 522686Sksewell@umich.edu // user address space. MIPS stack grows down from here 532935Sksewell@umich.edu stack_base = 0x7FFFFFFF; 542474SN/A 552474SN/A // Set pointer for next thread stack. Reserve 8M for main stack. 562474SN/A next_thread_stack_base = stack_base - (8 * 1024 * 1024); 572474SN/A 582686Sksewell@umich.edu // Set up break point (Top of Heap) 592686Sksewell@umich.edu brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize(); 602686Sksewell@umich.edu brk_point = roundUp(brk_point, VMPageSize); 612686Sksewell@umich.edu 622686Sksewell@umich.edu // Set up region for mmaps. For now, start at bottom of kuseg space. 632686Sksewell@umich.edu mmap_start = mmap_end = 0x10000; 642474SN/A} 652474SN/A 662474SN/Avoid 672474SN/AMipsLiveProcess::startup() 682474SN/A{ 692474SN/A argsInit(MachineBytes, VMPageSize); 702474SN/A} 715958Sgblack@eecs.umich.edu 725958Sgblack@eecs.umich.eduMipsISA::IntReg 735958Sgblack@eecs.umich.eduMipsLiveProcess::getSyscallArg(ThreadContext *tc, int i) 745958Sgblack@eecs.umich.edu{ 755958Sgblack@eecs.umich.edu assert(i < 6); 765958Sgblack@eecs.umich.edu return tc->readIntReg(FirstArgumentReg + i); 775958Sgblack@eecs.umich.edu} 785958Sgblack@eecs.umich.edu 795958Sgblack@eecs.umich.eduvoid 805958Sgblack@eecs.umich.eduMipsLiveProcess::setSyscallArg(ThreadContext *tc, 815958Sgblack@eecs.umich.edu int i, MipsISA::IntReg val) 825958Sgblack@eecs.umich.edu{ 835958Sgblack@eecs.umich.edu assert(i < 6); 845958Sgblack@eecs.umich.edu tc->setIntReg(FirstArgumentReg + i, val); 855958Sgblack@eecs.umich.edu} 865958Sgblack@eecs.umich.edu 875958Sgblack@eecs.umich.eduvoid 885958Sgblack@eecs.umich.eduMipsLiveProcess::setSyscallReturn(ThreadContext *tc, 895958Sgblack@eecs.umich.edu SyscallReturn return_value) 905958Sgblack@eecs.umich.edu{ 915958Sgblack@eecs.umich.edu if (return_value.successful()) { 925958Sgblack@eecs.umich.edu // no error 935958Sgblack@eecs.umich.edu tc->setIntReg(SyscallSuccessReg, 0); 945958Sgblack@eecs.umich.edu tc->setIntReg(ReturnValueReg, return_value.value()); 955958Sgblack@eecs.umich.edu } else { 965958Sgblack@eecs.umich.edu // got an error, return details 975958Sgblack@eecs.umich.edu tc->setIntReg(SyscallSuccessReg, (IntReg) -1); 985958Sgblack@eecs.umich.edu tc->setIntReg(ReturnValueReg, -return_value.value()); 995958Sgblack@eecs.umich.edu } 1005958Sgblack@eecs.umich.edu} 101