process.cc revision 12394
12207SN/A/*
25254Sksewell@umich.edu * Copyright (c) 2004-2005 The Regents of The University of Michigan
35254Sksewell@umich.edu * All rights reserved.
42207SN/A *
55254Sksewell@umich.edu * Redistribution and use in source and binary forms, with or without
65254Sksewell@umich.edu * modification, are permitted provided that the following conditions are
75254Sksewell@umich.edu * met: redistributions of source code must retain the above copyright
85254Sksewell@umich.edu * notice, this list of conditions and the following disclaimer;
95254Sksewell@umich.edu * redistributions in binary form must reproduce the above copyright
105254Sksewell@umich.edu * notice, this list of conditions and the following disclaimer in the
115254Sksewell@umich.edu * documentation and/or other materials provided with the distribution;
125254Sksewell@umich.edu * neither the name of the copyright holders nor the names of its
135254Sksewell@umich.edu * contributors may be used to endorse or promote products derived from
145254Sksewell@umich.edu * this software without specific prior written permission.
152207SN/A *
165254Sksewell@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
175254Sksewell@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
185254Sksewell@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
195254Sksewell@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
205254Sksewell@umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
215254Sksewell@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
225254Sksewell@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
235254Sksewell@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
245254Sksewell@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
255254Sksewell@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
265254Sksewell@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
272665Ssaidi@eecs.umich.edu *
285254Sksewell@umich.edu * Authors: Gabe Black
295254Sksewell@umich.edu *          Ali Saidi
305254Sksewell@umich.edu *          Korey Sewell
312207SN/A */
322207SN/A
3311793Sbrandon.potter@amd.com#include "arch/mips/process.hh"
3411793Sbrandon.potter@amd.com
352474SN/A#include "arch/mips/isa_traits.hh"
368229Snate@binkert.org#include "base/loader/elf_object.hh"
372454SN/A#include "base/loader/object_file.hh"
3812334Sgabeblack@google.com#include "base/logging.hh"
392680Sktlim@umich.edu#include "cpu/thread_context.hh"
408232Snate@binkert.org#include "debug/Loader.hh"
416650Sksewell@umich.edu#include "mem/page_table.hh"
4211854Sbrandon.potter@amd.com#include "sim/aux_vector.hh"
436650Sksewell@umich.edu#include "sim/process.hh"
446650Sksewell@umich.edu#include "sim/process_impl.hh"
4511800Sbrandon.potter@amd.com#include "sim/syscall_return.hh"
462474SN/A#include "sim/system.hh"
472207SN/A
482447SN/Ausing namespace std;
492474SN/Ausing namespace MipsISA;
502447SN/A
5111851Sbrandon.potter@amd.comMipsProcess::MipsProcess(ProcessParams * params, ObjectFile *objFile)
5211851Sbrandon.potter@amd.com    : Process(params, objFile)
532474SN/A{
542686Sksewell@umich.edu    // Set up stack. On MIPS, stack starts at the top of kuseg
552686Sksewell@umich.edu    // user address space. MIPS stack grows down from here
5611905SBrandon.Potter@amd.com    Addr stack_base = 0x7FFFFFFF;
5711905SBrandon.Potter@amd.com
5811905SBrandon.Potter@amd.com    Addr max_stack_size = 8 * 1024 * 1024;
592474SN/A
602474SN/A    // Set pointer for next thread stack.  Reserve 8M for main stack.
6111905SBrandon.Potter@amd.com    Addr next_thread_stack_base = stack_base - max_stack_size;
622474SN/A
632686Sksewell@umich.edu    // Set up break point (Top of Heap)
6411905SBrandon.Potter@amd.com    Addr brk_point = objFile->dataBase() + objFile->dataSize() +
6511905SBrandon.Potter@amd.com                     objFile->bssSize();
6611905SBrandon.Potter@amd.com    brk_point = roundUp(brk_point, PageBytes);
672686Sksewell@umich.edu
686811SMatt DeVuyst    // Set up region for mmaps.  Start it 1GB above the top of the heap.
6911905SBrandon.Potter@amd.com    Addr mmap_end = brk_point + 0x40000000L;
7011905SBrandon.Potter@amd.com
7111905SBrandon.Potter@amd.com    memState = make_shared<MemState>(brk_point, stack_base, max_stack_size,
7211905SBrandon.Potter@amd.com                                     next_thread_stack_base, mmap_end);
732474SN/A}
742474SN/A
752474SN/Avoid
7611851Sbrandon.potter@amd.comMipsProcess::initState()
772474SN/A{
7811851Sbrandon.potter@amd.com    Process::initState();
796650Sksewell@umich.edu
8010318Sandreas.hansson@arm.com    argsInit<uint32_t>(PageBytes);
812474SN/A}
825958Sgblack@eecs.umich.edu
836811SMatt DeVuysttemplate<class IntType>
846650Sksewell@umich.eduvoid
8511851Sbrandon.potter@amd.comMipsProcess::argsInit(int pageSize)
866650Sksewell@umich.edu{
876811SMatt DeVuyst    int intSize = sizeof(IntType);
886811SMatt DeVuyst
8911389Sbrandon.potter@amd.com    // Patch the ld_bias for dynamic executables.
9011389Sbrandon.potter@amd.com    updateBias();
9111389Sbrandon.potter@amd.com
926650Sksewell@umich.edu    // load object file into target memory
936650Sksewell@umich.edu    objFile->loadSections(initVirtMem);
946650Sksewell@umich.edu
956811SMatt DeVuyst    typedef AuxVector<IntType> auxv_t;
966811SMatt DeVuyst    std::vector<auxv_t> auxv;
976811SMatt DeVuyst
986811SMatt DeVuyst    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
996811SMatt DeVuyst    if (elfObject)
1006811SMatt DeVuyst    {
1016811SMatt DeVuyst        // Set the system page size
10210318Sandreas.hansson@arm.com        auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::PageBytes));
1036811SMatt DeVuyst        // Set the frequency at which time() increments
1046811SMatt DeVuyst        auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
1056811SMatt DeVuyst        // For statically linked executables, this is the virtual
1066811SMatt DeVuyst        // address of the program header tables if they appear in the
1076811SMatt DeVuyst        // executable image.
1086811SMatt DeVuyst        auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
1096811SMatt DeVuyst        DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable());
1106811SMatt DeVuyst        // This is the size of a program header entry from the elf file.
1116811SMatt DeVuyst        auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
1126811SMatt DeVuyst        // This is the number of program headers from the original elf file.
1136811SMatt DeVuyst        auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
11411389Sbrandon.potter@amd.com        // This is the base address of the ELF interpreter; it should be
11511389Sbrandon.potter@amd.com        // zero for static executables or contain the base address for
11611389Sbrandon.potter@amd.com        // dynamic executables.
11711389Sbrandon.potter@amd.com        auxv.push_back(auxv_t(M5_AT_BASE, getBias()));
1186811SMatt DeVuyst        //The entry point to the program
1196811SMatt DeVuyst        auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
1206811SMatt DeVuyst        //Different user and group IDs
1216811SMatt DeVuyst        auxv.push_back(auxv_t(M5_AT_UID, uid()));
1226811SMatt DeVuyst        auxv.push_back(auxv_t(M5_AT_EUID, euid()));
1236811SMatt DeVuyst        auxv.push_back(auxv_t(M5_AT_GID, gid()));
1246811SMatt DeVuyst        auxv.push_back(auxv_t(M5_AT_EGID, egid()));
1256811SMatt DeVuyst    }
1266811SMatt DeVuyst
1276811SMatt DeVuyst    // Calculate how much space we need for arg & env & auxv arrays.
1286650Sksewell@umich.edu    int argv_array_size = intSize * (argv.size() + 1);
1296650Sksewell@umich.edu    int envp_array_size = intSize * (envp.size() + 1);
1306811SMatt DeVuyst    int auxv_array_size = intSize * 2 * (auxv.size() + 1);
1316811SMatt DeVuyst
1326650Sksewell@umich.edu    int arg_data_size = 0;
1336650Sksewell@umich.edu    for (vector<string>::size_type i = 0; i < argv.size(); ++i) {
1346650Sksewell@umich.edu        arg_data_size += argv[i].size() + 1;
1356650Sksewell@umich.edu    }
1366650Sksewell@umich.edu    int env_data_size = 0;
1376650Sksewell@umich.edu    for (vector<string>::size_type i = 0; i < envp.size(); ++i) {
1386650Sksewell@umich.edu        env_data_size += envp[i].size() + 1;
1396650Sksewell@umich.edu    }
1406650Sksewell@umich.edu
1416650Sksewell@umich.edu    int space_needed =
1426811SMatt DeVuyst        argv_array_size +
1436811SMatt DeVuyst        envp_array_size +
1446811SMatt DeVuyst        auxv_array_size +
1456811SMatt DeVuyst        arg_data_size +
1466811SMatt DeVuyst        env_data_size;
1476650Sksewell@umich.edu
1486650Sksewell@umich.edu    // set bottom of stack
14911905SBrandon.Potter@amd.com    memState->setStackMin(memState->getStackBase() - space_needed);
1506650Sksewell@umich.edu    // align it
15111905SBrandon.Potter@amd.com    memState->setStackMin(roundDown(memState->getStackMin(), pageSize));
15211905SBrandon.Potter@amd.com    memState->setStackSize(memState->getStackBase() - memState->getStackMin());
1536650Sksewell@umich.edu    // map memory
15411905SBrandon.Potter@amd.com    allocateMem(memState->getStackMin(), roundUp(memState->getStackSize(),
15511905SBrandon.Potter@amd.com                pageSize));
1566650Sksewell@umich.edu
15711905SBrandon.Potter@amd.com    // map out initial stack contents; leave room for argc
15811905SBrandon.Potter@amd.com    IntType argv_array_base = memState->getStackMin() + intSize;
1596811SMatt DeVuyst    IntType envp_array_base = argv_array_base + argv_array_size;
1606811SMatt DeVuyst    IntType auxv_array_base = envp_array_base + envp_array_size;
1616811SMatt DeVuyst    IntType arg_data_base = auxv_array_base + auxv_array_size;
1626811SMatt DeVuyst    IntType env_data_base = arg_data_base + arg_data_size;
1636650Sksewell@umich.edu
1646650Sksewell@umich.edu    // write contents to stack
1656811SMatt DeVuyst    IntType argc = argv.size();
1666650Sksewell@umich.edu
1676811SMatt DeVuyst    argc = htog((IntType)argc);
1686650Sksewell@umich.edu
16911905SBrandon.Potter@amd.com    initVirtMem.writeBlob(memState->getStackMin(), (uint8_t*)&argc, intSize);
1706650Sksewell@umich.edu
1716650Sksewell@umich.edu    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
1726650Sksewell@umich.edu
1736650Sksewell@umich.edu    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
1746650Sksewell@umich.edu
1756811SMatt DeVuyst    // Copy the aux vector
1766811SMatt DeVuyst    for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) {
1778852Sandreas.hansson@arm.com        initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
1786811SMatt DeVuyst                (uint8_t*)&(auxv[x].a_type), intSize);
1798852Sandreas.hansson@arm.com        initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
1806811SMatt DeVuyst                (uint8_t*)&(auxv[x].a_val), intSize);
1816811SMatt DeVuyst    }
1826811SMatt DeVuyst
1836811SMatt DeVuyst    // Write out the terminating zeroed auxilliary vector
1846811SMatt DeVuyst    for (unsigned i = 0; i < 2; i++) {
1856811SMatt DeVuyst        const IntType zero = 0;
1866811SMatt DeVuyst        const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i);
1878852Sandreas.hansson@arm.com        initVirtMem.writeBlob(addr, (uint8_t*)&zero, intSize);
1886811SMatt DeVuyst    }
1896811SMatt DeVuyst
1906650Sksewell@umich.edu    ThreadContext *tc = system->getThreadContext(contextIds[0]);
1916650Sksewell@umich.edu
1926650Sksewell@umich.edu    setSyscallArg(tc, 0, argc);
1936650Sksewell@umich.edu    setSyscallArg(tc, 1, argv_array_base);
19411905SBrandon.Potter@amd.com    tc->setIntReg(StackPointerReg, memState->getStackMin());
1956650Sksewell@umich.edu
19611389Sbrandon.potter@amd.com    tc->pcState(getStartPC());
1976650Sksewell@umich.edu}
1986650Sksewell@umich.edu
1996650Sksewell@umich.edu
2005958Sgblack@eecs.umich.eduMipsISA::IntReg
20111851Sbrandon.potter@amd.comMipsProcess::getSyscallArg(ThreadContext *tc, int &i)
2025958Sgblack@eecs.umich.edu{
2035958Sgblack@eecs.umich.edu    assert(i < 6);
2046701Sgblack@eecs.umich.edu    return tc->readIntReg(FirstArgumentReg + i++);
2055958Sgblack@eecs.umich.edu}
2065958Sgblack@eecs.umich.edu
2075958Sgblack@eecs.umich.eduvoid
20811851Sbrandon.potter@amd.comMipsProcess::setSyscallArg(ThreadContext *tc, int i, MipsISA::IntReg val)
2095958Sgblack@eecs.umich.edu{
2105958Sgblack@eecs.umich.edu    assert(i < 6);
2115958Sgblack@eecs.umich.edu    tc->setIntReg(FirstArgumentReg + i, val);
2125958Sgblack@eecs.umich.edu}
2135958Sgblack@eecs.umich.edu
2145958Sgblack@eecs.umich.eduvoid
21511851Sbrandon.potter@amd.comMipsProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
2165958Sgblack@eecs.umich.edu{
21710223Ssteve.reinhardt@amd.com    if (sysret.successful()) {
2185958Sgblack@eecs.umich.edu        // no error
2195958Sgblack@eecs.umich.edu        tc->setIntReg(SyscallSuccessReg, 0);
22010223Ssteve.reinhardt@amd.com        tc->setIntReg(ReturnValueReg, sysret.returnValue());
2215958Sgblack@eecs.umich.edu    } else {
2225958Sgblack@eecs.umich.edu        // got an error, return details
2235958Sgblack@eecs.umich.edu        tc->setIntReg(SyscallSuccessReg, (IntReg) -1);
22410223Ssteve.reinhardt@amd.com        tc->setIntReg(ReturnValueReg, sysret.errnoValue());
2255958Sgblack@eecs.umich.edu    }
2265958Sgblack@eecs.umich.edu}
227