operands.isa revision 2023 
1def operand_types {{
2    'sb' : ('signed int', 8),
3    'ub' : ('unsigned int', 8),
4    'shw' : ('signed int', 16),
5    'uhw' : ('unsigned int', 16),
6    'sw' : ('signed int', 32),
7    'uw' : ('unsigned int', 32),
8    'sdw' : ('signed int', 64),
9    'udw' : ('unsigned int', 64),
10    'sf' : ('float', 32),
11    'df' : ('float', 64),
12    'qf' : ('float', 128)
13}};
14
15def operands {{
16    # Int regs default to unsigned, but code should not count on this.
17    # For clarity, descriptions that depend on unsigned behavior should
18    # explicitly specify '.uq'.
19    'Rd': IntRegOperandTraits('udw', 'RD', 'IsInteger', 1),
20    'Rs1': IntRegOperandTraits('udw', 'RS1', 'IsInteger', 2),
21    'Rs2': IntRegOperandTraits('udw', 'RS2', 'IsInteger', 3),
22    #'Fa': FloatRegOperandTraits('df', 'FA', 'IsFloating', 1),
23    #'Fb': FloatRegOperandTraits('df', 'FB', 'IsFloating', 2),
24    #'Fc': FloatRegOperandTraits('df', 'FC', 'IsFloating', 3),
25    'Mem': MemOperandTraits('udw', None,
26                            ('IsMemRef', 'IsLoad', 'IsStore'), 4)
27    #'NPC': NPCOperandTraits('uq', None, ( None, None, 'IsControl' ), 4),
28    #'Runiq': ControlRegOperandTraits('uq', 'Uniq', None, 1),
29    #'FPCR':  ControlRegOperandTraits('uq', 'Fpcr', None, 1),
30    # The next two are hacks for non-full-system call-pal emulation
31    #'R0':  IntRegOperandTraits('uq', '0', None, 1),
32    #'R16': IntRegOperandTraits('uq', '16', None, 1)
33}};
34