operands.isa revision 5222
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345222Sksewell@umich.edu
355222Sksewell@umich.edu//Authors: Korey L. Sewell
365222Sksewell@umich.edu//         Jaidev Patwardhan
372706Sksewell@umich.edu
382023SN/Adef operand_types {{
392023SN/A    'sb' : ('signed int', 8),
402023SN/A    'ub' : ('unsigned int', 8),
412124SN/A    'sh' : ('signed int', 16),
422124SN/A    'uh' : ('unsigned int', 16),
432023SN/A    'sw' : ('signed int', 32),
442023SN/A    'uw' : ('unsigned int', 32),
452084SN/A    'sd' : ('signed int', 64),
462084SN/A    'ud' : ('unsigned int', 64),
472023SN/A    'sf' : ('float', 32),
482023SN/A    'df' : ('float', 64),
492023SN/A}};
502023SN/A
512023SN/Adef operands {{
522616SN/A    #General Purpose Integer Reg Operands
532077SN/A    'Rd': ('IntReg', 'uw', 'RD', 'IsInteger', 1),
542077SN/A    'Rs': ('IntReg', 'uw', 'RS', 'IsInteger', 2),
552077SN/A    'Rt': ('IntReg', 'uw', 'RT', 'IsInteger', 3),
562616SN/A
574661Sksewell@umich.edu    #Immediate Value operand
584661Sksewell@umich.edu    'IntImm': ('IntReg', 'uw', 'INTIMM', 'IsInteger', 3),
594661Sksewell@umich.edu
602616SN/A    #Operands used for Link or Syscall Insts
612616SN/A    'R31': ('IntReg', 'uw','31','IsInteger', 4),
622562SN/A    'R2':  ('IntReg', 'uw','2', 'IsInteger', 5),
632041SN/A
642616SN/A    #Special Integer Reg operands
654661Sksewell@umich.edu    'LO0':  ('IntReg', 'uw','MipsISA::LO', 'IsInteger', 6),
664661Sksewell@umich.edu    'HI0':  ('IntReg', 'uw','MipsISA::HI', 'IsInteger', 7),
672616SN/A
684661Sksewell@umich.edu    #Bitfield-dependent HI/LO Register Access
694661Sksewell@umich.edu    'LO_RD_SEL': ('IntReg','uw','MipsISA::DSPLo0 + ACDST*3', None, 6),
704661Sksewell@umich.edu    'HI_RD_SEL': ('IntReg','uw','MipsISA::DSPHi0 + ACDST*3', None, 7),
714661Sksewell@umich.edu    'LO_RS_SEL': ('IntReg','uw','MipsISA::DSPLo0 + ACSRC*3', None, 6),
724661Sksewell@umich.edu    'HI_RS_SEL': ('IntReg','uw','MipsISA::DSPHi0 + ACSRC*3', None, 7),
734661Sksewell@umich.edu
744661Sksewell@umich.edu    #DSP Special Purpose Integer Operands
754661Sksewell@umich.edu    'DSPControl': ('IntReg', 'uw', 'MipsISA::DSPControl', None, 8),
764661Sksewell@umich.edu    'DSPLo0': ('IntReg', 'uw', 'MipsISA::LO', None, 1),
774661Sksewell@umich.edu    'DSPHi0': ('IntReg', 'uw', 'MipsISA::HI', None, 1),
784661Sksewell@umich.edu    'DSPACX0': ('IntReg', 'uw', 'MipsISA::DSPACX0', None, 1),
794661Sksewell@umich.edu    'DSPLo1': ('IntReg', 'uw', 'MipsISA::DSPLo1', None, 1),
804661Sksewell@umich.edu    'DSPHi1': ('IntReg', 'uw', 'MipsISA::DSPHi1', None, 1),
814661Sksewell@umich.edu    'DSPACX1': ('IntReg', 'uw', 'MipsISA::DSPACX1', None, 1),
824661Sksewell@umich.edu    'DSPLo2': ('IntReg', 'uw', 'MipsISA::DSPLo2', None, 1),
834661Sksewell@umich.edu    'DSPHi2': ('IntReg', 'uw', 'MipsISA::DSPHi2', None, 1),
844661Sksewell@umich.edu    'DSPACX2': ('IntReg', 'uw', 'MipsISA::DSPACX2', None, 1),
854661Sksewell@umich.edu    'DSPLo3': ('IntReg', 'uw', 'MipsISA::DSPLo3', None, 1),
864661Sksewell@umich.edu    'DSPHi3': ('IntReg', 'uw', 'MipsISA::DSPHi3', None, 1),
874661Sksewell@umich.edu    'DSPACX3': ('IntReg', 'uw', 'MipsISA::DSPACX3', None, 1),
882041SN/A
892616SN/A    #Floating Point Reg Operands
902077SN/A    'Fd': ('FloatReg', 'sf', 'FD', 'IsFloating', 1),
912077SN/A    'Fs': ('FloatReg', 'sf', 'FS', 'IsFloating', 2),
922077SN/A    'Ft': ('FloatReg', 'sf', 'FT', 'IsFloating', 3),
932239SN/A    'Fr': ('FloatReg', 'sf', 'FR', 'IsFloating', 3),
942041SN/A
954661Sksewell@umich.edu    #Special Purpose Floating Point Control Reg Operands
962754Sksewell@umich.edu    'FIR':  ('FloatReg', 'uw', 'MipsISA::FIR', 'IsFloating', 1),
972754Sksewell@umich.edu    'FCCR': ('FloatReg', 'uw', 'MipsISA::FCCR', 'IsFloating', 2),
982754Sksewell@umich.edu    'FEXR': ('FloatReg', 'uw', 'MipsISA::FEXR', 'IsFloating', 3),
992754Sksewell@umich.edu    'FENR': ('FloatReg', 'uw', 'MipsISA::FENR', 'IsFloating', 3),
1002754Sksewell@umich.edu    'FCSR': ('FloatReg', 'uw', 'MipsISA::FCSR', 'IsFloating', 3),
1012616SN/A
1024661Sksewell@umich.edu    #Operands For Paired Singles FP Operations
1032607SN/A    'Fd1': ('FloatReg', 'sf', 'FD', 'IsFloating', 4),
1042607SN/A    'Fd2': ('FloatReg', 'sf', 'FD+1', 'IsFloating', 4),
1052607SN/A    'Fs1': ('FloatReg', 'sf', 'FS', 'IsFloating', 5),
1062607SN/A    'Fs2': ('FloatReg', 'sf', 'FS+1', 'IsFloating', 5),
1072607SN/A    'Ft1': ('FloatReg', 'sf', 'FT', 'IsFloating', 6),
1082607SN/A    'Ft2': ('FloatReg', 'sf', 'FT+1', 'IsFloating', 6),
1092607SN/A    'Fr1': ('FloatReg', 'sf', 'FR', 'IsFloating', 7),
1102607SN/A    'Fr2': ('FloatReg', 'sf', 'FR+1', 'IsFloating', 7),
1112607SN/A
1124661Sksewell@umich.edu    #Status Control Reg
1134661Sksewell@umich.edu    'Status': ('ControlReg', 'uw', 'MipsISA::Status', None, 1),
1144661Sksewell@umich.edu
1155222Sksewell@umich.edu    #LL Flag
1165222Sksewell@umich.edu    'LLFlag': ('ControlReg', 'uw', 'MipsISA::LLFlag', None, 1),
1175222Sksewell@umich.edu
1185222Sksewell@umich.edu    # Index Register
1195222Sksewell@umich.edu    'Index':('ControlReg','uw','MipsISA::Index',None,1),
1205222Sksewell@umich.edu
1215222Sksewell@umich.edu
1224661Sksewell@umich.edu    #Special cases for when a Control Register Access is dependent on
1234661Sksewell@umich.edu    #a combination of bitfield indices (handles MTCO & MFCO)
1245222Sksewell@umich.edu    # Fixed to allow CP0 Register Offset
1255222Sksewell@umich.edu    'CP0_RD_SEL': ('IControlReg', 'uw', '(RD << 3 | SEL) + Ctrl_Base_DepTag', None, 1),
1264661Sksewell@umich.edu
1274661Sksewell@umich.edu    #MT Control Regs
1284661Sksewell@umich.edu    'MVPConf0': ('ControlReg', 'uw', 'MipsISA::MVPConf0', None, 1),
1294661Sksewell@umich.edu    'MVPControl': ('ControlReg', 'uw', 'MipsISA::MVPControl', None, 1),
1304661Sksewell@umich.edu    'TCBind': ('ControlReg', 'uw', 'MipsISA::TCBind', None, 1),
1314661Sksewell@umich.edu    'TCStatus': ('ControlReg', 'uw', 'MipsISA::TCStatus', None, 1),
1324661Sksewell@umich.edu    'TCRestart': ('ControlReg', 'uw', 'MipsISA::TCRestart', None, 1),
1334661Sksewell@umich.edu    'VPEConf0': ('ControlReg', 'uw', 'MipsISA::VPEConf0', None, 1),
1344661Sksewell@umich.edu    'VPEControl': ('ControlReg', 'uw', 'MipsISA::VPEControl', None, 1),
1354661Sksewell@umich.edu    'YQMask': ('ControlReg', 'uw', 'MipsISA::YQMask', None, 1),
1364661Sksewell@umich.edu
1375222Sksewell@umich.edu    #CP0 Control Regs
1385222Sksewell@umich.edu    'EntryHi': ('ControlReg','uw', 'MipsISA::EntryHi',None,1),
1395222Sksewell@umich.edu    'EntryLo0': ('ControlReg','uw', 'MipsISA::EntryLo0',None,1),
1405222Sksewell@umich.edu    'EntryLo1': ('ControlReg','uw', 'MipsISA::EntryLo1',None,1),
1415222Sksewell@umich.edu    'PageMask': ('ControlReg','uw', 'MipsISA::PageMask',None,1),
1425222Sksewell@umich.edu    'Random': ('ControlReg','uw', 'MipsISA::CP0_Random',None,1),
1435222Sksewell@umich.edu    'ErrorEPC': ('ControlReg','uw', 'MipsISA::ErrorEPC',None,1),
1445222Sksewell@umich.edu    'EPC': ('ControlReg','uw', 'MipsISA::EPC',None,1),
1455222Sksewell@umich.edu    'DEPC': ('ControlReg','uw', 'MipsISA::DEPC',None,1),
1465222Sksewell@umich.edu    'SRSCtl': ('ControlReg','uw', 'MipsISA::SRSCtl',None,1),
1475222Sksewell@umich.edu    'Config': ('ControlReg','uw', 'MipsISA::Config',None,1),
1485222Sksewell@umich.edu    'Config3': ('ControlReg','uw', 'MipsISA::Config3',None,1),
1495222Sksewell@umich.edu    'Config1': ('ControlReg','uw', 'MipsISA::Config1',None,1),
1505222Sksewell@umich.edu    'Config2': ('ControlReg','uw', 'MipsISA::Config2',None,1),
1515222Sksewell@umich.edu    'PageGrain': ('ControlReg','uw', 'MipsISA::PageGrain',None,1),
1525222Sksewell@umich.edu
1535222Sksewell@umich.edu
1544661Sksewell@umich.edu    # named bitfields of Control Regs
1554661Sksewell@umich.edu    'Status_IE': ('ControlBitfield', 'uw', 'MipsISA::Status', None, 1),
1564661Sksewell@umich.edu    'Status_ERL': ('ControlBitfield', 'uw', 'MipsISA::Status', None, 1),
1574661Sksewell@umich.edu    'Status_EXL': ('ControlBitfield', 'uw', 'MipsISA::Status', None, 1),
1585222Sksewell@umich.edu    'Status_BEV': ('ControlBitfield', 'uw', 'MipsISA::Status', None, 1),
1594661Sksewell@umich.edu    'Status_CU3': ('ControlBitfield', 'uw', 'MipsISA::Status', None, 1),
1604661Sksewell@umich.edu    'Status_CU2': ('ControlBitfield', 'uw', 'MipsISA::Status', None, 1),
1614661Sksewell@umich.edu    'Status_CU1': ('ControlBitfield', 'uw', 'MipsISA::Status', None, 1),
1624661Sksewell@umich.edu    'Status_CU0': ('ControlBitfield', 'uw', 'MipsISA::Status', None, 1),
1634661Sksewell@umich.edu    'SRSCtl_HSS': ('ControlBitfield', 'uw', 'MipsISA::SRSCtl', None, 4),
1644661Sksewell@umich.edu    'SRSCtl_PSS': ('ControlBitfield', 'uw', 'MipsISA::SRSCtl', None, 4),
1654661Sksewell@umich.edu    'SRSCtl_CSS': ('ControlBitfield', 'uw', 'MipsISA::SRSCtl', None, 4),
1664661Sksewell@umich.edu    'Config_AR': ('ControlBitfield', 'uw', 'MipsISA::Config', None, 3),
1675222Sksewell@umich.edu    'Config_MT': ('ControlBitfield', 'uw', 'MipsISA::Config', None, 1),
1685222Sksewell@umich.edu    'Config1_CA': ('ControlBitfield', 'uw', 'MipsISA::Config1', None, 1),
1695222Sksewell@umich.edu    'Config3_SP': ('ControlBitfield', 'uw', 'MipsISA::Config3', None, 1),
1705222Sksewell@umich.edu    'PageGrain_ESP': ('ControlBitfield', 'uw', 'MipsISA::PageGrain', None, 1),
1715222Sksewell@umich.edu    'Cause_EXCCODE': ('ControlBitfield', 'uw', 'MipsISA::Cause', None, 4),
1725222Sksewell@umich.edu    'Cause_TI': ('ControlBitfield', 'uw', 'MipsISA::Cause', None, 4),
1735222Sksewell@umich.edu    'IntCtl_IPTI': ('ControlBitfield', 'uw', 'MipsISA::IntCtl', None, 4),
1745222Sksewell@umich.edu    'EntryHi_ASID': ('ControlBitfield', 'uw', 'MipsISA::EntryHi', None, 1),
1755222Sksewell@umich.edu    'EntryLo0_PFN': ('ControlBitfield', 'uw', 'MipsISA::EntryLo0', None, 1),
1765222Sksewell@umich.edu    'EntryLo0_C': ('ControlBitfield', 'uw', 'MipsISA::EntryLo0', None, 3),
1775222Sksewell@umich.edu    'EntryLo0_D': ('ControlBitfield', 'uw', 'MipsISA::EntryLo0', None, 1),
1785222Sksewell@umich.edu    'EntryLo0_V': ('ControlBitfield', 'uw', 'MipsISA::EntryLo0', None, 1),
1795222Sksewell@umich.edu    'EntryLo0_G': ('ControlBitfield', 'uw', 'MipsISA::EntryLo0', None, 1),
1805222Sksewell@umich.edu    'EntryLo1_PFN': ('ControlBitfield', 'uw', 'MipsISA::EntryLo1', None, 1),
1815222Sksewell@umich.edu    'EntryLo1_C': ('ControlBitfield', 'uw', 'MipsISA::EntryLo1', None, 3),
1825222Sksewell@umich.edu    'EntryLo1_D': ('ControlBitfield', 'uw', 'MipsISA::EntryLo1', None, 1),
1835222Sksewell@umich.edu    'EntryLo1_V': ('ControlBitfield', 'uw', 'MipsISA::EntryLo1', None, 1),
1845222Sksewell@umich.edu    'EntryLo1_G': ('ControlBitfield', 'uw', 'MipsISA::EntryLo1', None, 1),
1854661Sksewell@umich.edu
1864661Sksewell@umich.edu    # named bitfields of Debug Regs
1874661Sksewell@umich.edu    'Debug_DM': ('ControlBitfield', 'uw', 'MipsISA::Debug', None, 1),
1884661Sksewell@umich.edu    'Debug_IEXI': ('ControlBitfield', 'uw', 'MipsISA::Debug', None, 1),
1894661Sksewell@umich.edu
1902616SN/A    #Memory Operand
1912495SN/A    'Mem': ('Mem', 'uw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 4),
1922041SN/A
1932616SN/A    #Program Counter Operands
1944661Sksewell@umich.edu    'NPC': ('NPC', 'uw', None, 'IsControl', 4),
1954661Sksewell@umich.edu    'NNPC':('NNPC', 'uw', None, 'IsControl', 4)
1962023SN/A}};
197