operands.isa revision 2041 
1def operand_types {{
2    'sb' : ('signed int', 8),
3    'ub' : ('unsigned int', 8),
4    'shw' : ('signed int', 16),
5    'uhw' : ('unsigned int', 16),
6    'sw' : ('signed int', 32),
7    'uw' : ('unsigned int', 32),
8    'sdw' : ('signed int', 64),
9    'udw' : ('unsigned int', 64),
10    'sf' : ('float', 32),
11    'df' : ('float', 64),
12    'qf' : ('float', 128)
13}};
14
15def operands {{
16    'Rd': IntRegOperandTraits('uw', 'RD', 'IsInteger', 1),
17    'Rs': IntRegOperandTraits('uw', 'RS', 'IsInteger', 2),
18    'Rt': IntRegOperandTraits('uw', 'RT', 'IsInteger', 3),
19
20    'IntImm': IntRegOperandTraits('uw', 'INTIMM', 'IsInteger', 3),    
21    'Sa': IntRegOperandTraits('uw', 'SA', 'IsInteger', 4),    
22
23    'Fd': FloatRegOperandTraits('sf', 'FD', 'IsFloating', 1),
24    'Fs': FloatRegOperandTraits('sf', 'FS', 'IsFloating', 2),
25    'Ft': FloatRegOperandTraits('sf', 'FT', 'IsFloating', 3),
26
27    'Mem': MemOperandTraits('udw', None,
28                            ('IsMemRef', 'IsLoad', 'IsStore'), 4)
29
30    #'NPC': NPCOperandTraits('uq', None, ( None, None, 'IsControl' ), 4),
31    #'Runiq': ControlRegOperandTraits('uq', 'Uniq', None, 1),
32    #'FPCR':  ControlRegOperandTraits('uq', 'Fpcr', None, 1),
33    # The next two are hacks for non-full-system call-pal emulation
34    #'R0':  IntRegOperandTraits('uq', '0', None, 1),
35    #'R16': IntRegOperandTraits('uq', '16', None, 1)
36}};
37