includes.isa revision 8738
12SN/A// -*- mode:c++ -*- 21762SN/A 32SN/A// Copyright (c) 2007 MIPS Technologies, Inc. 42SN/A// All rights reserved. 52SN/A// 62SN/A// Redistribution and use in source and binary forms, with or without 72SN/A// modification, are permitted provided that the following conditions are 82SN/A// met: redistributions of source code must retain the above copyright 92SN/A// notice, this list of conditions and the following disclaimer; 102SN/A// redistributions in binary form must reproduce the above copyright 112SN/A// notice, this list of conditions and the following disclaimer in the 122SN/A// documentation and/or other materials provided with the distribution; 132SN/A// neither the name of the copyright holders nor the names of its 142SN/A// contributors may be used to endorse or promote products derived from 152SN/A// this software without specific prior written permission. 162SN/A// 172SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192SN/A// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222SN/A// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272665Ssaidi@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282665Ssaidi@eecs.umich.edu// 292665Ssaidi@eecs.umich.edu// Authors: Korey Sewell 302SN/A 312SN/A//////////////////////////////////////////////////////////////////// 322SN/A// 332SN/A// Output include file directives. 342SN/A// 357678Sgblack@eecs.umich.edu 368229Snate@binkert.orgoutput header {{ 372147SN/A#include <iomanip> 382147SN/A#include <iostream> 392680Sktlim@umich.edu#include <sstream> 402132SN/A 412147SN/A#include "arch/mips/isa_traits.hh" 425999Snate@binkert.org#include "arch/mips/types.hh" 432147SN/A#include "cpu/static_inst.hh" 4410474Sandreas.hansson@arm.com#include "mem/packet.hh" 452090SN/A}}; 462147SN/A 474695Sgblack@eecs.umich.eduoutput decoder {{ 4810417Sandreas.hansson@arm.com#include <math.h> 4910417Sandreas.hansson@arm.com 502SN/A#include "arch/mips/dsp.hh" 512SN/A#include "arch/mips/dt_constants.hh" 522612SN/A#include "arch/mips/faults.hh" 532612SN/A#include "arch/mips/isa_traits.hh" 542612SN/A#include "arch/mips/mt_constants.hh" 552612SN/A#include "arch/mips/pra_constants.hh" 562612SN/A#include "arch/mips/utility.hh" 572612SN/A#include "base/loader/symtab.hh" 582612SN/A#include "base/cprintf.hh" 592612SN/A#include "cpu/thread_context.hh" 602612SN/A#include "mem/packet.hh" 6111876Sbrandon.potter@amd.com#include "sim/full_system.hh" 6210417Sandreas.hansson@arm.com#if defined(linux) 6310417Sandreas.hansson@arm.com#include <fenv.h> 642612SN/A#endif 652612SN/A 668545Ssaidi@eecs.umich.eduusing namespace MipsISA; 678545Ssaidi@eecs.umich.edu}}; 688545Ssaidi@eecs.umich.edu 6911876Sbrandon.potter@amd.comoutput exec {{ 708545Ssaidi@eecs.umich.edu#include <math.h> 7110417Sandreas.hansson@arm.com 7210417Sandreas.hansson@arm.com#include "arch/generic/memhelpers.hh" 738545Ssaidi@eecs.umich.edu#include "arch/mips/dsp.hh" 748545Ssaidi@eecs.umich.edu#include "arch/mips/dt_constants.hh" 7511877Sbrandon.potter@amd.com#include "arch/mips/faults.hh" 7611877Sbrandon.potter@amd.com#include "arch/mips/isa_traits.hh" 7711877Sbrandon.potter@amd.com#include "arch/mips/mt.hh" 7811877Sbrandon.potter@amd.com#include "arch/mips/mt_constants.hh" 7911877Sbrandon.potter@amd.com#include "arch/mips/pagetable.hh" 8011877Sbrandon.potter@amd.com#include "arch/mips/pra_constants.hh" 8111877Sbrandon.potter@amd.com#include "arch/mips/tlb.hh" 8211877Sbrandon.potter@amd.com#include "arch/mips/utility.hh" 8311877Sbrandon.potter@amd.com#if defined(linux) 8411877Sbrandon.potter@amd.com#include <fenv.h> 8511877Sbrandon.potter@amd.com#endif 8611877Sbrandon.potter@amd.com 8711877Sbrandon.potter@amd.com#include "base/condcodes.hh" 8811877Sbrandon.potter@amd.com#include "cpu/base.hh" 8911877Sbrandon.potter@amd.com#include "cpu/exetrace.hh" 9011877Sbrandon.potter@amd.com#include "debug/MipsPRA.hh" 915004Sgblack@eecs.umich.edu#include "mem/packet.hh" 924183Sgblack@eecs.umich.edu#include "mem/packet_access.hh" 934183Sgblack@eecs.umich.edu#include "sim/eventq.hh" 944183Sgblack@eecs.umich.edu#include "sim/full_system.hh" 954183Sgblack@eecs.umich.edu#include "sim/sim_events.hh" 9611876Sbrandon.potter@amd.com#include "sim/sim_exit.hh" 975004Sgblack@eecs.umich.edu 9810417Sandreas.hansson@arm.comusing namespace MipsISA; 9910417Sandreas.hansson@arm.com}}; 1005004Sgblack@eecs.umich.edu 1015004Sgblack@eecs.umich.edu