util.isa revision 4661
12100SN/A// -*- mode:c++ -*-
22100SN/A
32754Sksewell@umich.edu// Copyright (c) 2006 The Regents of The University of Michigan
42706Sksewell@umich.edu// All rights reserved.
52706Sksewell@umich.edu//
62706Sksewell@umich.edu// Redistribution and use in source and binary forms, with or without
72706Sksewell@umich.edu// modification, are permitted provided that the following conditions are
82706Sksewell@umich.edu// met: redistributions of source code must retain the above copyright
92706Sksewell@umich.edu// notice, this list of conditions and the following disclaimer;
102706Sksewell@umich.edu// redistributions in binary form must reproduce the above copyright
112706Sksewell@umich.edu// notice, this list of conditions and the following disclaimer in the
122706Sksewell@umich.edu// documentation and/or other materials provided with the distribution;
132706Sksewell@umich.edu// neither the name of the copyright holders nor the names of its
142706Sksewell@umich.edu// contributors may be used to endorse or promote products derived from
152706Sksewell@umich.edu// this software without specific prior written permission.
162706Sksewell@umich.edu//
172706Sksewell@umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
182706Sksewell@umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
192706Sksewell@umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
202706Sksewell@umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
212706Sksewell@umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
222706Sksewell@umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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262706Sksewell@umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
272706Sksewell@umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
282706Sksewell@umich.edu//
292706Sksewell@umich.edu// Authors: Steve Reinhardt
302706Sksewell@umich.edu//          Korey Sewell
312706Sksewell@umich.edu
322100SN/Alet {{
332124SN/Adef LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
342124SN/A                  postacc_code = '', base_class = 'Memory',
352124SN/A                  decode_template = BasicDecode, exec_template_base = ''):
362124SN/A    # Make sure flags are in lists (convert to lists if not).
372124SN/A    mem_flags = makeList(mem_flags)
382124SN/A    inst_flags = makeList(inst_flags)
392124SN/A
402124SN/A    # add hook to get effective addresses into execution trace output.
412124SN/A    ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n'
422124SN/A
432124SN/A    # Some CPU models execute the memory operation as an atomic unit,
442124SN/A    # while others want to separate them into an effective address
452124SN/A    # computation and a memory access operation.  As a result, we need
462124SN/A    # to generate three StaticInst objects.  Note that the latter two
472124SN/A    # are nested inside the larger "atomic" one.
482124SN/A
493953Sstever@eecs.umich.edu    # Generate InstObjParams for each of the three objects.  Note that
503953Sstever@eecs.umich.edu    # they differ only in the set of code objects contained (which in
513953Sstever@eecs.umich.edu    # turn affects the object's overall operand list).
523953Sstever@eecs.umich.edu    iop = InstObjParams(name, Name, base_class,
533953Sstever@eecs.umich.edu                        { 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
543953Sstever@eecs.umich.edu                        inst_flags)
553953Sstever@eecs.umich.edu    ea_iop = InstObjParams(name, Name, base_class,
563953Sstever@eecs.umich.edu                        { 'ea_code':ea_code },
573953Sstever@eecs.umich.edu                        inst_flags)
583953Sstever@eecs.umich.edu    memacc_iop = InstObjParams(name, Name, base_class,
593953Sstever@eecs.umich.edu                        { 'memacc_code':memacc_code, 'postacc_code':postacc_code },
603953Sstever@eecs.umich.edu                        inst_flags)
612124SN/A
622124SN/A    if mem_flags:
632124SN/A        s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
642124SN/A        iop.constructor += s
652124SN/A        memacc_iop.constructor += s
662124SN/A
672124SN/A    # select templates
682935Sksewell@umich.edu
694056Sstever@eecs.umich.edu    # The InitiateAcc template is the same for StoreCond templates as the
704056Sstever@eecs.umich.edu    # corresponding Store template..
712935Sksewell@umich.edu    StoreCondInitiateAcc = StoreInitiateAcc
722935Sksewell@umich.edu
732124SN/A    memAccExecTemplate = eval(exec_template_base + 'MemAccExecute')
742124SN/A    fullExecTemplate = eval(exec_template_base + 'Execute')
752124SN/A    initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
762124SN/A    completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
772124SN/A
782124SN/A    # (header_output, decoder_output, decode_block, exec_output)
793953Sstever@eecs.umich.edu    return (LoadStoreDeclare.subst(iop),
803953Sstever@eecs.umich.edu            EACompConstructor.subst(ea_iop)
813953Sstever@eecs.umich.edu            + MemAccConstructor.subst(memacc_iop)
823953Sstever@eecs.umich.edu            + LoadStoreConstructor.subst(iop),
832124SN/A            decode_template.subst(iop),
842124SN/A            EACompExecute.subst(ea_iop)
852124SN/A            + memAccExecTemplate.subst(memacc_iop)
862124SN/A            + fullExecTemplate.subst(iop)
873953Sstever@eecs.umich.edu            + initiateAccTemplate.subst(iop)
883953Sstever@eecs.umich.edu            + completeAccTemplate.subst(iop))
892100SN/A}};
903953Sstever@eecs.umich.edu
912686Sksewell@umich.eduoutput header {{
922686Sksewell@umich.edu        std::string inst2string(MachInst machInst);
932686Sksewell@umich.edu}};
942124SN/A
952686Sksewell@umich.eduoutput decoder {{
962686Sksewell@umich.edu
972686Sksewell@umich.edustd::string inst2string(MachInst machInst)
982686Sksewell@umich.edu{
994661Sksewell@umich.edu    string str = "";
1002686Sksewell@umich.edu    uint32_t mask = 0x80000000;
1012686Sksewell@umich.edu
1022686Sksewell@umich.edu    for(int i=0; i < 32; i++) {
1032686Sksewell@umich.edu        if ((machInst & mask) == 0) {
1042686Sksewell@umich.edu            str += "0";
1052686Sksewell@umich.edu        } else {
1062686Sksewell@umich.edu            str += "1";
1072686Sksewell@umich.edu        }
1082686Sksewell@umich.edu
1092686Sksewell@umich.edu        mask = mask >> 1;
1102686Sksewell@umich.edu    }
1112686Sksewell@umich.edu
1122686Sksewell@umich.edu    return str;
1132686Sksewell@umich.edu}
1142686Sksewell@umich.edu
1152686Sksewell@umich.edu}};
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