unimp.isa revision 2649
12083SN/A// -*- mode:c++ -*- 22083SN/A 32083SN/A// Copyright (c) 2003-2005 The Regents of The University of Michigan 42083SN/A// All rights reserved. 52083SN/A// 62083SN/A// Redistribution and use in source and binary forms, with or without 72083SN/A// modification, are permitted provided that the following conditions are 82083SN/A// met: redistributions of source code must retain the above copyright 92083SN/A// notice, this list of conditions and the following disclaimer; 102083SN/A// redistributions in binary form must reproduce the above copyright 112083SN/A// notice, this list of conditions and the following disclaimer in the 122083SN/A// documentation and/or other materials provided with the distribution; 132083SN/A// neither the name of the copyright holders nor the names of its 142083SN/A// contributors may be used to endorse or promote products derived from 152083SN/A// this software without specific prior written permission. 162083SN/A// 172083SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 182083SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 192083SN/A// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 202083SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 212083SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 222083SN/A// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 232083SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 242083SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 252083SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 262083SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 272083SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 282083SN/A 292649Ssaidi@eecs.umich.edu//////////////////////////////////////////////////////////////////// 302649Ssaidi@eecs.umich.edu// 312649Ssaidi@eecs.umich.edu// Unimplemented instructions 322649Ssaidi@eecs.umich.edu// 332649Ssaidi@eecs.umich.edu 342083SN/Aoutput header {{ 352083SN/A /** 362083SN/A * Static instruction class for unimplemented instructions that 372083SN/A * cause simulator termination. Note that these are recognized 382083SN/A * (legal) instructions that the simulator does not support; the 392083SN/A * 'Unknown' class is used for unrecognized/illegal instructions. 402083SN/A * This is a leaf class. 412083SN/A */ 422125SN/A class FailUnimplemented : public MipsStaticInst 432083SN/A { 442083SN/A public: 452083SN/A /// Constructor 462083SN/A FailUnimplemented(const char *_mnemonic, MachInst _machInst) 472125SN/A : MipsStaticInst(_mnemonic, _machInst, No_OpClass) 482083SN/A { 492083SN/A // don't call execute() (which panics) if we're on a 502083SN/A // speculative path 512083SN/A flags[IsNonSpeculative] = true; 522083SN/A } 532083SN/A 542083SN/A %(BasicExecDeclare)s 552083SN/A 562083SN/A std::string 572083SN/A generateDisassembly(Addr pc, const SymbolTable *symtab) const; 582083SN/A }; 592083SN/A 602083SN/A /** 612083SN/A * Base class for unimplemented instructions that cause a warning 622083SN/A * to be printed (but do not terminate simulation). This 632083SN/A * implementation is a little screwy in that it will print a 642083SN/A * warning for each instance of a particular unimplemented machine 652083SN/A * instruction, not just for each unimplemented opcode. Should 662083SN/A * probably make the 'warned' flag a static member of the derived 672083SN/A * class. 682083SN/A */ 692125SN/A class WarnUnimplemented : public MipsStaticInst 702083SN/A { 712083SN/A private: 722083SN/A /// Have we warned on this instruction yet? 732083SN/A mutable bool warned; 742083SN/A 752083SN/A public: 762083SN/A /// Constructor 772083SN/A WarnUnimplemented(const char *_mnemonic, MachInst _machInst) 782125SN/A : MipsStaticInst(_mnemonic, _machInst, No_OpClass), warned(false) 792083SN/A { 802083SN/A // don't call execute() (which panics) if we're on a 812083SN/A // speculative path 822083SN/A flags[IsNonSpeculative] = true; 832083SN/A } 842083SN/A 852083SN/A %(BasicExecDeclare)s 862083SN/A 872083SN/A std::string 882083SN/A generateDisassembly(Addr pc, const SymbolTable *symtab) const; 892083SN/A }; 902083SN/A}}; 912083SN/A 922083SN/Aoutput decoder {{ 932083SN/A std::string 942083SN/A FailUnimplemented::generateDisassembly(Addr pc, 952083SN/A const SymbolTable *symtab) const 962083SN/A { 972083SN/A return csprintf("%-10s (unimplemented)", mnemonic); 982083SN/A } 992083SN/A 1002083SN/A std::string 1012083SN/A WarnUnimplemented::generateDisassembly(Addr pc, 1022083SN/A const SymbolTable *symtab) const 1032083SN/A { 1042083SN/A#ifdef SS_COMPATIBLE_DISASSEMBLY 1052083SN/A return csprintf("%-10s", mnemonic); 1062083SN/A#else 1072083SN/A return csprintf("%-10s (unimplemented)", mnemonic); 1082083SN/A#endif 1092083SN/A } 1102083SN/A}}; 1112083SN/A 1122083SN/Aoutput exec {{ 1132083SN/A Fault 1142083SN/A FailUnimplemented::execute(%(CPU_exec_context)s *xc, 1152083SN/A Trace::InstRecord *traceData) const 1162083SN/A { 1172083SN/A panic("attempt to execute unimplemented instruction '%s' " 1182495SN/A "(inst 0x%08x, opcode 0x%x, binary:%s)", mnemonic, machInst, OPCODE, 1192495SN/A inst2string(machInst)); 1202447SN/A return new UnimplementedOpcodeFault; 1212083SN/A } 1222083SN/A 1232083SN/A Fault 1242083SN/A WarnUnimplemented::execute(%(CPU_exec_context)s *xc, 1252083SN/A Trace::InstRecord *traceData) const 1262083SN/A { 1272083SN/A if (!warned) { 1282083SN/A warn("instruction '%s' unimplemented\n", mnemonic); 1292083SN/A warned = true; 1302083SN/A } 1312083SN/A 1322239SN/A return NoFault; 1332083SN/A } 1342083SN/A}}; 1352083SN/A 1362083SN/A 1372083SN/Adef format FailUnimpl() {{ 1382083SN/A iop = InstObjParams(name, 'FailUnimplemented') 1392083SN/A decode_block = BasicDecodeWithMnemonic.subst(iop) 1402083SN/A}}; 1412083SN/A 1422083SN/Adef format WarnUnimpl() {{ 1432083SN/A iop = InstObjParams(name, 'WarnUnimplemented') 1442083SN/A decode_block = BasicDecodeWithMnemonic.subst(iop) 1452083SN/A}}; 1462083SN/A 1472083SN/Aoutput header {{ 1482083SN/A /** 1492083SN/A * Static instruction class for unknown (illegal) instructions. 1502083SN/A * These cause simulator termination if they are executed in a 1512083SN/A * non-speculative mode. This is a leaf class. 1522083SN/A */ 1532125SN/A class Unknown : public MipsStaticInst 1542083SN/A { 1552083SN/A public: 1562083SN/A /// Constructor 1572083SN/A Unknown(MachInst _machInst) 1582125SN/A : MipsStaticInst("unknown", _machInst, No_OpClass) 1592083SN/A { 1602083SN/A // don't call execute() (which panics) if we're on a 1612083SN/A // speculative path 1622083SN/A flags[IsNonSpeculative] = true; 1632083SN/A } 1642083SN/A 1652083SN/A %(BasicExecDeclare)s 1662083SN/A 1672083SN/A std::string 1682083SN/A generateDisassembly(Addr pc, const SymbolTable *symtab) const; 1692083SN/A }; 1702083SN/A}}; 1712083SN/A 172