noop.isa revision 5268
12101SN/A// -*- mode:c++ -*- 22084SN/A 35268Sksewell@umich.edu// Copyright (c) 2007 MIPS Technologies, Inc. 45268Sksewell@umich.edu// All rights reserved. 55268Sksewell@umich.edu// 65268Sksewell@umich.edu// Redistribution and use in source and binary forms, with or without 75268Sksewell@umich.edu// modification, are permitted provided that the following conditions are 85268Sksewell@umich.edu// met: redistributions of source code must retain the above copyright 95268Sksewell@umich.edu// notice, this list of conditions and the following disclaimer; 105268Sksewell@umich.edu// redistributions in binary form must reproduce the above copyright 115268Sksewell@umich.edu// notice, this list of conditions and the following disclaimer in the 125268Sksewell@umich.edu// documentation and/or other materials provided with the distribution; 135268Sksewell@umich.edu// neither the name of the copyright holders nor the names of its 145268Sksewell@umich.edu// contributors may be used to endorse or promote products derived from 155268Sksewell@umich.edu// this software without specific prior written permission. 165268Sksewell@umich.edu// 175268Sksewell@umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 185268Sksewell@umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 195268Sksewell@umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 205268Sksewell@umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 215268Sksewell@umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 225268Sksewell@umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 235268Sksewell@umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 245268Sksewell@umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 255268Sksewell@umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 265268Sksewell@umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 275268Sksewell@umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 285268Sksewell@umich.edu// 295268Sksewell@umich.edu// Authors: Korey Sewell 302754Sksewell@umich.edu 312084SN/A//////////////////////////////////////////////////////////////////// 322084SN/A// 332084SN/A// Nop 342084SN/A// 352084SN/A 362084SN/Aoutput header {{ 372084SN/A /** 382084SN/A * Static instruction class for no-ops. This is a leaf class. 392084SN/A */ 402101SN/A class Nop : public MipsStaticInst 412084SN/A { 422084SN/A /// Disassembly of original instruction. 432084SN/A const std::string originalDisassembly; 442084SN/A 452084SN/A public: 462084SN/A /// Constructor 472084SN/A Nop(const std::string _originalDisassembly, MachInst _machInst) 482101SN/A : MipsStaticInst("nop", _machInst, No_OpClass), 492084SN/A originalDisassembly(_originalDisassembly) 502084SN/A { 512084SN/A flags[IsNop] = true; 522084SN/A } 532084SN/A 542084SN/A ~Nop() { } 552084SN/A 562084SN/A std::string 572084SN/A generateDisassembly(Addr pc, const SymbolTable *symtab) const; 582084SN/A 592084SN/A %(BasicExecDeclare)s 602084SN/A }; 612084SN/A}}; 622084SN/A 632084SN/Aoutput decoder {{ 642084SN/A std::string Nop::generateDisassembly(Addr pc, 652084SN/A const SymbolTable *symtab) const 662084SN/A { 672686Sksewell@umich.edu return csprintf("%-10s %s", "nop", originalDisassembly); 682084SN/A } 692084SN/A 702084SN/A /// Helper function for decoding nops. Substitute Nop object 712084SN/A /// for original inst passed in as arg (and delete latter). 722084SN/A inline 732101SN/A MipsStaticInst * 742101SN/A makeNop(MipsStaticInst *inst) 752084SN/A { 762750Sksewell@umich.edu std::string nop_str = "(" + inst->disassemble(0) + ")"; 772750Sksewell@umich.edu MipsStaticInst *nop = new Nop(nop_str, inst->machInst); 782084SN/A delete inst; 792084SN/A return nop; 802084SN/A } 812084SN/A}}; 822084SN/A 832084SN/Aoutput exec {{ 842084SN/A Fault 852084SN/A Nop::execute(%(CPU_exec_context)s *, Trace::InstRecord *) const 862084SN/A { 872239SN/A return NoFault; 882084SN/A } 892084SN/A}}; 902084SN/A 912750Sksewell@umich.edu// Int & FP operate instructions use RD as dest, so check for 922750Sksewell@umich.edu// RD == 0 to detect nops 932750Sksewell@umich.edudef template RegNopCheckDecode {{ 942750Sksewell@umich.edu { 952750Sksewell@umich.edu MipsStaticInst *i = new %(class_name)s(machInst); 962750Sksewell@umich.edu //if (RD == 0) { 972750Sksewell@umich.edu //i = makeNop(i); 982750Sksewell@umich.edu //} 992750Sksewell@umich.edu return i; 1002750Sksewell@umich.edu } 1012750Sksewell@umich.edu}}; 1022750Sksewell@umich.edu 1032084SN/Adef template OperateNopCheckDecode {{ 1042084SN/A { 1052101SN/A MipsStaticInst *i = new %(class_name)s(machInst); 1062750Sksewell@umich.edu //if (RD == 0) { 1072750Sksewell@umich.edu // i = makeNop(i); 1082750Sksewell@umich.edu //} 1092750Sksewell@umich.edu return i; 1102750Sksewell@umich.edu } 1112750Sksewell@umich.edu}}; 1122239SN/A 1132750Sksewell@umich.edu// IntImm & Memory instructions use Rt as dest, so check for 1142750Sksewell@umich.edu// Rt == 0 to detect nops 1152750Sksewell@umich.edudef template ImmNopCheckDecode {{ 1162750Sksewell@umich.edu { 1172750Sksewell@umich.edu MipsStaticInst *i = new %(class_name)s(machInst); 1182750Sksewell@umich.edu //if (RT == 0) { 1192750Sksewell@umich.edu // i = makeNop(i); 1202750Sksewell@umich.edu // } 1212084SN/A return i; 1222084SN/A } 1232084SN/A}}; 1242084SN/A 1252084SN/A 1262084SN/A// Like BasicOperate format, but generates NOP if RC/FC == 31 1272084SN/Adef format BasicOperateWithNopCheck(code, *opt_args) {{ 1283951Sgblack@eecs.umich.edu iop = InstObjParams(name, Name, 'MipsStaticInst', code, 1292084SN/A opt_args) 1302084SN/A header_output = BasicDeclare.subst(iop) 1312084SN/A decoder_output = BasicConstructor.subst(iop) 1322084SN/A decode_block = OperateNopCheckDecode.subst(iop) 1332084SN/A exec_output = BasicExecute.subst(iop) 1342084SN/A}}; 1352084SN/A 1362470SN/Adef format Nop() {{ 1372686Sksewell@umich.edu decode_block = 'return new Nop(\"\",machInst);\n' 1382470SN/A}}; 1392470SN/A 140