mt.isa revision 2741
17949SN/A// -*- mode:c++ -*- 27949SN/A 37949SN/A// Copyright (c) 2006 The Regents of The University of Michigan 47949SN/A// All rights reserved. 57949SN/A// 67949SN/A// Redistribution and use in source and binary forms, with or without 77949SN/A// modification, are permitted provided that the following conditions are 87949SN/A// met: redistributions of source code must retain the above copyright 97949SN/A// notice, this list of conditions and the following disclaimer; 107949SN/A// redistributions in binary form must reproduce the above copyright 117949SN/A// notice, this list of conditions and the following disclaimer in the 127949SN/A// documentation and/or other materials provided with the distribution; 137949SN/A// neither the name of the copyright holders nor the names of its 147949SN/A// contributors may be used to endorse or promote products derived from 157949SN/A// this software without specific prior written permission. 167949SN/A// 177949SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 187949SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 197949SN/A// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 207949SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 217949SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 227949SN/A// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 237949SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 247949SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 257949SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 267949SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 277949SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 287949SN/A// 297949SN/A// Authors: Korey Sewell 307949SN/A 317949SN/A//////////////////////////////////////////////////////////////////// 327949SN/A// 337949SN/A// MT instructions 347949SN/A// 357949SN/A 367949SN/Aoutput header {{ 377949SN/A /** 387949SN/A * Base class for MIPS MT ASE operations. 397949SN/A */ 407949SN/A class MT : public MipsStaticInst 419330Schander.sudanthi@arm.com { 429330Schander.sudanthi@arm.com protected: 439330Schander.sudanthi@arm.com 449330Schander.sudanthi@arm.com /// Constructor 459330Schander.sudanthi@arm.com MT(const char *mnem, MachInst _machInst, OpClass __opClass) : 467949SN/A MipsStaticInst(mnem, _machInst, __opClass) 477949SN/A { 487949SN/A } 49 50 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 51 }; 52}}; 53 54output decoder {{ 55 //Edit This Template When MT is Implemented 56 std::string MT::generateDisassembly(Addr pc, const SymbolTable *symtab) const 57 { 58 return "Disassembly of MT instruction\n"; 59 } 60}}; 61 62def template MTExecute {{ 63 //Edit This Template When MT is Implemented 64 Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 65 { 66 //Write the resulting state to the execution context 67 %(op_wb)s; 68 69 //Call into the trap handler with the appropriate fault 70 return No_Fault; 71 } 72}}; 73 74// Primary format for integer operate instructions: 75def format MipsMT() {{ 76 code = 'panic(\"Mips MT Is Currently Unimplemented.\");\n' 77 iop = InstObjParams(name, Name, 'MT', CodeBlock(code)) 78 header_output = BasicDeclare.subst(iop) 79 decoder_output = BasicConstructor.subst(iop) 80 decode_block = BasicDecode.subst(iop) 81 exec_output = BasicExecute.subst(iop) 82}}; 83