decoder.isa revision 7792
19883Sandreas@sandberg.pp.se// -*- mode:c++ -*- 29883Sandreas@sandberg.pp.se 39883Sandreas@sandberg.pp.se// Copyright (c) 2007 MIPS Technologies, Inc. 49883Sandreas@sandberg.pp.se// All rights reserved. 59883Sandreas@sandberg.pp.se// 69883Sandreas@sandberg.pp.se// Redistribution and use in source and binary forms, with or without 79883Sandreas@sandberg.pp.se// modification, are permitted provided that the following conditions are 89883Sandreas@sandberg.pp.se// met: redistributions of source code must retain the above copyright 99883Sandreas@sandberg.pp.se// notice, this list of conditions and the following disclaimer; 109883Sandreas@sandberg.pp.se// redistributions in binary form must reproduce the above copyright 119883Sandreas@sandberg.pp.se// notice, this list of conditions and the following disclaimer in the 129883Sandreas@sandberg.pp.se// documentation and/or other materials provided with the distribution; 139883Sandreas@sandberg.pp.se// neither the name of the copyright holders nor the names of its 149883Sandreas@sandberg.pp.se// contributors may be used to endorse or promote products derived from 159883Sandreas@sandberg.pp.se// this software without specific prior written permission. 169883Sandreas@sandberg.pp.se// 179883Sandreas@sandberg.pp.se// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 189883Sandreas@sandberg.pp.se// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 199883Sandreas@sandberg.pp.se// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 209883Sandreas@sandberg.pp.se// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 219883Sandreas@sandberg.pp.se// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 229883Sandreas@sandberg.pp.se// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 239883Sandreas@sandberg.pp.se// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 249883Sandreas@sandberg.pp.se// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 259883Sandreas@sandberg.pp.se// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 269883Sandreas@sandberg.pp.se// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 279883Sandreas@sandberg.pp.se// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 289883Sandreas@sandberg.pp.se// 299883Sandreas@sandberg.pp.se// Authors: Korey Sewell 309883Sandreas@sandberg.pp.se// Brett Miller 3111793Sbrandon.potter@amd.com// Jaidev Patwardhan 3211793Sbrandon.potter@amd.com 339883Sandreas@sandberg.pp.se//////////////////////////////////////////////////////////////////// 349883Sandreas@sandberg.pp.se// 359883Sandreas@sandberg.pp.se// The actual MIPS32 ISA decoder 369883Sandreas@sandberg.pp.se// ----------------------------- 379883Sandreas@sandberg.pp.se// The following instructions are specified in the MIPS32 ISA 389883Sandreas@sandberg.pp.se// Specification. Decoding closely follows the style specified 3911793Sbrandon.potter@amd.com// in the MIPS32 ISA specification document starting with Table 4011793Sbrandon.potter@amd.com// A-2 (document available @ http://www.mips.com) 419883Sandreas@sandberg.pp.se// 429883Sandreas@sandberg.pp.sedecode OPCODE_HI default Unknown::unknown() { 439883Sandreas@sandberg.pp.se //Table A-2 449883Sandreas@sandberg.pp.se 0x0: decode OPCODE_LO { 459883Sandreas@sandberg.pp.se 0x0: decode FUNCTION_HI { 469883Sandreas@sandberg.pp.se 0x0: decode FUNCTION_LO { 479883Sandreas@sandberg.pp.se 0x1: decode MOVCI { 489883Sandreas@sandberg.pp.se format BasicOp { 499883Sandreas@sandberg.pp.se 0: movf({{ 509883Sandreas@sandberg.pp.se Rd = (getCondCode(FCSR, CC) == 0) ? Rd : Rs; 519883Sandreas@sandberg.pp.se }}); 529883Sandreas@sandberg.pp.se 1: movt({{ 539883Sandreas@sandberg.pp.se Rd = (getCondCode(FCSR, CC) == 1) ? Rd : Rs; 549883Sandreas@sandberg.pp.se }}); 559883Sandreas@sandberg.pp.se } 569883Sandreas@sandberg.pp.se } 579886Sandreas@sandberg.pp.se 589886Sandreas@sandberg.pp.se format BasicOp { 599886Sandreas@sandberg.pp.se //Table A-3 Note: "Specific encodings of the rd, rs, and 609886Sandreas@sandberg.pp.se //rt fields are used to distinguish SLL, SSNOP, and EHB 619886Sandreas@sandberg.pp.se //functions 629886Sandreas@sandberg.pp.se 0x0: decode RS { 639886Sandreas@sandberg.pp.se 0x0: decode RT_RD { 649886Sandreas@sandberg.pp.se 0x0: decode SA default Nop::nop() { 659886Sandreas@sandberg.pp.se 0x1: ssnop({{;}}); 669886Sandreas@sandberg.pp.se 0x3: ehb({{;}}); 679886Sandreas@sandberg.pp.se } 689886Sandreas@sandberg.pp.se default: sll({{ Rd = Rt.uw << SA; }}); 699886Sandreas@sandberg.pp.se } 709886Sandreas@sandberg.pp.se } 719890Sandreas@sandberg.pp.se 729890Sandreas@sandberg.pp.se 0x2: decode RS_SRL { 739890Sandreas@sandberg.pp.se 0x0:decode SRL { 749890Sandreas@sandberg.pp.se 0: srl({{ Rd = Rt.uw >> SA; }}); 759890Sandreas@sandberg.pp.se 769890Sandreas@sandberg.pp.se //Hardcoded assuming 32-bit ISA, 779890Sandreas@sandberg.pp.se //probably need parameter here 789890Sandreas@sandberg.pp.se 1: rotr({{ 799890Sandreas@sandberg.pp.se Rd = (Rt.uw << (32 - SA)) | (Rt.uw >> SA); 809890Sandreas@sandberg.pp.se }}); 819890Sandreas@sandberg.pp.se } 829890Sandreas@sandberg.pp.se } 839890Sandreas@sandberg.pp.se 849890Sandreas@sandberg.pp.se 0x3: decode RS { 859890Sandreas@sandberg.pp.se 0x0: sra({{ 869890Sandreas@sandberg.pp.se uint32_t temp = Rt >> SA; 879890Sandreas@sandberg.pp.se if ( (Rt & 0x80000000) > 0 ) { 889890Sandreas@sandberg.pp.se uint32_t mask = 0x80000000; 899890Sandreas@sandberg.pp.se for(int i=0; i < SA; i++) { 909890Sandreas@sandberg.pp.se temp |= mask; 919890Sandreas@sandberg.pp.se mask = mask >> 1; 929890Sandreas@sandberg.pp.se } 939890Sandreas@sandberg.pp.se } 949890Sandreas@sandberg.pp.se Rd = temp; 959890Sandreas@sandberg.pp.se }}); 969890Sandreas@sandberg.pp.se } 979890Sandreas@sandberg.pp.se 989890Sandreas@sandberg.pp.se 0x4: sllv({{ Rd = Rt.uw << Rs<4:0>; }}); 999890Sandreas@sandberg.pp.se 1009890Sandreas@sandberg.pp.se 0x6: decode SRLV { 1019890Sandreas@sandberg.pp.se 0: srlv({{ Rd = Rt.uw >> Rs<4:0>; }}); 1029890Sandreas@sandberg.pp.se 1039886Sandreas@sandberg.pp.se //Hardcoded assuming 32-bit ISA, 1049883Sandreas@sandberg.pp.se //probably need parameter here 1059883Sandreas@sandberg.pp.se 1: rotrv({{ 1069883Sandreas@sandberg.pp.se Rd = (Rt.uw << (32 - Rs<4:0>)) | 1079883Sandreas@sandberg.pp.se (Rt.uw >> Rs<4:0>); 1089883Sandreas@sandberg.pp.se }}); 1099883Sandreas@sandberg.pp.se } 1109883Sandreas@sandberg.pp.se 1119883Sandreas@sandberg.pp.se 0x7: srav({{ 1129883Sandreas@sandberg.pp.se int shift_amt = Rs<4:0>; 1139883Sandreas@sandberg.pp.se 1149883Sandreas@sandberg.pp.se uint32_t temp = Rt >> shift_amt; 1159883Sandreas@sandberg.pp.se 1169883Sandreas@sandberg.pp.se if ((Rt & 0x80000000) > 0) { 1179883Sandreas@sandberg.pp.se uint32_t mask = 0x80000000; 1189883Sandreas@sandberg.pp.se for (int i = 0; i < shift_amt; i++) { 1199883Sandreas@sandberg.pp.se temp |= mask; 1209883Sandreas@sandberg.pp.se mask = mask >> 1; 1219883Sandreas@sandberg.pp.se } 12211321Ssteve.reinhardt@amd.com } 1239883Sandreas@sandberg.pp.se Rd = temp; 1249883Sandreas@sandberg.pp.se }}); 1259883Sandreas@sandberg.pp.se } 1269883Sandreas@sandberg.pp.se } 1279883Sandreas@sandberg.pp.se 1289883Sandreas@sandberg.pp.se 0x1: decode FUNCTION_LO { 1299883Sandreas@sandberg.pp.se //Table A-3 Note: "Specific encodings of the hint field are 1309883Sandreas@sandberg.pp.se //used to distinguish JR from JR.HB and JALR from JALR.HB" 1319883Sandreas@sandberg.pp.se format Jump { 1329883Sandreas@sandberg.pp.se 0x0: decode HINT { 13311321Ssteve.reinhardt@amd.com 0x1: jr_hb({{ 1349883Sandreas@sandberg.pp.se Config1Reg config1 = Config1; 1359883Sandreas@sandberg.pp.se if (config1.ca == 0) { 1369883Sandreas@sandberg.pp.se NNPC = Rs; 1379883Sandreas@sandberg.pp.se } else { 1389883Sandreas@sandberg.pp.se panic("MIPS16e not supported\n"); 1399883Sandreas@sandberg.pp.se } 1409883Sandreas@sandberg.pp.se }}, IsReturn, ClearHazards); 1419883Sandreas@sandberg.pp.se default: jr({{ 1429883Sandreas@sandberg.pp.se Config1Reg config1 = Config1; 14311321Ssteve.reinhardt@amd.com if (config1.ca == 0) { 1449883Sandreas@sandberg.pp.se NNPC = Rs; 1459883Sandreas@sandberg.pp.se } else { 1469883Sandreas@sandberg.pp.se panic("MIPS16e not supported\n"); 1479883Sandreas@sandberg.pp.se } 1489883Sandreas@sandberg.pp.se }}, IsReturn); 1499883Sandreas@sandberg.pp.se } 1509883Sandreas@sandberg.pp.se 1519883Sandreas@sandberg.pp.se 0x1: decode HINT { 1529883Sandreas@sandberg.pp.se 0x1: jalr_hb({{ 1539883Sandreas@sandberg.pp.se Rd = NNPC; 1549883Sandreas@sandberg.pp.se NNPC = Rs; 15511321Ssteve.reinhardt@amd.com }}, IsCall, ClearHazards); 1569883Sandreas@sandberg.pp.se default: jalr({{ 1579883Sandreas@sandberg.pp.se Rd = NNPC; 1589883Sandreas@sandberg.pp.se NNPC = Rs; 1599883Sandreas@sandberg.pp.se }}, IsCall); 1609883Sandreas@sandberg.pp.se } 16111321Ssteve.reinhardt@amd.com } 1629883Sandreas@sandberg.pp.se 1639883Sandreas@sandberg.pp.se format BasicOp { 1649883Sandreas@sandberg.pp.se 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }}); 1659883Sandreas@sandberg.pp.se 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }}); 1669883Sandreas@sandberg.pp.se#if FULL_SYSTEM 1679883Sandreas@sandberg.pp.se 0x4: syscall({{ fault = new SystemCallFault(); }}); 1689883Sandreas@sandberg.pp.se#else 1699883Sandreas@sandberg.pp.se 0x4: syscall({{ xc->syscall(R2); }}, 1709883Sandreas@sandberg.pp.se IsSerializeAfter, IsNonSpeculative); 1719883Sandreas@sandberg.pp.se#endif 1729883Sandreas@sandberg.pp.se 0x7: sync({{ ; }}, IsMemBarrier); 1739883Sandreas@sandberg.pp.se 0x5: break({{fault = new BreakpointFault();}}); 1749883Sandreas@sandberg.pp.se } 1759883Sandreas@sandberg.pp.se 1769883Sandreas@sandberg.pp.se } 1779883Sandreas@sandberg.pp.se 1789883Sandreas@sandberg.pp.se 0x2: decode FUNCTION_LO { 1799883Sandreas@sandberg.pp.se 0x0: HiLoRsSelOp::mfhi({{ Rd = HI_RS_SEL; }}, 1809883Sandreas@sandberg.pp.se IntMultOp, IsIprAccess); 1819883Sandreas@sandberg.pp.se 0x1: HiLoRdSelOp::mthi({{ HI_RD_SEL = Rs; }}); 1829883Sandreas@sandberg.pp.se 0x2: HiLoRsSelOp::mflo({{ Rd = LO_RS_SEL; }}, 1839883Sandreas@sandberg.pp.se IntMultOp, IsIprAccess); 1849883Sandreas@sandberg.pp.se 0x3: HiLoRdSelOp::mtlo({{ LO_RD_SEL = Rs; }}); 1859883Sandreas@sandberg.pp.se } 1869883Sandreas@sandberg.pp.se 1879883Sandreas@sandberg.pp.se 0x3: decode FUNCTION_LO { 1889883Sandreas@sandberg.pp.se format HiLoRdSelValOp { 1899883Sandreas@sandberg.pp.se 0x0: mult({{ val = Rs.sd * Rt.sd; }}, IntMultOp); 1909883Sandreas@sandberg.pp.se 0x1: multu({{ val = Rs.ud * Rt.ud; }}, IntMultOp); 1919883Sandreas@sandberg.pp.se } 1929883Sandreas@sandberg.pp.se 1939883Sandreas@sandberg.pp.se format HiLoOp { 1949883Sandreas@sandberg.pp.se 0x2: div({{ 1959883Sandreas@sandberg.pp.se if (Rt.sd != 0) { 1969883Sandreas@sandberg.pp.se HI0 = Rs.sd % Rt.sd; 1979883Sandreas@sandberg.pp.se LO0 = Rs.sd / Rt.sd; 1989883Sandreas@sandberg.pp.se } 1999883Sandreas@sandberg.pp.se }}, IntDivOp); 2009883Sandreas@sandberg.pp.se 2019883Sandreas@sandberg.pp.se 0x3: divu({{ 2029883Sandreas@sandberg.pp.se if (Rt.ud != 0) { 2039883Sandreas@sandberg.pp.se HI0 = Rs.ud % Rt.ud; 2049883Sandreas@sandberg.pp.se LO0 = Rs.ud / Rt.ud; 2059883Sandreas@sandberg.pp.se } 2069883Sandreas@sandberg.pp.se }}, IntDivOp); 2079883Sandreas@sandberg.pp.se } 2089883Sandreas@sandberg.pp.se } 2099883Sandreas@sandberg.pp.se 2109883Sandreas@sandberg.pp.se 0x4: decode HINT { 2119883Sandreas@sandberg.pp.se 0x0: decode FUNCTION_LO { 2129883Sandreas@sandberg.pp.se format IntOp { 2139883Sandreas@sandberg.pp.se 0x0: add({{ 2149883Sandreas@sandberg.pp.se /* More complicated since an ADD can cause 2159883Sandreas@sandberg.pp.se an arithmetic overflow exception */ 2169883Sandreas@sandberg.pp.se int64_t Src1 = Rs.sw; 2179883Sandreas@sandberg.pp.se int64_t Src2 = Rt.sw; 2189883Sandreas@sandberg.pp.se int64_t temp_result; 2199883Sandreas@sandberg.pp.se#if FULL_SYSTEM 2209883Sandreas@sandberg.pp.se if (((Src1 >> 31) & 1) == 1) 2219883Sandreas@sandberg.pp.se Src1 |= 0x100000000LL; 2229883Sandreas@sandberg.pp.se#endif 2239883Sandreas@sandberg.pp.se temp_result = Src1 + Src2; 2249883Sandreas@sandberg.pp.se#if FULL_SYSTEM 2259883Sandreas@sandberg.pp.se if (bits(temp_result, 31) == 2269883Sandreas@sandberg.pp.se bits(temp_result, 32)) { 2279883Sandreas@sandberg.pp.se#endif 2289883Sandreas@sandberg.pp.se Rd.sw = temp_result; 2299883Sandreas@sandberg.pp.se#if FULL_SYSTEM 2309883Sandreas@sandberg.pp.se } else { 2319883Sandreas@sandberg.pp.se fault = new ArithmeticFault(); 2329883Sandreas@sandberg.pp.se } 2339883Sandreas@sandberg.pp.se#endif 2349883Sandreas@sandberg.pp.se }}); 2359883Sandreas@sandberg.pp.se 0x1: addu({{ Rd.sw = Rs.sw + Rt.sw;}}); 2369883Sandreas@sandberg.pp.se 0x2: sub({{ 2379883Sandreas@sandberg.pp.se /* More complicated since an SUB can cause 2389883Sandreas@sandberg.pp.se an arithmetic overflow exception */ 2399883Sandreas@sandberg.pp.se int64_t Src1 = Rs.sw; 2409883Sandreas@sandberg.pp.se int64_t Src2 = Rt.sw; 2419883Sandreas@sandberg.pp.se int64_t temp_result = Src1 - Src2; 2429883Sandreas@sandberg.pp.se#if FULL_SYSTEM 2439883Sandreas@sandberg.pp.se if (bits(temp_result, 31) == 2449890Sandreas@sandberg.pp.se bits(temp_result, 32)) { 2459883Sandreas@sandberg.pp.se#endif 2469890Sandreas@sandberg.pp.se Rd.sw = temp_result; 2479890Sandreas@sandberg.pp.se#if FULL_SYSTEM 2489890Sandreas@sandberg.pp.se } else { 2499890Sandreas@sandberg.pp.se fault = new ArithmeticFault(); 2509890Sandreas@sandberg.pp.se } 2519890Sandreas@sandberg.pp.se#endif 2529890Sandreas@sandberg.pp.se }}); 2539890Sandreas@sandberg.pp.se 0x3: subu({{ Rd.sw = Rs.sw - Rt.sw; }}); 2549890Sandreas@sandberg.pp.se 0x4: and({{ Rd = Rs & Rt; }}); 2559890Sandreas@sandberg.pp.se 0x5: or({{ Rd = Rs | Rt; }}); 2569890Sandreas@sandberg.pp.se 0x6: xor({{ Rd = Rs ^ Rt; }}); 2579890Sandreas@sandberg.pp.se 0x7: nor({{ Rd = ~(Rs | Rt); }}); 2589890Sandreas@sandberg.pp.se } 2599890Sandreas@sandberg.pp.se } 2609890Sandreas@sandberg.pp.se } 2619890Sandreas@sandberg.pp.se 2629890Sandreas@sandberg.pp.se 0x5: decode HINT { 2639883Sandreas@sandberg.pp.se 0x0: decode FUNCTION_LO { 2649890Sandreas@sandberg.pp.se format IntOp{ 2659890Sandreas@sandberg.pp.se 0x2: slt({{ Rd.sw = (Rs.sw < Rt.sw) ? 1 : 0 }}); 2669890Sandreas@sandberg.pp.se 0x3: sltu({{ Rd.uw = (Rs.uw < Rt.uw) ? 1 : 0 }}); 2679890Sandreas@sandberg.pp.se } 2689890Sandreas@sandberg.pp.se } 2699890Sandreas@sandberg.pp.se } 2709890Sandreas@sandberg.pp.se 2719890Sandreas@sandberg.pp.se 0x6: decode FUNCTION_LO { 2729890Sandreas@sandberg.pp.se format Trap { 2739890Sandreas@sandberg.pp.se 0x0: tge({{ cond = (Rs.sw >= Rt.sw); }}); 2749890Sandreas@sandberg.pp.se 0x1: tgeu({{ cond = (Rs.uw >= Rt.uw); }}); 2759890Sandreas@sandberg.pp.se 0x2: tlt({{ cond = (Rs.sw < Rt.sw); }}); 2769890Sandreas@sandberg.pp.se 0x3: tltu({{ cond = (Rs.uw < Rt.uw); }}); 2779890Sandreas@sandberg.pp.se 0x4: teq({{ cond = (Rs.sw == Rt.sw); }}); 2789890Sandreas@sandberg.pp.se 0x6: tne({{ cond = (Rs.sw != Rt.sw); }}); 2799890Sandreas@sandberg.pp.se } 2809890Sandreas@sandberg.pp.se } 2819890Sandreas@sandberg.pp.se } 2829890Sandreas@sandberg.pp.se 2839890Sandreas@sandberg.pp.se 0x1: decode REGIMM_HI { 2849890Sandreas@sandberg.pp.se 0x0: decode REGIMM_LO { 2859883Sandreas@sandberg.pp.se format Branch { 2869883Sandreas@sandberg.pp.se 0x0: bltz({{ cond = (Rs.sw < 0); }}); 2879890Sandreas@sandberg.pp.se 0x1: bgez({{ cond = (Rs.sw >= 0); }}); 2889883Sandreas@sandberg.pp.se 0x2: bltzl({{ cond = (Rs.sw < 0); }}, Likely); 2899883Sandreas@sandberg.pp.se 0x3: bgezl({{ cond = (Rs.sw >= 0); }}, Likely); 2909883Sandreas@sandberg.pp.se } 2919890Sandreas@sandberg.pp.se } 2929890Sandreas@sandberg.pp.se 2939890Sandreas@sandberg.pp.se 0x1: decode REGIMM_LO { 2949883Sandreas@sandberg.pp.se format TrapImm { 2959890Sandreas@sandberg.pp.se 0x0: tgei( {{ cond = (Rs.sw >= (int16_t)INTIMM); }}); 2969883Sandreas@sandberg.pp.se 0x1: tgeiu({{ 2979890Sandreas@sandberg.pp.se cond = (Rs.uw >= (uint32_t)(int32_t)(int16_t)INTIMM); 2989890Sandreas@sandberg.pp.se }}); 2999883Sandreas@sandberg.pp.se 0x2: tlti( {{ cond = (Rs.sw < (int16_t)INTIMM); }}); 3009883Sandreas@sandberg.pp.se 0x3: tltiu({{ 3019883Sandreas@sandberg.pp.se cond = (Rs.uw < (uint32_t)(int32_t)(int16_t)INTIMM); 3029883Sandreas@sandberg.pp.se }}); 3039883Sandreas@sandberg.pp.se 0x4: teqi( {{ cond = (Rs.sw == (int16_t)INTIMM); }}); 3049883Sandreas@sandberg.pp.se 0x6: tnei( {{ cond = (Rs.sw != (int16_t)INTIMM); }}); 3059883Sandreas@sandberg.pp.se } 3069883Sandreas@sandberg.pp.se } 3079883Sandreas@sandberg.pp.se 3089883Sandreas@sandberg.pp.se 0x2: decode REGIMM_LO { 3099883Sandreas@sandberg.pp.se format Branch { 3109890Sandreas@sandberg.pp.se 0x0: bltzal({{ cond = (Rs.sw < 0); }}, Link); 3119890Sandreas@sandberg.pp.se 0x1: decode RS { 3129890Sandreas@sandberg.pp.se 0x0: bal ({{ cond = 1; }}, IsCall, Link); 3139890Sandreas@sandberg.pp.se default: bgezal({{ cond = (Rs.sw >= 0); }}, Link); 3149890Sandreas@sandberg.pp.se } 3159890Sandreas@sandberg.pp.se 0x2: bltzall({{ cond = (Rs.sw < 0); }}, Link, Likely); 3169890Sandreas@sandberg.pp.se 0x3: bgezall({{ cond = (Rs.sw >= 0); }}, Link, Likely); 3179890Sandreas@sandberg.pp.se } 3189890Sandreas@sandberg.pp.se } 3199890Sandreas@sandberg.pp.se 3209890Sandreas@sandberg.pp.se 0x3: decode REGIMM_LO { 3219890Sandreas@sandberg.pp.se // from Table 5-4 MIPS32 REGIMM Encoding of rt Field 3229890Sandreas@sandberg.pp.se // (DSP ASE MANUAL) 3239890Sandreas@sandberg.pp.se 0x4: DspBranch::bposge32({{ cond = (dspctl<5:0> >= 32); }}); 3249883Sandreas@sandberg.pp.se format WarnUnimpl { 3259883Sandreas@sandberg.pp.se 0x7: synci(); 3269883Sandreas@sandberg.pp.se } 3279883Sandreas@sandberg.pp.se } 3289883Sandreas@sandberg.pp.se } 3299883Sandreas@sandberg.pp.se 3309883Sandreas@sandberg.pp.se format Jump { 3319883Sandreas@sandberg.pp.se 0x2: j({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }}); 3329883Sandreas@sandberg.pp.se 0x3: jal({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }}, 3339883Sandreas@sandberg.pp.se IsCall, Link); 3349883Sandreas@sandberg.pp.se } 3359883Sandreas@sandberg.pp.se 3369883Sandreas@sandberg.pp.se format Branch { 3379883Sandreas@sandberg.pp.se 0x4: decode RS_RT { 3389883Sandreas@sandberg.pp.se 0x0: b({{ cond = 1; }}); 3399883Sandreas@sandberg.pp.se default: beq({{ cond = (Rs.sw == Rt.sw); }}); 3409883Sandreas@sandberg.pp.se } 3419883Sandreas@sandberg.pp.se 0x5: bne({{ cond = (Rs.sw != Rt.sw); }}); 3429883Sandreas@sandberg.pp.se 0x6: blez({{ cond = (Rs.sw <= 0); }}); 3439883Sandreas@sandberg.pp.se 0x7: bgtz({{ cond = (Rs.sw > 0); }}); 3449883Sandreas@sandberg.pp.se } 3459883Sandreas@sandberg.pp.se } 3469883Sandreas@sandberg.pp.se 3479883Sandreas@sandberg.pp.se 0x1: decode OPCODE_LO { 3489883Sandreas@sandberg.pp.se format IntImmOp { 3499883Sandreas@sandberg.pp.se 0x0: addi({{ 3509883Sandreas@sandberg.pp.se int64_t Src1 = Rs.sw; 3519883Sandreas@sandberg.pp.se int64_t Src2 = imm; 3529883Sandreas@sandberg.pp.se int64_t temp_result; 3539883Sandreas@sandberg.pp.se#if FULL_SYSTEM 3549883Sandreas@sandberg.pp.se if (((Src1 >> 31) & 1) == 1) 3559883Sandreas@sandberg.pp.se Src1 |= 0x100000000LL; 3569883Sandreas@sandberg.pp.se#endif 3579883Sandreas@sandberg.pp.se temp_result = Src1 + Src2; 3589883Sandreas@sandberg.pp.se#if FULL_SYSTEM 3599883Sandreas@sandberg.pp.se if (bits(temp_result, 31) == bits(temp_result, 32)) { 3609883Sandreas@sandberg.pp.se#endif 3619883Sandreas@sandberg.pp.se Rt.sw = temp_result; 3629883Sandreas@sandberg.pp.se#if FULL_SYSTEM 3639883Sandreas@sandberg.pp.se } else { 3649883Sandreas@sandberg.pp.se fault = new ArithmeticFault(); 3659883Sandreas@sandberg.pp.se } 3669883Sandreas@sandberg.pp.se#endif 3679883Sandreas@sandberg.pp.se }}); 3689883Sandreas@sandberg.pp.se 0x1: addiu({{ Rt.sw = Rs.sw + imm; }}); 3699884Sandreas@sandberg.pp.se 0x2: slti({{ Rt.sw = (Rs.sw < imm) ? 1 : 0 }}); 3709884Sandreas@sandberg.pp.se 3719884Sandreas@sandberg.pp.se //Edited to include MIPS AVP Pass/Fail instructions and 3729884Sandreas@sandberg.pp.se //default to the sltiu instruction 3739884Sandreas@sandberg.pp.se 0x3: decode RS_RT_INTIMM { 3749884Sandreas@sandberg.pp.se 0xabc1: BasicOp::fail({{ 3759884Sandreas@sandberg.pp.se exitSimLoop("AVP/SRVP Test Failed"); 3769884Sandreas@sandberg.pp.se }}); 3779884Sandreas@sandberg.pp.se 0xabc2: BasicOp::pass({{ 3789884Sandreas@sandberg.pp.se exitSimLoop("AVP/SRVP Test Passed"); 3799884Sandreas@sandberg.pp.se }}); 3809884Sandreas@sandberg.pp.se default: sltiu({{ 3819884Sandreas@sandberg.pp.se Rt.uw = (Rs.uw < (uint32_t)sextImm) ? 1 : 0; 3829884Sandreas@sandberg.pp.se }}); 3839884Sandreas@sandberg.pp.se } 3849884Sandreas@sandberg.pp.se 3859884Sandreas@sandberg.pp.se 0x4: andi({{ Rt.sw = Rs.sw & zextImm; }}); 3869884Sandreas@sandberg.pp.se 0x5: ori({{ Rt.sw = Rs.sw | zextImm; }}); 3879884Sandreas@sandberg.pp.se 0x6: xori({{ Rt.sw = Rs.sw ^ zextImm; }}); 3889884Sandreas@sandberg.pp.se 3899884Sandreas@sandberg.pp.se 0x7: decode RS { 3909884Sandreas@sandberg.pp.se 0x0: lui({{ Rt = imm << 16; }}); 3919884Sandreas@sandberg.pp.se } 3929884Sandreas@sandberg.pp.se } 3939884Sandreas@sandberg.pp.se } 3949884Sandreas@sandberg.pp.se 3959884Sandreas@sandberg.pp.se 0x2: decode OPCODE_LO { 3969884Sandreas@sandberg.pp.se //Table A-11 MIPS32 COP0 Encoding of rs Field 3979884Sandreas@sandberg.pp.se 0x0: decode RS_MSB { 3989884Sandreas@sandberg.pp.se 0x0: decode RS { 39912392Sjason@lowepower.com format CP0Control { 4009884Sandreas@sandberg.pp.se 0x0: mfc0({{ 4019884Sandreas@sandberg.pp.se Config3Reg config3 = Config3; 4029884Sandreas@sandberg.pp.se PageGrainReg pageGrain = PageGrain; 4039884Sandreas@sandberg.pp.se Rt = CP0_RD_SEL; 4049884Sandreas@sandberg.pp.se /* Hack for PageMask */ 4059884Sandreas@sandberg.pp.se if (RD == 5) { 4069884Sandreas@sandberg.pp.se // PageMask 4079884Sandreas@sandberg.pp.se if (config3.sp == 0 || pageGrain.esp == 0) 4089884Sandreas@sandberg.pp.se Rt &= 0xFFFFE7FF; 4099884Sandreas@sandberg.pp.se } 4109884Sandreas@sandberg.pp.se }}); 4119884Sandreas@sandberg.pp.se 0x4: mtc0({{ 4129884Sandreas@sandberg.pp.se CP0_RD_SEL = Rt; 4139884Sandreas@sandberg.pp.se CauseReg cause = Cause; 4149884Sandreas@sandberg.pp.se IntCtlReg intCtl = IntCtl; 4159884Sandreas@sandberg.pp.se if (RD == 11) { 4169884Sandreas@sandberg.pp.se // Compare 4179884Sandreas@sandberg.pp.se if (cause.ti == 1) { 4189884Sandreas@sandberg.pp.se cause.ti = 0; 4199884Sandreas@sandberg.pp.se int offset = 10; // corresponding to cause.ip0 4209884Sandreas@sandberg.pp.se offset += intCtl.ipti - 2; 4219884Sandreas@sandberg.pp.se replaceBits(cause, offset, offset, 0); 4229884Sandreas@sandberg.pp.se } 4239884Sandreas@sandberg.pp.se } 4249884Sandreas@sandberg.pp.se Cause = cause; 4259884Sandreas@sandberg.pp.se }}); 4269884Sandreas@sandberg.pp.se } 4279884Sandreas@sandberg.pp.se format CP0Unimpl { 4289884Sandreas@sandberg.pp.se 0x1: dmfc0(); 4299884Sandreas@sandberg.pp.se 0x5: dmtc0(); 4309884Sandreas@sandberg.pp.se default: unknown(); 4319884Sandreas@sandberg.pp.se } 4329884Sandreas@sandberg.pp.se format MT_MFTR { 4339884Sandreas@sandberg.pp.se // Decode MIPS MT MFTR instruction into sub-instructions 4349884Sandreas@sandberg.pp.se 0x8: decode MT_U { 4359884Sandreas@sandberg.pp.se 0x0: mftc0({{ 4369884Sandreas@sandberg.pp.se data = xc->readRegOtherThread((RT << 3 | SEL) + 43712392Sjason@lowepower.com Ctrl_Base_DepTag); 4389884Sandreas@sandberg.pp.se }}); 4399884Sandreas@sandberg.pp.se 0x1: decode SEL { 4409884Sandreas@sandberg.pp.se 0x0: mftgpr({{ 4419884Sandreas@sandberg.pp.se data = xc->readRegOtherThread(RT); 4429884Sandreas@sandberg.pp.se }}); 4439884Sandreas@sandberg.pp.se 0x1: decode RT { 4449884Sandreas@sandberg.pp.se 0x0: mftlo_dsp0({{ data = xc->readRegOtherThread(INTREG_DSP_LO0); }}); 4459884Sandreas@sandberg.pp.se 0x1: mfthi_dsp0({{ data = xc->readRegOtherThread(INTREG_DSP_HI0); }}); 4469884Sandreas@sandberg.pp.se 0x2: mftacx_dsp0({{ data = xc->readRegOtherThread(INTREG_DSP_ACX0); }}); 4479884Sandreas@sandberg.pp.se 0x4: mftlo_dsp1({{ data = xc->readRegOtherThread(INTREG_DSP_LO1); }}); 4489884Sandreas@sandberg.pp.se 0x5: mfthi_dsp1({{ data = xc->readRegOtherThread(INTREG_DSP_HI1); }}); 4499884Sandreas@sandberg.pp.se 0x6: mftacx_dsp1({{ data = xc->readRegOtherThread(INTREG_DSP_ACX1); }}); 4509884Sandreas@sandberg.pp.se 0x8: mftlo_dsp2({{ data = xc->readRegOtherThread(INTREG_DSP_LO2); }}); 4519884Sandreas@sandberg.pp.se 0x9: mfthi_dsp2({{ data = xc->readRegOtherThread(INTREG_DSP_HI2); }}); 4529884Sandreas@sandberg.pp.se 0x10: mftacx_dsp2({{ data = xc->readRegOtherThread(INTREG_DSP_ACX2); }}); 4539884Sandreas@sandberg.pp.se 0x12: mftlo_dsp3({{ data = xc->readRegOtherThread(INTREG_DSP_LO3); }}); 4549884Sandreas@sandberg.pp.se 0x13: mfthi_dsp3({{ data = xc->readRegOtherThread(INTREG_DSP_HI3); }}); 4559884Sandreas@sandberg.pp.se 0x14: mftacx_dsp3({{ data = xc->readRegOtherThread(INTREG_DSP_ACX3); }}); 4569884Sandreas@sandberg.pp.se 0x16: mftdsp({{ data = xc->readRegOtherThread(INTREG_DSP_CONTROL); }}); 4579884Sandreas@sandberg.pp.se default: CP0Unimpl::unknown(); 4589884Sandreas@sandberg.pp.se } 4599884Sandreas@sandberg.pp.se 0x2: decode MT_H { 4609884Sandreas@sandberg.pp.se 0x0: mftc1({{ data = xc->readRegOtherThread(RT + 4619884Sandreas@sandberg.pp.se FP_Base_DepTag); 4629884Sandreas@sandberg.pp.se }}); 4639884Sandreas@sandberg.pp.se 0x1: mfthc1({{ data = xc->readRegOtherThread(RT + 4649884Sandreas@sandberg.pp.se FP_Base_DepTag); 4659884Sandreas@sandberg.pp.se }}); 4669884Sandreas@sandberg.pp.se } 4679884Sandreas@sandberg.pp.se 0x3: cftc1({{ 4689884Sandreas@sandberg.pp.se uint32_t fcsr_val = xc->readRegOtherThread(FLOATREG_FCSR + 4699884Sandreas@sandberg.pp.se FP_Base_DepTag); 4709884Sandreas@sandberg.pp.se switch (RT) { 4719884Sandreas@sandberg.pp.se case 0: 4729884Sandreas@sandberg.pp.se data = xc->readRegOtherThread(FLOATREG_FIR + 4739884Sandreas@sandberg.pp.se Ctrl_Base_DepTag); 4749884Sandreas@sandberg.pp.se break; 4759884Sandreas@sandberg.pp.se case 25: 4769884Sandreas@sandberg.pp.se data = (fcsr_val & 0xFE000000 >> 24) | 4779884Sandreas@sandberg.pp.se (fcsr_val & 0x00800000 >> 23); 4789884Sandreas@sandberg.pp.se break; 4799884Sandreas@sandberg.pp.se case 26: 4809884Sandreas@sandberg.pp.se data = fcsr_val & 0x0003F07C; 48112392Sjason@lowepower.com break; 4829884Sandreas@sandberg.pp.se case 28: 4839884Sandreas@sandberg.pp.se data = (fcsr_val & 0x00000F80) | 4849884Sandreas@sandberg.pp.se (fcsr_val & 0x01000000 >> 21) | 4859884Sandreas@sandberg.pp.se (fcsr_val & 0x00000003); 4869884Sandreas@sandberg.pp.se break; 4879884Sandreas@sandberg.pp.se case 31: 4889884Sandreas@sandberg.pp.se data = fcsr_val; 4899884Sandreas@sandberg.pp.se break; 49012392Sjason@lowepower.com default: 4919884Sandreas@sandberg.pp.se fatal("FP Control Value (%d) Not Valid"); 4929884Sandreas@sandberg.pp.se } 4939884Sandreas@sandberg.pp.se }}); 4949884Sandreas@sandberg.pp.se default: CP0Unimpl::unknown(); 4959884Sandreas@sandberg.pp.se } 4969884Sandreas@sandberg.pp.se } 4979884Sandreas@sandberg.pp.se } 4989884Sandreas@sandberg.pp.se 4999884Sandreas@sandberg.pp.se format MT_MTTR { 5009884Sandreas@sandberg.pp.se // Decode MIPS MT MTTR instruction into sub-instructions 5019884Sandreas@sandberg.pp.se 0xC: decode MT_U { 5029884Sandreas@sandberg.pp.se 0x0: mttc0({{ xc->setRegOtherThread((RD << 3 | SEL) + Ctrl_Base_DepTag, 5039884Sandreas@sandberg.pp.se Rt); 5049884Sandreas@sandberg.pp.se }}); 5059884Sandreas@sandberg.pp.se 0x1: decode SEL { 50612392Sjason@lowepower.com 0x0: mttgpr({{ xc->setRegOtherThread(RD, Rt); }}); 5079884Sandreas@sandberg.pp.se 0x1: decode RT { 5089884Sandreas@sandberg.pp.se 0x0: mttlo_dsp0({{ xc->setRegOtherThread(INTREG_DSP_LO0, Rt); 5099884Sandreas@sandberg.pp.se }}); 5109884Sandreas@sandberg.pp.se 0x1: mtthi_dsp0({{ xc->setRegOtherThread(INTREG_DSP_HI0, 5119884Sandreas@sandberg.pp.se Rt); 5129884Sandreas@sandberg.pp.se }}); 5139884Sandreas@sandberg.pp.se 0x2: mttacx_dsp0({{ xc->setRegOtherThread(INTREG_DSP_ACX0, 5149884Sandreas@sandberg.pp.se Rt); 5159884Sandreas@sandberg.pp.se }}); 5169884Sandreas@sandberg.pp.se 0x4: mttlo_dsp1({{ xc->setRegOtherThread(INTREG_DSP_LO1, 5179884Sandreas@sandberg.pp.se Rt); 5189884Sandreas@sandberg.pp.se }}); 5199884Sandreas@sandberg.pp.se 0x5: mtthi_dsp1({{ xc->setRegOtherThread(INTREG_DSP_HI1, 5209884Sandreas@sandberg.pp.se Rt); 5219884Sandreas@sandberg.pp.se }}); 5229884Sandreas@sandberg.pp.se 0x6: mttacx_dsp1({{ xc->setRegOtherThread(INTREG_DSP_ACX1, 5239883Sandreas@sandberg.pp.se Rt); 5249890Sandreas@sandberg.pp.se }}); 5259890Sandreas@sandberg.pp.se 0x8: mttlo_dsp2({{ xc->setRegOtherThread(INTREG_DSP_LO2, 5269883Sandreas@sandberg.pp.se Rt); 52711363Sandreas@sandberg.pp.se }}); 5289883Sandreas@sandberg.pp.se 0x9: mtthi_dsp2({{ xc->setRegOtherThread(INTREG_DSP_HI2, 5299883Sandreas@sandberg.pp.se Rt); 5309883Sandreas@sandberg.pp.se }}); 5319883Sandreas@sandberg.pp.se 0x10: mttacx_dsp2({{ xc->setRegOtherThread(INTREG_DSP_ACX2, 5329883Sandreas@sandberg.pp.se Rt); 5339883Sandreas@sandberg.pp.se }}); 5349883Sandreas@sandberg.pp.se 0x12: mttlo_dsp3({{ xc->setRegOtherThread(INTREG_DSP_LO3, 5359883Sandreas@sandberg.pp.se Rt); 5369883Sandreas@sandberg.pp.se }}); 5379883Sandreas@sandberg.pp.se 0x13: mtthi_dsp3({{ xc->setRegOtherThread(INTREG_DSP_HI3, 5389883Sandreas@sandberg.pp.se Rt); 5399883Sandreas@sandberg.pp.se }}); 5409883Sandreas@sandberg.pp.se 0x14: mttacx_dsp3({{ xc->setRegOtherThread(INTREG_DSP_ACX3, Rt); 5419890Sandreas@sandberg.pp.se }}); 5429890Sandreas@sandberg.pp.se 0x16: mttdsp({{ xc->setRegOtherThread(INTREG_DSP_CONTROL, Rt); }}); 5439890Sandreas@sandberg.pp.se default: CP0Unimpl::unknown(); 5449890Sandreas@sandberg.pp.se 5459890Sandreas@sandberg.pp.se } 5469890Sandreas@sandberg.pp.se 0x2: mttc1({{ 5479890Sandreas@sandberg.pp.se uint64_t data = xc->readRegOtherThread(RD + 5489890Sandreas@sandberg.pp.se FP_Base_DepTag); 5499883Sandreas@sandberg.pp.se data = insertBits(data, top_bit, 5509883Sandreas@sandberg.pp.se bottom_bit, Rt); 5519883Sandreas@sandberg.pp.se xc->setRegOtherThread(RD + FP_Base_DepTag, 5529883Sandreas@sandberg.pp.se data); 5539883Sandreas@sandberg.pp.se }}); 5549883Sandreas@sandberg.pp.se 0x3: cttc1({{ 5559883Sandreas@sandberg.pp.se uint32_t data; 5569883Sandreas@sandberg.pp.se switch (RD) { 5579883Sandreas@sandberg.pp.se case 25: 5589883Sandreas@sandberg.pp.se data = (Rt.uw<7:1> << 25) | // move 31-25 5599883Sandreas@sandberg.pp.se (FCSR & 0x01000000) | // bit 24 5609883Sandreas@sandberg.pp.se (FCSR & 0x004FFFFF); // bit 22-0 5619883Sandreas@sandberg.pp.se break; 5629883Sandreas@sandberg.pp.se case 26: 5639883Sandreas@sandberg.pp.se data = (FCSR & 0xFFFC0000) | // move 31-18 5649883Sandreas@sandberg.pp.se Rt.uw<17:12> << 12 | // bit 17-12 5659883Sandreas@sandberg.pp.se (FCSR & 0x00000F80) << 7 | // bit 11-7 5669883Sandreas@sandberg.pp.se Rt.uw<6:2> << 2 | // bit 6-2 5679883Sandreas@sandberg.pp.se (FCSR & 0x00000002); // bit 1...0 5689883Sandreas@sandberg.pp.se break; 5699883Sandreas@sandberg.pp.se case 28: 57010905Sandreas.sandberg@arm.com data = (FCSR & 0xFE000000) | // move 31-25 5719883Sandreas@sandberg.pp.se Rt.uw<2:2> << 24 | // bit 24 5729883Sandreas@sandberg.pp.se (FCSR & 0x00FFF000) << 23 | // bit 23-12 5739890Sandreas@sandberg.pp.se Rt.uw<11:7> << 7 | // bit 24 5749890Sandreas@sandberg.pp.se (FCSR & 0x000007E) | 5759890Sandreas@sandberg.pp.se Rt.uw<1:0>; // bit 22-0 5769890Sandreas@sandberg.pp.se break; 5779883Sandreas@sandberg.pp.se case 31: 5789883Sandreas@sandberg.pp.se data = Rt.uw; 5799883Sandreas@sandberg.pp.se break; 5809883Sandreas@sandberg.pp.se default: 5819883Sandreas@sandberg.pp.se panic("FP Control Value (%d) " 5829883Sandreas@sandberg.pp.se "Not Available. Ignoring " 5839883Sandreas@sandberg.pp.se "Access to Floating Control " 5849883Sandreas@sandberg.pp.se "Status Register", FS); 5859883Sandreas@sandberg.pp.se } 5869883Sandreas@sandberg.pp.se xc->setRegOtherThread(FLOATREG_FCSR + FP_Base_DepTag, data); 5879883Sandreas@sandberg.pp.se }}); 5889883Sandreas@sandberg.pp.se default: CP0Unimpl::unknown(); 5899883Sandreas@sandberg.pp.se } 5909883Sandreas@sandberg.pp.se } 5919883Sandreas@sandberg.pp.se } 5929883Sandreas@sandberg.pp.se 0xB: decode RD { 5939883Sandreas@sandberg.pp.se format MT_Control { 5949883Sandreas@sandberg.pp.se 0x0: decode POS { 5959883Sandreas@sandberg.pp.se 0x0: decode SEL { 5969883Sandreas@sandberg.pp.se 0x1: decode SC { 5979883Sandreas@sandberg.pp.se 0x0: dvpe({{ 5989883Sandreas@sandberg.pp.se MVPControlReg mvpControl = MVPControl; 5999883Sandreas@sandberg.pp.se VPEConf0Reg vpeConf0 = VPEConf0; 6009883Sandreas@sandberg.pp.se Rt = MVPControl; 6019883Sandreas@sandberg.pp.se if (vpeConf0.mvp == 1) 6029883Sandreas@sandberg.pp.se mvpControl.evp = 0; 6039883Sandreas@sandberg.pp.se MVPControl = mvpControl; 6049883Sandreas@sandberg.pp.se }}); 6059883Sandreas@sandberg.pp.se 0x1: evpe({{ 6069883Sandreas@sandberg.pp.se MVPControlReg mvpControl = MVPControl; 6079883Sandreas@sandberg.pp.se VPEConf0Reg vpeConf0 = VPEConf0; 6089883Sandreas@sandberg.pp.se Rt = MVPControl; 6099883Sandreas@sandberg.pp.se if (vpeConf0.mvp == 1) 6109883Sandreas@sandberg.pp.se mvpControl.evp = 1; 6119883Sandreas@sandberg.pp.se MVPControl = mvpControl; 6129883Sandreas@sandberg.pp.se }}); 6139883Sandreas@sandberg.pp.se default:CP0Unimpl::unknown(); 6149883Sandreas@sandberg.pp.se } 6159883Sandreas@sandberg.pp.se default:CP0Unimpl::unknown(); 6169883Sandreas@sandberg.pp.se } 6179883Sandreas@sandberg.pp.se default:CP0Unimpl::unknown(); 6189883Sandreas@sandberg.pp.se } 6199883Sandreas@sandberg.pp.se 0x1: decode POS { 6209883Sandreas@sandberg.pp.se 0xF: decode SEL { 6219883Sandreas@sandberg.pp.se 0x1: decode SC { 6229883Sandreas@sandberg.pp.se 0x0: dmt({{ 6239883Sandreas@sandberg.pp.se VPEControlReg vpeControl = VPEControl; 6249883Sandreas@sandberg.pp.se Rt = vpeControl; 6259883Sandreas@sandberg.pp.se vpeControl.te = 0; 6269883Sandreas@sandberg.pp.se VPEControl = vpeControl; 6279883Sandreas@sandberg.pp.se }}); 6289883Sandreas@sandberg.pp.se 0x1: emt({{ 6299883Sandreas@sandberg.pp.se VPEControlReg vpeControl = VPEControl; 6309883Sandreas@sandberg.pp.se Rt = vpeControl; 6319883Sandreas@sandberg.pp.se vpeControl.te = 1; 6329883Sandreas@sandberg.pp.se VPEControl = vpeControl; 6339883Sandreas@sandberg.pp.se }}); 6349883Sandreas@sandberg.pp.se default:CP0Unimpl::unknown(); 6359883Sandreas@sandberg.pp.se } 6369883Sandreas@sandberg.pp.se default:CP0Unimpl::unknown(); 6379883Sandreas@sandberg.pp.se } 6389883Sandreas@sandberg.pp.se default:CP0Unimpl::unknown(); 6399883Sandreas@sandberg.pp.se } 6409883Sandreas@sandberg.pp.se } 6419883Sandreas@sandberg.pp.se 0xC: decode POS { 6429883Sandreas@sandberg.pp.se 0x0: decode SC { 6439883Sandreas@sandberg.pp.se 0x0: CP0Control::di({{ 6449883Sandreas@sandberg.pp.se StatusReg status = Status; 6459883Sandreas@sandberg.pp.se ConfigReg config = Config; 6469883Sandreas@sandberg.pp.se // Rev 2.0 or beyond? 6479883Sandreas@sandberg.pp.se if (config.ar >= 1) { 6489883Sandreas@sandberg.pp.se Rt = status; 6499883Sandreas@sandberg.pp.se status.ie = 0; 6509883Sandreas@sandberg.pp.se } else { 6519883Sandreas@sandberg.pp.se // Enable this else branch once we 6529883Sandreas@sandberg.pp.se // actually set values for Config on init 6539883Sandreas@sandberg.pp.se fault = new ReservedInstructionFault(); 6549883Sandreas@sandberg.pp.se } 6559883Sandreas@sandberg.pp.se Status = status; 6569883Sandreas@sandberg.pp.se }}); 65711363Sandreas@sandberg.pp.se 0x1: CP0Control::ei({{ 6589883Sandreas@sandberg.pp.se StatusReg status = Status; 6599883Sandreas@sandberg.pp.se ConfigReg config = Config; 6609883Sandreas@sandberg.pp.se if (config.ar >= 1) { 6619883Sandreas@sandberg.pp.se Rt = status; 6629883Sandreas@sandberg.pp.se status.ie = 1; 6639883Sandreas@sandberg.pp.se } else { 6649883Sandreas@sandberg.pp.se fault = new ReservedInstructionFault(); 6659883Sandreas@sandberg.pp.se } 6669883Sandreas@sandberg.pp.se }}); 6679883Sandreas@sandberg.pp.se default:CP0Unimpl::unknown(); 6689883Sandreas@sandberg.pp.se } 6699883Sandreas@sandberg.pp.se } 6709883Sandreas@sandberg.pp.se default: CP0Unimpl::unknown(); 6719883Sandreas@sandberg.pp.se } 6729883Sandreas@sandberg.pp.se format CP0Control { 6739883Sandreas@sandberg.pp.se 0xA: rdpgpr({{ 6749883Sandreas@sandberg.pp.se ConfigReg config = Config; 6759883Sandreas@sandberg.pp.se if (config.ar >= 1) { 6769883Sandreas@sandberg.pp.se // Rev 2 of the architecture 6779883Sandreas@sandberg.pp.se panic("Shadow Sets Not Fully Implemented.\n"); 6789883Sandreas@sandberg.pp.se } else { 6799883Sandreas@sandberg.pp.se fault = new ReservedInstructionFault(); 6809883Sandreas@sandberg.pp.se } 6819883Sandreas@sandberg.pp.se }}); 6829883Sandreas@sandberg.pp.se 0xE: wrpgpr({{ 6839883Sandreas@sandberg.pp.se ConfigReg config = Config; 6849883Sandreas@sandberg.pp.se if (config.ar >= 1) { 6859883Sandreas@sandberg.pp.se // Rev 2 of the architecture 6869883Sandreas@sandberg.pp.se panic("Shadow Sets Not Fully Implemented.\n"); 6879883Sandreas@sandberg.pp.se } else { 6889883Sandreas@sandberg.pp.se fault = new ReservedInstructionFault(); 6899883Sandreas@sandberg.pp.se } 6909883Sandreas@sandberg.pp.se }}); 6919883Sandreas@sandberg.pp.se } 6929883Sandreas@sandberg.pp.se } 6939883Sandreas@sandberg.pp.se 6949883Sandreas@sandberg.pp.se //Table A-12 MIPS32 COP0 Encoding of Function Field When rs=CO 6959883Sandreas@sandberg.pp.se 0x1: decode FUNCTION { 69610113Sandreas@sandberg.pp.se format CP0Control { 6979883Sandreas@sandberg.pp.se 0x18: eret({{ 6989883Sandreas@sandberg.pp.se StatusReg status = Status; 6999883Sandreas@sandberg.pp.se ConfigReg config = Config; 7009883Sandreas@sandberg.pp.se SRSCtlReg srsCtl = SRSCtl; 7019883Sandreas@sandberg.pp.se DPRINTF(MipsPRA,"Restoring PC - %x\n",EPC); 7029883Sandreas@sandberg.pp.se if (status.erl == 1) { 7039883Sandreas@sandberg.pp.se status.erl = 0; 7049883Sandreas@sandberg.pp.se NPC = ErrorEPC; 7059883Sandreas@sandberg.pp.se // Need to adjust NNPC, otherwise things break 7069883Sandreas@sandberg.pp.se NNPC = ErrorEPC + sizeof(MachInst); 7079883Sandreas@sandberg.pp.se } else { 7089883Sandreas@sandberg.pp.se NPC = EPC; 7099883Sandreas@sandberg.pp.se // Need to adjust NNPC, otherwise things break 7109883Sandreas@sandberg.pp.se NNPC = EPC + sizeof(MachInst); 7119883Sandreas@sandberg.pp.se status.exl = 0; 7129883Sandreas@sandberg.pp.se if (config.ar >=1 && 7139883Sandreas@sandberg.pp.se srsCtl.hss > 0 && 7149883Sandreas@sandberg.pp.se status.bev == 0) { 7159883Sandreas@sandberg.pp.se srsCtl.css = srsCtl.pss; 7169883Sandreas@sandberg.pp.se //xc->setShadowSet(srsCtl.pss); 7179883Sandreas@sandberg.pp.se } 7189883Sandreas@sandberg.pp.se } 7199883Sandreas@sandberg.pp.se LLFlag = 0; 7209883Sandreas@sandberg.pp.se Status = status; 7219883Sandreas@sandberg.pp.se SRSCtl = srsCtl; 7229883Sandreas@sandberg.pp.se }}, IsReturn, IsSerializing, IsERET); 7239883Sandreas@sandberg.pp.se 7249883Sandreas@sandberg.pp.se 0x1F: deret({{ 7259883Sandreas@sandberg.pp.se DebugReg debug = Debug; 7269883Sandreas@sandberg.pp.se if (debug.dm == 1) { 72710099Sandreas@sandberg.pp.se debug.dm = 1; 72810099Sandreas@sandberg.pp.se debug.iexi = 0; 72910099Sandreas@sandberg.pp.se NPC = DEPC; 73010099Sandreas@sandberg.pp.se } else { 73110099Sandreas@sandberg.pp.se NPC = NPC; 7329883Sandreas@sandberg.pp.se // Undefined; 7339883Sandreas@sandberg.pp.se } 7349883Sandreas@sandberg.pp.se Debug = debug; 7359883Sandreas@sandberg.pp.se }}, IsReturn, IsSerializing, IsERET); 7369883Sandreas@sandberg.pp.se } 7379883Sandreas@sandberg.pp.se format CP0TLB { 7389883Sandreas@sandberg.pp.se 0x01: tlbr({{ 7399883Sandreas@sandberg.pp.se MipsISA::PTE *PTEntry = 7409883Sandreas@sandberg.pp.se xc->tcBase()->getITBPtr()-> 7419883Sandreas@sandberg.pp.se getEntry(Index & 0x7FFFFFFF); 7429886Sandreas@sandberg.pp.se if (PTEntry == NULL) { 7439886Sandreas@sandberg.pp.se fatal("Invalid PTE Entry received on " 7449886Sandreas@sandberg.pp.se "a TLBR instruction\n"); 7459886Sandreas@sandberg.pp.se } 7469886Sandreas@sandberg.pp.se /* Setup PageMask */ 7479886Sandreas@sandberg.pp.se // If 1KB pages are not enabled, a read of PageMask 7489886Sandreas@sandberg.pp.se // must return 0b00 in bits 12, 11 7499886Sandreas@sandberg.pp.se PageMask = (PTEntry->Mask << 11); 7509886Sandreas@sandberg.pp.se /* Setup EntryHi */ 7519886Sandreas@sandberg.pp.se EntryHi = ((PTEntry->VPN << 11) | (PTEntry->asid)); 7529886Sandreas@sandberg.pp.se /* Setup Entry Lo0 */ 7539886Sandreas@sandberg.pp.se EntryLo0 = ((PTEntry->PFN0 << 6) | 7549883Sandreas@sandberg.pp.se (PTEntry->C0 << 3) | 7559883Sandreas@sandberg.pp.se (PTEntry->D0 << 2) | 7569883Sandreas@sandberg.pp.se (PTEntry->V0 << 1) | 7579883Sandreas@sandberg.pp.se PTEntry->G); 7589883Sandreas@sandberg.pp.se /* Setup Entry Lo1 */ 7599883Sandreas@sandberg.pp.se EntryLo1 = ((PTEntry->PFN1 << 6) | 7609883Sandreas@sandberg.pp.se (PTEntry->C1 << 3) | 7619883Sandreas@sandberg.pp.se (PTEntry->D1 << 2) | 7629883Sandreas@sandberg.pp.se (PTEntry->V1 << 1) | 7639883Sandreas@sandberg.pp.se PTEntry->G); 7649883Sandreas@sandberg.pp.se }}); // Need to hook up to TLB 7659883Sandreas@sandberg.pp.se 7669883Sandreas@sandberg.pp.se 0x02: tlbwi({{ 7679883Sandreas@sandberg.pp.se //Create PTE 7689883Sandreas@sandberg.pp.se MipsISA::PTE newEntry; 7699883Sandreas@sandberg.pp.se //Write PTE 7709883Sandreas@sandberg.pp.se newEntry.Mask = (Addr)(PageMask >> 11); 7719883Sandreas@sandberg.pp.se newEntry.VPN = (Addr)(EntryHi >> 11); 7729883Sandreas@sandberg.pp.se /* PageGrain _ ESP Config3 _ SP */ 7739883Sandreas@sandberg.pp.se if (bits(PageGrain, 28) == 0 || bits(Config3, 4) ==0) { 7749886Sandreas@sandberg.pp.se // If 1KB pages are *NOT* enabled, lowest bits of 7759886Sandreas@sandberg.pp.se // the mask are 0b11 for TLB writes 7769886Sandreas@sandberg.pp.se newEntry.Mask |= 0x3; 7779886Sandreas@sandberg.pp.se // Reset bits 0 and 1 if 1KB pages are not enabled 7789886Sandreas@sandberg.pp.se newEntry.VPN &= 0xFFFFFFFC; 7799886Sandreas@sandberg.pp.se } 7809886Sandreas@sandberg.pp.se newEntry.asid = (uint8_t)(EntryHi & 0xFF); 7819886Sandreas@sandberg.pp.se 7829886Sandreas@sandberg.pp.se newEntry.PFN0 = (Addr)(EntryLo0 >> 6); 7839886Sandreas@sandberg.pp.se newEntry.PFN1 = (Addr)(EntryLo1 >> 6); 7849886Sandreas@sandberg.pp.se newEntry.D0 = (bool)((EntryLo0 >> 2) & 1); 7859886Sandreas@sandberg.pp.se newEntry.D1 = (bool)((EntryLo1 >> 2) & 1); 7869886Sandreas@sandberg.pp.se newEntry.V1 = (bool)((EntryLo1 >> 1) & 1); 7879886Sandreas@sandberg.pp.se newEntry.V0 = (bool)((EntryLo0 >> 1) & 1); 7889886Sandreas@sandberg.pp.se newEntry.G = (bool)((EntryLo0 & EntryLo1) & 1); 7899886Sandreas@sandberg.pp.se newEntry.C0 = (uint8_t)((EntryLo0 >> 3) & 0x7); 7909886Sandreas@sandberg.pp.se newEntry.C1 = (uint8_t)((EntryLo1 >> 3) & 0x7); 7919886Sandreas@sandberg.pp.se /* Now, compute the AddrShiftAmount and OffsetMask - 7929886Sandreas@sandberg.pp.se TLB optimizations */ 7939886Sandreas@sandberg.pp.se /* Addr Shift Amount for 1KB or larger pages */ 7949886Sandreas@sandberg.pp.se if ((newEntry.Mask & 0xFFFF) == 3) { 7959886Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 12; 7969886Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFFFF) == 0x0000) { 7979886Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 10; 7989886Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFFFC) == 0x000C) { 7999886Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 14; 8009886Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFFF0) == 0x0030) { 8019886Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 16; 8029886Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFFC0) == 0x00C0) { 8039886Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 18; 8049886Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFF00) == 0x0300) { 8059886Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 20; 8069884Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFC00) == 0x0C00) { 8079884Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 22; 8089884Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xF000) == 0x3000) { 8099884Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 24; 8109884Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xC000) == 0xC000) { 8119884Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 26; 8129884Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0x30000) == 0x30000) { 8139884Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 28; 8149884Sandreas@sandberg.pp.se } else { 8159884Sandreas@sandberg.pp.se fatal("Invalid Mask Pattern Detected!\n"); 8169884Sandreas@sandberg.pp.se } 8179884Sandreas@sandberg.pp.se newEntry.OffsetMask = 8189886Sandreas@sandberg.pp.se (1 << newEntry.AddrShiftAmount) - 1; 8199883Sandreas@sandberg.pp.se 8209883Sandreas@sandberg.pp.se MipsISA::TLB *Ptr = xc->tcBase()->getITBPtr(); 8219890Sandreas@sandberg.pp.se Config3Reg config3 = Config3; 8229890Sandreas@sandberg.pp.se PageGrainReg pageGrain = PageGrain; 8239890Sandreas@sandberg.pp.se int SP = 0; 8249890Sandreas@sandberg.pp.se if (bits(config3, config3.sp) == 1 && 8259890Sandreas@sandberg.pp.se bits(pageGrain, pageGrain.esp) == 1) { 8269890Sandreas@sandberg.pp.se SP = 1; 8279890Sandreas@sandberg.pp.se } 8289890Sandreas@sandberg.pp.se IndexReg index = Index; 8299890Sandreas@sandberg.pp.se Ptr->insertAt(newEntry, Index & 0x7FFFFFFF, SP); 8309890Sandreas@sandberg.pp.se }}); 8319890Sandreas@sandberg.pp.se 0x06: tlbwr({{ 8329890Sandreas@sandberg.pp.se //Create PTE 8339890Sandreas@sandberg.pp.se MipsISA::PTE newEntry; 8349890Sandreas@sandberg.pp.se //Write PTE 8359890Sandreas@sandberg.pp.se newEntry.Mask = (Addr)(PageMask >> 11); 8369890Sandreas@sandberg.pp.se newEntry.VPN = (Addr)(EntryHi >> 11); 8379890Sandreas@sandberg.pp.se /* PageGrain _ ESP Config3 _ SP */ 8389890Sandreas@sandberg.pp.se if (bits(PageGrain, 28) == 0 || 8399890Sandreas@sandberg.pp.se bits(Config3, 4) == 0) { 8409890Sandreas@sandberg.pp.se // If 1KB pages are *NOT* enabled, lowest bits of 8419890Sandreas@sandberg.pp.se // the mask are 0b11 for TLB writes 8429890Sandreas@sandberg.pp.se newEntry.Mask |= 0x3; 8439890Sandreas@sandberg.pp.se // Reset bits 0 and 1 if 1KB pages are not enabled 8449890Sandreas@sandberg.pp.se newEntry.VPN &= 0xFFFFFFFC; 8459890Sandreas@sandberg.pp.se } 8469890Sandreas@sandberg.pp.se newEntry.asid = (uint8_t)(EntryHi & 0xFF); 8479890Sandreas@sandberg.pp.se 8489890Sandreas@sandberg.pp.se newEntry.PFN0 = (Addr)(EntryLo0 >> 6); 8499890Sandreas@sandberg.pp.se newEntry.PFN1 = (Addr)(EntryLo1 >> 6); 8509890Sandreas@sandberg.pp.se newEntry.D0 = (bool)((EntryLo0 >> 2) & 1); 8519890Sandreas@sandberg.pp.se newEntry.D1 = (bool)((EntryLo1 >> 2) & 1); 8529890Sandreas@sandberg.pp.se newEntry.V1 = (bool)((EntryLo1 >> 1) & 1); 8539890Sandreas@sandberg.pp.se newEntry.V0 = (bool)((EntryLo0 >> 1) & 1); 8549890Sandreas@sandberg.pp.se newEntry.G = (bool)((EntryLo0 & EntryLo1) & 1); 8559890Sandreas@sandberg.pp.se newEntry.C0 = (uint8_t)((EntryLo0 >> 3) & 0x7); 8569890Sandreas@sandberg.pp.se newEntry.C1 = (uint8_t)((EntryLo1 >> 3) & 0x7); 8579890Sandreas@sandberg.pp.se /* Now, compute the AddrShiftAmount and OffsetMask - 8589890Sandreas@sandberg.pp.se TLB optimizations */ 8599890Sandreas@sandberg.pp.se /* Addr Shift Amount for 1KB or larger pages */ 8609890Sandreas@sandberg.pp.se if ((newEntry.Mask & 0xFFFF) == 3){ 8619890Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 12; 8629890Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFFFF) == 0x0000) { 8639890Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 10; 8649890Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFFFC) == 0x000C) { 8659890Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 14; 8669890Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFFF0) == 0x0030) { 8679890Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 16; 8689890Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFFC0) == 0x00C0) { 8699890Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 18; 8709890Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFF00) == 0x0300) { 8719890Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 20; 8729890Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xFC00) == 0x0C00) { 8739890Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 22; 8749890Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xF000) == 0x3000) { 8759890Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 24; 8769890Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0xC000) == 0xC000) { 8779890Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 26; 8789890Sandreas@sandberg.pp.se } else if ((newEntry.Mask & 0x30000) == 0x30000) { 8799890Sandreas@sandberg.pp.se newEntry.AddrShiftAmount = 28; 8809890Sandreas@sandberg.pp.se } else { 8819890Sandreas@sandberg.pp.se fatal("Invalid Mask Pattern Detected!\n"); 8829890Sandreas@sandberg.pp.se } 8839890Sandreas@sandberg.pp.se newEntry.OffsetMask = 8849890Sandreas@sandberg.pp.se (1 << newEntry.AddrShiftAmount) - 1; 8859890Sandreas@sandberg.pp.se 8869890Sandreas@sandberg.pp.se MipsISA::TLB *Ptr = xc->tcBase()->getITBPtr(); 8879890Sandreas@sandberg.pp.se Config3Reg config3 = Config3; 8889890Sandreas@sandberg.pp.se PageGrainReg pageGrain = PageGrain; 8899890Sandreas@sandberg.pp.se int SP = 0; 8909890Sandreas@sandberg.pp.se if (bits(config3, config3.sp) == 1 && 8919890Sandreas@sandberg.pp.se bits(pageGrain, pageGrain.esp) == 1) { 8929890Sandreas@sandberg.pp.se SP = 1; 8939890Sandreas@sandberg.pp.se } 8949890Sandreas@sandberg.pp.se IndexReg index = Index; 8959890Sandreas@sandberg.pp.se Ptr->insertAt(newEntry, Random, SP); 8969890Sandreas@sandberg.pp.se }}); 8979890Sandreas@sandberg.pp.se 8989890Sandreas@sandberg.pp.se 0x08: tlbp({{ 8999890Sandreas@sandberg.pp.se Config3Reg config3 = Config3; 9009890Sandreas@sandberg.pp.se PageGrainReg pageGrain = PageGrain; 9019890Sandreas@sandberg.pp.se EntryHiReg entryHi = EntryHi; 9029890Sandreas@sandberg.pp.se int tlbIndex; 9039890Sandreas@sandberg.pp.se Addr vpn; 9049890Sandreas@sandberg.pp.se if (pageGrain.esp == 1 && config3.sp ==1) { 9059890Sandreas@sandberg.pp.se vpn = EntryHi >> 11; 9069890Sandreas@sandberg.pp.se } else { 9079890Sandreas@sandberg.pp.se // Mask off lower 2 bits 9089883Sandreas@sandberg.pp.se vpn = ((EntryHi >> 11) & 0xFFFFFFFC); 9099883Sandreas@sandberg.pp.se } 9109883Sandreas@sandberg.pp.se tlbIndex = xc->tcBase()->getITBPtr()-> 9119890Sandreas@sandberg.pp.se probeEntry(vpn, entryHi.asid); 9129890Sandreas@sandberg.pp.se // Check TLB for entry matching EntryHi 9139890Sandreas@sandberg.pp.se if (tlbIndex != -1) { 9149890Sandreas@sandberg.pp.se Index = tlbIndex; 9159883Sandreas@sandberg.pp.se } else { 9169883Sandreas@sandberg.pp.se // else, set Index = 1 << 31 9179883Sandreas@sandberg.pp.se Index = (1 << 31); 9189883Sandreas@sandberg.pp.se } 9199883Sandreas@sandberg.pp.se }}); 9209883Sandreas@sandberg.pp.se } 9219883Sandreas@sandberg.pp.se format CP0Unimpl { 9229883Sandreas@sandberg.pp.se 0x20: wait(); 9239883Sandreas@sandberg.pp.se } 9249883Sandreas@sandberg.pp.se default: CP0Unimpl::unknown(); 9259883Sandreas@sandberg.pp.se } 9269883Sandreas@sandberg.pp.se } 9279883Sandreas@sandberg.pp.se 9289883Sandreas@sandberg.pp.se //Table A-13 MIPS32 COP1 Encoding of rs Field 9299883Sandreas@sandberg.pp.se 0x1: decode RS_MSB { 9309883Sandreas@sandberg.pp.se 0x0: decode RS_HI { 9319883Sandreas@sandberg.pp.se 0x0: decode RS_LO { 9329883Sandreas@sandberg.pp.se format CP1Control { 9339883Sandreas@sandberg.pp.se 0x0: mfc1 ({{ Rt.uw = Fs.uw; }}); 9349883Sandreas@sandberg.pp.se 9359883Sandreas@sandberg.pp.se 0x2: cfc1({{ 9369883Sandreas@sandberg.pp.se switch (FS) { 9379883Sandreas@sandberg.pp.se case 0: 9389883Sandreas@sandberg.pp.se Rt = FIR; 9399883Sandreas@sandberg.pp.se break; 9409883Sandreas@sandberg.pp.se case 25: 9419883Sandreas@sandberg.pp.se Rt = (FCSR & 0xFE000000) >> 24 | 94210113Sandreas@sandberg.pp.se (FCSR & 0x00800000) >> 23; 94310113Sandreas@sandberg.pp.se break; 94410113Sandreas@sandberg.pp.se case 26: 94510113Sandreas@sandberg.pp.se Rt = (FCSR & 0x0003F07C); 94610113Sandreas@sandberg.pp.se break; 94710113Sandreas@sandberg.pp.se case 28: 9489883Sandreas@sandberg.pp.se Rt = (FCSR & 0x00000F80) | 9499883Sandreas@sandberg.pp.se (FCSR & 0x01000000) >> 21 | 9509883Sandreas@sandberg.pp.se (FCSR & 0x00000003); 9519883Sandreas@sandberg.pp.se break; 95210113Sandreas@sandberg.pp.se case 31: 95310113Sandreas@sandberg.pp.se Rt = FCSR; 95410113Sandreas@sandberg.pp.se break; 95510113Sandreas@sandberg.pp.se default: 95610113Sandreas@sandberg.pp.se warn("FP Control Value (%d) Not Valid"); 95710113Sandreas@sandberg.pp.se } 95810113Sandreas@sandberg.pp.se }}); 95910113Sandreas@sandberg.pp.se 96010113Sandreas@sandberg.pp.se 0x3: mfhc1({{ Rt.uw = Fs.ud<63:32>; }}); 96110113Sandreas@sandberg.pp.se 96210113Sandreas@sandberg.pp.se 0x4: mtc1({{ Fs.uw = Rt.uw; }}); 96310113Sandreas@sandberg.pp.se 96410113Sandreas@sandberg.pp.se 0x6: ctc1({{ 9659883Sandreas@sandberg.pp.se switch (FS) { 9669883Sandreas@sandberg.pp.se case 25: 9679883Sandreas@sandberg.pp.se FCSR = (Rt.uw<7:1> << 25) | // move 31-25 9689883Sandreas@sandberg.pp.se (FCSR & 0x01000000) | // bit 24 9699883Sandreas@sandberg.pp.se (FCSR & 0x004FFFFF); // bit 22-0 9709883Sandreas@sandberg.pp.se break; 9719883Sandreas@sandberg.pp.se case 26: 9729883Sandreas@sandberg.pp.se FCSR = (FCSR & 0xFFFC0000) | // move 31-18 9739883Sandreas@sandberg.pp.se Rt.uw<17:12> << 12 | // bit 17-12 97410113Sandreas@sandberg.pp.se (FCSR & 0x00000F80) << 7 | // bit 11-7 97510113Sandreas@sandberg.pp.se Rt.uw<6:2> << 2 | // bit 6-2 9769883Sandreas@sandberg.pp.se (FCSR & 0x00000002); // bit 1-0 9779883Sandreas@sandberg.pp.se break; 9789883Sandreas@sandberg.pp.se case 28: 9799883Sandreas@sandberg.pp.se FCSR = (FCSR & 0xFE000000) | // move 31-25 9809883Sandreas@sandberg.pp.se Rt.uw<2:2> << 24 | // bit 24 9819883Sandreas@sandberg.pp.se (FCSR & 0x00FFF000) << 23 | // bit 23-12 9829883Sandreas@sandberg.pp.se Rt.uw<11:7> << 7 | // bit 24 98310113Sandreas@sandberg.pp.se (FCSR & 0x000007E) | 9849883Sandreas@sandberg.pp.se Rt.uw<1:0>; // bit 22-0 9859883Sandreas@sandberg.pp.se break; 9869883Sandreas@sandberg.pp.se case 31: 9879883Sandreas@sandberg.pp.se FCSR = Rt.uw; 9889883Sandreas@sandberg.pp.se break; 9899883Sandreas@sandberg.pp.se 9909883Sandreas@sandberg.pp.se default: 9919883Sandreas@sandberg.pp.se panic("FP Control Value (%d) " 9929883Sandreas@sandberg.pp.se "Not Available. Ignoring Access " 9939883Sandreas@sandberg.pp.se "to Floating Control Status " 9949883Sandreas@sandberg.pp.se "Register", FS); 9959883Sandreas@sandberg.pp.se } 9969883Sandreas@sandberg.pp.se }}); 9979883Sandreas@sandberg.pp.se 9989883Sandreas@sandberg.pp.se 0x7: mthc1({{ 9999883Sandreas@sandberg.pp.se uint64_t fs_hi = Rt.uw; 10009883Sandreas@sandberg.pp.se uint64_t fs_lo = Fs.ud & 0x0FFFFFFFF; 10019883Sandreas@sandberg.pp.se Fs.ud = (fs_hi << 32) | fs_lo; 10029883Sandreas@sandberg.pp.se }}); 10039883Sandreas@sandberg.pp.se 10049883Sandreas@sandberg.pp.se } 10059883Sandreas@sandberg.pp.se format CP1Unimpl { 10069883Sandreas@sandberg.pp.se 0x1: dmfc1(); 10079883Sandreas@sandberg.pp.se 0x5: dmtc1(); 10089883Sandreas@sandberg.pp.se } 10099883Sandreas@sandberg.pp.se } 10109883Sandreas@sandberg.pp.se 10119883Sandreas@sandberg.pp.se 0x1: decode RS_LO { 10129883Sandreas@sandberg.pp.se 0x0: decode ND { 10139883Sandreas@sandberg.pp.se format Branch { 10149883Sandreas@sandberg.pp.se 0x0: decode TF { 10159883Sandreas@sandberg.pp.se 0x0: bc1f({{ 10169883Sandreas@sandberg.pp.se cond = getCondCode(FCSR, BRANCH_CC) == 0; 10179883Sandreas@sandberg.pp.se }}); 10189883Sandreas@sandberg.pp.se 0x1: bc1t({{ 10199883Sandreas@sandberg.pp.se cond = getCondCode(FCSR, BRANCH_CC) == 1; 10209883Sandreas@sandberg.pp.se }}); 10219883Sandreas@sandberg.pp.se } 10229883Sandreas@sandberg.pp.se 0x1: decode TF { 10239883Sandreas@sandberg.pp.se 0x0: bc1fl({{ 10249883Sandreas@sandberg.pp.se cond = getCondCode(FCSR, BRANCH_CC) == 0; 10259883Sandreas@sandberg.pp.se }}, Likely); 10269883Sandreas@sandberg.pp.se 0x1: bc1tl({{ 10279883Sandreas@sandberg.pp.se cond = getCondCode(FCSR, BRANCH_CC) == 1; 102810113Sandreas@sandberg.pp.se }}, Likely); 10299883Sandreas@sandberg.pp.se } 10309883Sandreas@sandberg.pp.se } 10319883Sandreas@sandberg.pp.se } 10329883Sandreas@sandberg.pp.se format CP1Unimpl { 10339883Sandreas@sandberg.pp.se 0x1: bc1any2(); 10349883Sandreas@sandberg.pp.se 0x2: bc1any4(); 10359883Sandreas@sandberg.pp.se default: unknown(); 10369883Sandreas@sandberg.pp.se } 10379883Sandreas@sandberg.pp.se } 10389883Sandreas@sandberg.pp.se } 10399883Sandreas@sandberg.pp.se 10409883Sandreas@sandberg.pp.se 0x1: decode RS_HI { 10419883Sandreas@sandberg.pp.se 0x2: decode RS_LO { 10429883Sandreas@sandberg.pp.se //Table A-14 MIPS32 COP1 Encoding of Function Field When 10439883Sandreas@sandberg.pp.se //rs=S (( single-precision floating point)) 10449890Sandreas@sandberg.pp.se 0x0: decode FUNCTION_HI { 10459890Sandreas@sandberg.pp.se 0x0: decode FUNCTION_LO { 10469890Sandreas@sandberg.pp.se format FloatOp { 10479890Sandreas@sandberg.pp.se 0x0: add_s({{ Fd.sf = Fs.sf + Ft.sf; }}); 10489890Sandreas@sandberg.pp.se 0x1: sub_s({{ Fd.sf = Fs.sf - Ft.sf; }}); 10499890Sandreas@sandberg.pp.se 0x2: mul_s({{ Fd.sf = Fs.sf * Ft.sf; }}); 10509890Sandreas@sandberg.pp.se 0x3: div_s({{ Fd.sf = Fs.sf / Ft.sf; }}); 10519890Sandreas@sandberg.pp.se 0x4: sqrt_s({{ Fd.sf = sqrt(Fs.sf); }}); 10529890Sandreas@sandberg.pp.se 0x5: abs_s({{ Fd.sf = fabs(Fs.sf); }}); 10539890Sandreas@sandberg.pp.se 0x7: neg_s({{ Fd.sf = -Fs.sf; }}); 10549890Sandreas@sandberg.pp.se } 10559890Sandreas@sandberg.pp.se 0x6: BasicOp::mov_s({{ Fd.sf = Fs.sf; }}); 10569890Sandreas@sandberg.pp.se } 10579890Sandreas@sandberg.pp.se 0x1: decode FUNCTION_LO { 10589890Sandreas@sandberg.pp.se format FloatConvertOp { 10599890Sandreas@sandberg.pp.se 0x0: round_l_s({{ val = Fs.sf; }}, 10609890Sandreas@sandberg.pp.se ToLong, Round); 10619890Sandreas@sandberg.pp.se 0x1: trunc_l_s({{ val = Fs.sf; }}, 10629890Sandreas@sandberg.pp.se ToLong, Trunc); 10639890Sandreas@sandberg.pp.se 0x2: ceil_l_s({{ val = Fs.sf;}}, 10649890Sandreas@sandberg.pp.se ToLong, Ceil); 10659890Sandreas@sandberg.pp.se 0x3: floor_l_s({{ val = Fs.sf; }}, 10669890Sandreas@sandberg.pp.se ToLong, Floor); 10679890Sandreas@sandberg.pp.se 0x4: round_w_s({{ val = Fs.sf; }}, 10689890Sandreas@sandberg.pp.se ToWord, Round); 10699890Sandreas@sandberg.pp.se 0x5: trunc_w_s({{ val = Fs.sf; }}, 10709890Sandreas@sandberg.pp.se ToWord, Trunc); 10719890Sandreas@sandberg.pp.se 0x6: ceil_w_s({{ val = Fs.sf; }}, 10729890Sandreas@sandberg.pp.se ToWord, Ceil); 10739890Sandreas@sandberg.pp.se 0x7: floor_w_s({{ val = Fs.sf; }}, 10749890Sandreas@sandberg.pp.se ToWord, Floor); 10759890Sandreas@sandberg.pp.se } 10769890Sandreas@sandberg.pp.se } 10779890Sandreas@sandberg.pp.se 10789890Sandreas@sandberg.pp.se 0x2: decode FUNCTION_LO { 10799890Sandreas@sandberg.pp.se 0x1: decode MOVCF { 10809890Sandreas@sandberg.pp.se format BasicOp { 10819890Sandreas@sandberg.pp.se 0x0: movf_s({{ 10829890Sandreas@sandberg.pp.se Fd = (getCondCode(FCSR,CC) == 0) ? 10839883Sandreas@sandberg.pp.se Fs : Fd; 108410113Sandreas@sandberg.pp.se }}); 10859883Sandreas@sandberg.pp.se 0x1: movt_s({{ 10869890Sandreas@sandberg.pp.se Fd = (getCondCode(FCSR,CC) == 1) ? 10879890Sandreas@sandberg.pp.se Fs : Fd; 10889890Sandreas@sandberg.pp.se }}); 10899890Sandreas@sandberg.pp.se } 10909890Sandreas@sandberg.pp.se } 10919890Sandreas@sandberg.pp.se 10929890Sandreas@sandberg.pp.se format BasicOp { 10939890Sandreas@sandberg.pp.se 0x2: movz_s({{ Fd = (Rt == 0) ? Fs : Fd; }}); 10949890Sandreas@sandberg.pp.se 0x3: movn_s({{ Fd = (Rt != 0) ? Fs : Fd; }}); 109510113Sandreas@sandberg.pp.se } 10969890Sandreas@sandberg.pp.se 109710113Sandreas@sandberg.pp.se format FloatOp { 10989890Sandreas@sandberg.pp.se 0x5: recip_s({{ Fd = 1 / Fs; }}); 10999890Sandreas@sandberg.pp.se 0x6: rsqrt_s({{ Fd = 1 / sqrt(Fs); }}); 11009890Sandreas@sandberg.pp.se } 11019890Sandreas@sandberg.pp.se format CP1Unimpl { 11029890Sandreas@sandberg.pp.se default: unknown(); 11039890Sandreas@sandberg.pp.se } 11049890Sandreas@sandberg.pp.se } 11059883Sandreas@sandberg.pp.se 0x3: CP1Unimpl::unknown(); 11069883Sandreas@sandberg.pp.se 11079883Sandreas@sandberg.pp.se 0x4: decode FUNCTION_LO { 11089883Sandreas@sandberg.pp.se format FloatConvertOp { 11099883Sandreas@sandberg.pp.se 0x1: cvt_d_s({{ val = Fs.sf; }}, ToDouble); 11109883Sandreas@sandberg.pp.se 0x4: cvt_w_s({{ val = Fs.sf; }}, ToWord); 11119883Sandreas@sandberg.pp.se 0x5: cvt_l_s({{ val = Fs.sf; }}, ToLong); 11129883Sandreas@sandberg.pp.se } 11139883Sandreas@sandberg.pp.se 11149883Sandreas@sandberg.pp.se 0x6: FloatOp::cvt_ps_s({{ 11159883Sandreas@sandberg.pp.se Fd.ud = (uint64_t) Fs.uw << 32 | 11169883Sandreas@sandberg.pp.se (uint64_t) Ft.uw; 11179883Sandreas@sandberg.pp.se }}); 11189883Sandreas@sandberg.pp.se format CP1Unimpl { 11199883Sandreas@sandberg.pp.se default: unknown(); 11209883Sandreas@sandberg.pp.se } 11219883Sandreas@sandberg.pp.se } 11229883Sandreas@sandberg.pp.se 0x5: CP1Unimpl::unknown(); 11239883Sandreas@sandberg.pp.se 11249883Sandreas@sandberg.pp.se 0x6: decode FUNCTION_LO { 11259883Sandreas@sandberg.pp.se format FloatCompareOp { 11269883Sandreas@sandberg.pp.se 0x0: c_f_s({{ cond = 0; }}, 11279883Sandreas@sandberg.pp.se SinglePrecision, UnorderedFalse); 11289883Sandreas@sandberg.pp.se 0x1: c_un_s({{ cond = 0; }}, 11299883Sandreas@sandberg.pp.se SinglePrecision, UnorderedTrue); 11309883Sandreas@sandberg.pp.se 0x2: c_eq_s({{ cond = (Fs.sf == Ft.sf); }}, 11319883Sandreas@sandberg.pp.se UnorderedFalse); 11329883Sandreas@sandberg.pp.se 0x3: c_ueq_s({{ cond = (Fs.sf == Ft.sf); }}, 11339883Sandreas@sandberg.pp.se UnorderedTrue); 11349883Sandreas@sandberg.pp.se 0x4: c_olt_s({{ cond = (Fs.sf < Ft.sf); }}, 11359883Sandreas@sandberg.pp.se UnorderedFalse); 11369883Sandreas@sandberg.pp.se 0x5: c_ult_s({{ cond = (Fs.sf < Ft.sf); }}, 11379883Sandreas@sandberg.pp.se UnorderedTrue); 11389883Sandreas@sandberg.pp.se 0x6: c_ole_s({{ cond = (Fs.sf <= Ft.sf); }}, 11399883Sandreas@sandberg.pp.se UnorderedFalse); 114010157Sandreas@sandberg.pp.se 0x7: c_ule_s({{ cond = (Fs.sf <= Ft.sf); }}, 114110157Sandreas@sandberg.pp.se UnorderedTrue); 11429883Sandreas@sandberg.pp.se } 11439883Sandreas@sandberg.pp.se } 114410157Sandreas@sandberg.pp.se 114510157Sandreas@sandberg.pp.se 0x7: decode FUNCTION_LO { 114610157Sandreas@sandberg.pp.se format FloatCompareOp { 114710157Sandreas@sandberg.pp.se 0x0: c_sf_s({{ cond = 0; }}, SinglePrecision, 114810157Sandreas@sandberg.pp.se UnorderedFalse, QnanException); 114910157Sandreas@sandberg.pp.se 0x1: c_ngle_s({{ cond = 0; }}, SinglePrecision, 115011150Smitch.hayenga@arm.com UnorderedTrue, QnanException); 115111150Smitch.hayenga@arm.com 0x2: c_seq_s({{ cond = (Fs.sf == Ft.sf); }}, 115211150Smitch.hayenga@arm.com UnorderedFalse, QnanException); 115310157Sandreas@sandberg.pp.se 0x3: c_ngl_s({{ cond = (Fs.sf == Ft.sf); }}, 11549883Sandreas@sandberg.pp.se UnorderedTrue, QnanException); 11559883Sandreas@sandberg.pp.se 0x4: c_lt_s({{ cond = (Fs.sf < Ft.sf); }}, 115610112Sandreas@sandberg.pp.se UnorderedFalse, QnanException); 115710112Sandreas@sandberg.pp.se 0x5: c_nge_s({{ cond = (Fs.sf < Ft.sf); }}, 115810112Sandreas@sandberg.pp.se UnorderedTrue, QnanException); 115910112Sandreas@sandberg.pp.se 0x6: c_le_s({{ cond = (Fs.sf <= Ft.sf); }}, 116010112Sandreas@sandberg.pp.se UnorderedFalse, QnanException); 116110112Sandreas@sandberg.pp.se 0x7: c_ngt_s({{ cond = (Fs.sf <= Ft.sf); }}, 116210112Sandreas@sandberg.pp.se UnorderedTrue, QnanException); 116310112Sandreas@sandberg.pp.se } 116410112Sandreas@sandberg.pp.se } 116510112Sandreas@sandberg.pp.se } 116610112Sandreas@sandberg.pp.se 116710112Sandreas@sandberg.pp.se //Table A-15 MIPS32 COP1 Encoding of Function Field When 116810112Sandreas@sandberg.pp.se //rs=D 116910112Sandreas@sandberg.pp.se 0x1: decode FUNCTION_HI { 117010112Sandreas@sandberg.pp.se 0x0: decode FUNCTION_LO { 117110112Sandreas@sandberg.pp.se format FloatOp { 117210112Sandreas@sandberg.pp.se 0x0: add_d({{ Fd.df = Fs.df + Ft.df; }}); 117310112Sandreas@sandberg.pp.se 0x1: sub_d({{ Fd.df = Fs.df - Ft.df; }}); 117410112Sandreas@sandberg.pp.se 0x2: mul_d({{ Fd.df = Fs.df * Ft.df; }}); 117510112Sandreas@sandberg.pp.se 0x3: div_d({{ Fd.df = Fs.df / Ft.df; }}); 117610112Sandreas@sandberg.pp.se 0x4: sqrt_d({{ Fd.df = sqrt(Fs.df); }}); 11779883Sandreas@sandberg.pp.se 0x5: abs_d({{ Fd.df = fabs(Fs.df); }}); 11789883Sandreas@sandberg.pp.se 0x7: neg_d({{ Fd.df = -1 * Fs.df; }}); 11799883Sandreas@sandberg.pp.se } 11809883Sandreas@sandberg.pp.se 0x6: BasicOp::mov_d({{ Fd.df = Fs.df; }}); 11819883Sandreas@sandberg.pp.se } 11829883Sandreas@sandberg.pp.se 11839883Sandreas@sandberg.pp.se 0x1: decode FUNCTION_LO { 11849883Sandreas@sandberg.pp.se format FloatConvertOp { 11859883Sandreas@sandberg.pp.se 0x0: round_l_d({{ val = Fs.df; }}, 11869883Sandreas@sandberg.pp.se ToLong, Round); 11879883Sandreas@sandberg.pp.se 0x1: trunc_l_d({{ val = Fs.df; }}, 11889883Sandreas@sandberg.pp.se ToLong, Trunc); 11899883Sandreas@sandberg.pp.se 0x2: ceil_l_d({{ val = Fs.df; }}, 11909883Sandreas@sandberg.pp.se ToLong, Ceil); 11919883Sandreas@sandberg.pp.se 0x3: floor_l_d({{ val = Fs.df; }}, 11929883Sandreas@sandberg.pp.se ToLong, Floor); 11939883Sandreas@sandberg.pp.se 0x4: round_w_d({{ val = Fs.df; }}, 11949883Sandreas@sandberg.pp.se ToWord, Round); 119511150Smitch.hayenga@arm.com 0x5: trunc_w_d({{ val = Fs.df; }}, 119611150Smitch.hayenga@arm.com ToWord, Trunc); 119710112Sandreas@sandberg.pp.se 0x6: ceil_w_d({{ val = Fs.df; }}, 119810112Sandreas@sandberg.pp.se ToWord, Ceil); 119910112Sandreas@sandberg.pp.se 0x7: floor_w_d({{ val = Fs.df; }}, 120010112Sandreas@sandberg.pp.se ToWord, Floor); 120110112Sandreas@sandberg.pp.se } 12029883Sandreas@sandberg.pp.se } 12039883Sandreas@sandberg.pp.se 12049883Sandreas@sandberg.pp.se 0x2: decode FUNCTION_LO { 12059883Sandreas@sandberg.pp.se 0x1: decode MOVCF { 12069883Sandreas@sandberg.pp.se format BasicOp { 12079883Sandreas@sandberg.pp.se 0x0: movf_d({{ 120811150Smitch.hayenga@arm.com Fd.df = (getCondCode(FCSR,CC) == 0) ? 12099883Sandreas@sandberg.pp.se Fs.df : Fd.df; 12109883Sandreas@sandberg.pp.se }}); 12119883Sandreas@sandberg.pp.se 0x1: movt_d({{ 12129883Sandreas@sandberg.pp.se Fd.df = (getCondCode(FCSR,CC) == 1) ? 12139883Sandreas@sandberg.pp.se Fs.df : Fd.df; 12149883Sandreas@sandberg.pp.se }}); 12159883Sandreas@sandberg.pp.se } 12169883Sandreas@sandberg.pp.se } 12179883Sandreas@sandberg.pp.se 12189883Sandreas@sandberg.pp.se format BasicOp { 12199883Sandreas@sandberg.pp.se 0x2: movz_d({{ 12209883Sandreas@sandberg.pp.se Fd.df = (Rt == 0) ? Fs.df : Fd.df; 12219883Sandreas@sandberg.pp.se }}); 12229883Sandreas@sandberg.pp.se 0x3: movn_d({{ 12239883Sandreas@sandberg.pp.se Fd.df = (Rt != 0) ? Fs.df : Fd.df; 12249883Sandreas@sandberg.pp.se }}); 12259883Sandreas@sandberg.pp.se } 12269883Sandreas@sandberg.pp.se 12279883Sandreas@sandberg.pp.se format FloatOp { 122810112Sandreas@sandberg.pp.se 0x5: recip_d({{ Fd.df = 1 / Fs.df; }}); 122910112Sandreas@sandberg.pp.se 0x6: rsqrt_d({{ Fd.df = 1 / sqrt(Fs.df); }}); 123010112Sandreas@sandberg.pp.se } 123110112Sandreas@sandberg.pp.se format CP1Unimpl { 123210112Sandreas@sandberg.pp.se default: unknown(); 123310112Sandreas@sandberg.pp.se } 12349883Sandreas@sandberg.pp.se 12359883Sandreas@sandberg.pp.se } 12369883Sandreas@sandberg.pp.se 0x4: decode FUNCTION_LO { 12379883Sandreas@sandberg.pp.se format FloatConvertOp { 12389883Sandreas@sandberg.pp.se 0x0: cvt_s_d({{ val = Fs.df; }}, ToSingle); 12399883Sandreas@sandberg.pp.se 0x4: cvt_w_d({{ val = Fs.df; }}, ToWord); 12409883Sandreas@sandberg.pp.se 0x5: cvt_l_d({{ val = Fs.df; }}, ToLong); 12419883Sandreas@sandberg.pp.se } 12429883Sandreas@sandberg.pp.se default: CP1Unimpl::unknown(); 12439883Sandreas@sandberg.pp.se } 12449883Sandreas@sandberg.pp.se 12459883Sandreas@sandberg.pp.se 0x6: decode FUNCTION_LO { 12469883Sandreas@sandberg.pp.se format FloatCompareOp { 12479883Sandreas@sandberg.pp.se 0x0: c_f_d({{ cond = 0; }}, 12489883Sandreas@sandberg.pp.se DoublePrecision, UnorderedFalse); 12499883Sandreas@sandberg.pp.se 0x1: c_un_d({{ cond = 0; }}, 12509883Sandreas@sandberg.pp.se DoublePrecision, UnorderedTrue); 12519883Sandreas@sandberg.pp.se 0x2: c_eq_d({{ cond = (Fs.df == Ft.df); }}, 12529883Sandreas@sandberg.pp.se UnorderedFalse); 12539883Sandreas@sandberg.pp.se 0x3: c_ueq_d({{ cond = (Fs.df == Ft.df); }}, 12549883Sandreas@sandberg.pp.se UnorderedTrue); 12559883Sandreas@sandberg.pp.se 0x4: c_olt_d({{ cond = (Fs.df < Ft.df); }}, 12569883Sandreas@sandberg.pp.se UnorderedFalse); 12579883Sandreas@sandberg.pp.se 0x5: c_ult_d({{ cond = (Fs.df < Ft.df); }}, 12589883Sandreas@sandberg.pp.se UnorderedTrue); 12599883Sandreas@sandberg.pp.se 0x6: c_ole_d({{ cond = (Fs.df <= Ft.df); }}, 12609883Sandreas@sandberg.pp.se UnorderedFalse); 12619883Sandreas@sandberg.pp.se 0x7: c_ule_d({{ cond = (Fs.df <= Ft.df); }}, 12629883Sandreas@sandberg.pp.se UnorderedTrue); 12639883Sandreas@sandberg.pp.se } 12649883Sandreas@sandberg.pp.se } 12659883Sandreas@sandberg.pp.se 12669883Sandreas@sandberg.pp.se 0x7: decode FUNCTION_LO { 12679883Sandreas@sandberg.pp.se format FloatCompareOp { 12689883Sandreas@sandberg.pp.se 0x0: c_sf_d({{ cond = 0; }}, DoublePrecision, 12699883Sandreas@sandberg.pp.se UnorderedFalse, QnanException); 12709883Sandreas@sandberg.pp.se 0x1: c_ngle_d({{ cond = 0; }}, DoublePrecision, 12719883Sandreas@sandberg.pp.se UnorderedTrue, QnanException); 12729883Sandreas@sandberg.pp.se 0x2: c_seq_d({{ cond = (Fs.df == Ft.df); }}, 12739883Sandreas@sandberg.pp.se UnorderedFalse, QnanException); 12749883Sandreas@sandberg.pp.se 0x3: c_ngl_d({{ cond = (Fs.df == Ft.df); }}, 12759883Sandreas@sandberg.pp.se UnorderedTrue, QnanException); 12769883Sandreas@sandberg.pp.se 0x4: c_lt_d({{ cond = (Fs.df < Ft.df); }}, 12779883Sandreas@sandberg.pp.se UnorderedFalse, QnanException); 12789883Sandreas@sandberg.pp.se 0x5: c_nge_d({{ cond = (Fs.df < Ft.df); }}, 12799883Sandreas@sandberg.pp.se UnorderedTrue, QnanException); 12809883Sandreas@sandberg.pp.se 0x6: c_le_d({{ cond = (Fs.df <= Ft.df); }}, 12819883Sandreas@sandberg.pp.se UnorderedFalse, QnanException); 12829883Sandreas@sandberg.pp.se 0x7: c_ngt_d({{ cond = (Fs.df <= Ft.df); }}, 12839883Sandreas@sandberg.pp.se UnorderedTrue, QnanException); 12849883Sandreas@sandberg.pp.se } 12859883Sandreas@sandberg.pp.se } 12869883Sandreas@sandberg.pp.se default: CP1Unimpl::unknown(); 12879883Sandreas@sandberg.pp.se } 12889883Sandreas@sandberg.pp.se 0x2: CP1Unimpl::unknown(); 12899883Sandreas@sandberg.pp.se 0x3: CP1Unimpl::unknown(); 12909883Sandreas@sandberg.pp.se 0x7: CP1Unimpl::unknown(); 12919883Sandreas@sandberg.pp.se 12929883Sandreas@sandberg.pp.se //Table A-16 MIPS32 COP1 Encoding of Function 12939883Sandreas@sandberg.pp.se //Field When rs=W 12949883Sandreas@sandberg.pp.se 0x4: decode FUNCTION { 12959883Sandreas@sandberg.pp.se format FloatConvertOp { 12969883Sandreas@sandberg.pp.se 0x20: cvt_s_w({{ val = Fs.uw; }}, ToSingle); 12979883Sandreas@sandberg.pp.se 0x21: cvt_d_w({{ val = Fs.uw; }}, ToDouble); 12989883Sandreas@sandberg.pp.se 0x26: CP1Unimpl::cvt_ps_w(); 12999883Sandreas@sandberg.pp.se } 13009883Sandreas@sandberg.pp.se default: CP1Unimpl::unknown(); 13019883Sandreas@sandberg.pp.se } 13029883Sandreas@sandberg.pp.se 13039883Sandreas@sandberg.pp.se //Table A-16 MIPS32 COP1 Encoding of Function Field 13049883Sandreas@sandberg.pp.se //When rs=L1 13059883Sandreas@sandberg.pp.se //Note: "1. Format type L is legal only if 64-bit 13069883Sandreas@sandberg.pp.se //floating point operations are enabled." 13079883Sandreas@sandberg.pp.se 0x5: decode FUNCTION_HI { 13089883Sandreas@sandberg.pp.se format FloatConvertOp { 13099883Sandreas@sandberg.pp.se 0x20: cvt_s_l({{ val = Fs.ud; }}, ToSingle); 13109883Sandreas@sandberg.pp.se 0x21: cvt_d_l({{ val = Fs.ud; }}, ToDouble); 13119883Sandreas@sandberg.pp.se 0x26: CP1Unimpl::cvt_ps_l(); 13129883Sandreas@sandberg.pp.se } 13139883Sandreas@sandberg.pp.se default: CP1Unimpl::unknown(); 13149883Sandreas@sandberg.pp.se } 13159883Sandreas@sandberg.pp.se 13169883Sandreas@sandberg.pp.se //Table A-17 MIPS64 COP1 Encoding of Function Field 13179883Sandreas@sandberg.pp.se //When rs=PS1 13189883Sandreas@sandberg.pp.se //Note: "1. Format type PS is legal only if 64-bit 13199883Sandreas@sandberg.pp.se //floating point operations are enabled. " 13209883Sandreas@sandberg.pp.se 0x6: decode FUNCTION_HI { 13219883Sandreas@sandberg.pp.se 0x0: decode FUNCTION_LO { 13229883Sandreas@sandberg.pp.se format Float64Op { 13239883Sandreas@sandberg.pp.se 0x0: add_ps({{ 13249883Sandreas@sandberg.pp.se Fd1.sf = Fs1.sf + Ft2.sf; 13259883Sandreas@sandberg.pp.se Fd2.sf = Fs2.sf + Ft2.sf; 13269883Sandreas@sandberg.pp.se }}); 13279883Sandreas@sandberg.pp.se 0x1: sub_ps({{ 13289883Sandreas@sandberg.pp.se Fd1.sf = Fs1.sf - Ft2.sf; 13299883Sandreas@sandberg.pp.se Fd2.sf = Fs2.sf - Ft2.sf; 13309883Sandreas@sandberg.pp.se }}); 13319883Sandreas@sandberg.pp.se 0x2: mul_ps({{ 13329883Sandreas@sandberg.pp.se Fd1.sf = Fs1.sf * Ft2.sf; 13339883Sandreas@sandberg.pp.se Fd2.sf = Fs2.sf * Ft2.sf; 13349883Sandreas@sandberg.pp.se }}); 13359883Sandreas@sandberg.pp.se 0x5: abs_ps({{ 13369883Sandreas@sandberg.pp.se Fd1.sf = fabs(Fs1.sf); 13379883Sandreas@sandberg.pp.se Fd2.sf = fabs(Fs2.sf); 13389883Sandreas@sandberg.pp.se }}); 13399883Sandreas@sandberg.pp.se 0x6: mov_ps({{ 13409883Sandreas@sandberg.pp.se Fd1.sf = Fs1.sf; 13419883Sandreas@sandberg.pp.se Fd2.sf = Fs2.sf; 13429883Sandreas@sandberg.pp.se }}); 13439883Sandreas@sandberg.pp.se 0x7: neg_ps({{ 13449883Sandreas@sandberg.pp.se Fd1.sf = -(Fs1.sf); 13459883Sandreas@sandberg.pp.se Fd2.sf = -(Fs2.sf); 13469883Sandreas@sandberg.pp.se }}); 13479883Sandreas@sandberg.pp.se default: CP1Unimpl::unknown(); 13489883Sandreas@sandberg.pp.se } 13499883Sandreas@sandberg.pp.se } 13509883Sandreas@sandberg.pp.se 0x1: CP1Unimpl::unknown(); 13519883Sandreas@sandberg.pp.se 0x2: decode FUNCTION_LO { 13529883Sandreas@sandberg.pp.se 0x1: decode MOVCF { 135312155Sandreas.sandberg@arm.com format Float64Op { 135412155Sandreas.sandberg@arm.com 0x0: movf_ps({{ 135512155Sandreas.sandberg@arm.com Fd1 = (getCondCode(FCSR, CC) == 0) ? 13569883Sandreas@sandberg.pp.se Fs1 : Fd1; 135712749Sgiacomo.travaglini@arm.com Fd2 = (getCondCode(FCSR, CC+1) == 0) ? 135812749Sgiacomo.travaglini@arm.com Fs2 : Fd2; 135912749Sgiacomo.travaglini@arm.com }}); 136012749Sgiacomo.travaglini@arm.com 0x1: movt_ps({{ 136111629Smichael.lebeane@amd.com Fd2 = (getCondCode(FCSR, CC) == 1) ? 13629883Sandreas@sandberg.pp.se Fs1 : Fd1; 136311629Smichael.lebeane@amd.com Fd2 = (getCondCode(FCSR, CC+1) == 1) ? 136411629Smichael.lebeane@amd.com Fs2 : Fd2; 136511629Smichael.lebeane@amd.com }}); 136611629Smichael.lebeane@amd.com } 13679883Sandreas@sandberg.pp.se } 13689883Sandreas@sandberg.pp.se 13699883Sandreas@sandberg.pp.se format Float64Op { 13709883Sandreas@sandberg.pp.se 0x2: movz_ps({{ 13719883Sandreas@sandberg.pp.se Fd1 = (getCondCode(FCSR, CC) == 0) ? 13729883Sandreas@sandberg.pp.se Fs1 : Fd1; 13739883Sandreas@sandberg.pp.se Fd2 = (getCondCode(FCSR, CC) == 0) ? 13749883Sandreas@sandberg.pp.se Fs2 : Fd2; 13759883Sandreas@sandberg.pp.se }}); 13769883Sandreas@sandberg.pp.se 0x3: movn_ps({{ 13779883Sandreas@sandberg.pp.se Fd1 = (getCondCode(FCSR, CC) == 1) ? 13789883Sandreas@sandberg.pp.se Fs1 : Fd1; 13799883Sandreas@sandberg.pp.se Fd2 = (getCondCode(FCSR, CC) == 1) ? 13809883Sandreas@sandberg.pp.se Fs2 : Fd2; 13819883Sandreas@sandberg.pp.se }}); 13829883Sandreas@sandberg.pp.se } 13839883Sandreas@sandberg.pp.se default: CP1Unimpl::unknown(); 13849883Sandreas@sandberg.pp.se } 13859883Sandreas@sandberg.pp.se 0x3: CP1Unimpl::unknown(); 13869883Sandreas@sandberg.pp.se 0x4: decode FUNCTION_LO { 13879883Sandreas@sandberg.pp.se 0x0: FloatOp::cvt_s_pu({{ Fd.sf = Fs2.sf; }}); 13889883Sandreas@sandberg.pp.se default: CP1Unimpl::unknown(); 13899883Sandreas@sandberg.pp.se } 13909883Sandreas@sandberg.pp.se 13919883Sandreas@sandberg.pp.se 0x5: decode FUNCTION_LO { 13929883Sandreas@sandberg.pp.se 0x0: FloatOp::cvt_s_pl({{ Fd.sf = Fs1.sf; }}); 13939883Sandreas@sandberg.pp.se format Float64Op { 13949883Sandreas@sandberg.pp.se 0x4: pll({{ 13959883Sandreas@sandberg.pp.se Fd.ud = (uint64_t)Fs1.uw << 32 | Ft1.uw; 13969883Sandreas@sandberg.pp.se }}); 13979883Sandreas@sandberg.pp.se 0x5: plu({{ 13989883Sandreas@sandberg.pp.se Fd.ud = (uint64_t)Fs1.uw << 32 | Ft2.uw; 13999883Sandreas@sandberg.pp.se }}); 14009883Sandreas@sandberg.pp.se 0x6: pul({{ 14019883Sandreas@sandberg.pp.se Fd.ud = (uint64_t)Fs2.uw << 32 | Ft1.uw; 14029883Sandreas@sandberg.pp.se }}); 14039883Sandreas@sandberg.pp.se 0x7: puu({{ 14049883Sandreas@sandberg.pp.se Fd.ud = (uint64_t)Fs2.uw << 32 | Ft2.uw; 14059883Sandreas@sandberg.pp.se }}); 14069883Sandreas@sandberg.pp.se } 14079883Sandreas@sandberg.pp.se default: CP1Unimpl::unknown(); 14089883Sandreas@sandberg.pp.se } 14099883Sandreas@sandberg.pp.se 14109883Sandreas@sandberg.pp.se 0x6: decode FUNCTION_LO { 14119883Sandreas@sandberg.pp.se format FloatPSCompareOp { 14129883Sandreas@sandberg.pp.se 0x0: c_f_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 14139883Sandreas@sandberg.pp.se UnorderedFalse); 14149883Sandreas@sandberg.pp.se 0x1: c_un_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 14159883Sandreas@sandberg.pp.se UnorderedTrue); 14169883Sandreas@sandberg.pp.se 0x2: c_eq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 14179883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf == Ft2.sf); }}, 14189883Sandreas@sandberg.pp.se UnorderedFalse); 14199883Sandreas@sandberg.pp.se 0x3: c_ueq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 14209883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf == Ft2.sf); }}, 14219883Sandreas@sandberg.pp.se UnorderedTrue); 14229883Sandreas@sandberg.pp.se 0x4: c_olt_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 14239883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf < Ft2.sf); }}, 14249883Sandreas@sandberg.pp.se UnorderedFalse); 14259883Sandreas@sandberg.pp.se 0x5: c_ult_ps({{ cond1 = (Fs.sf < Ft.sf); }}, 14269883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf < Ft2.sf); }}, 14279883Sandreas@sandberg.pp.se UnorderedTrue); 14289883Sandreas@sandberg.pp.se 0x6: c_ole_ps({{ cond1 = (Fs.sf <= Ft.sf); }}, 14299883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 14309883Sandreas@sandberg.pp.se UnorderedFalse); 14319883Sandreas@sandberg.pp.se 0x7: c_ule_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 14329883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 14339883Sandreas@sandberg.pp.se UnorderedTrue); 14349883Sandreas@sandberg.pp.se } 14359883Sandreas@sandberg.pp.se } 14369883Sandreas@sandberg.pp.se 14379883Sandreas@sandberg.pp.se 0x7: decode FUNCTION_LO { 14389883Sandreas@sandberg.pp.se format FloatPSCompareOp { 14399883Sandreas@sandberg.pp.se 0x0: c_sf_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 14409883Sandreas@sandberg.pp.se UnorderedFalse, QnanException); 14419883Sandreas@sandberg.pp.se 0x1: c_ngle_ps({{ cond1 = 0; }}, 14429883Sandreas@sandberg.pp.se {{ cond2 = 0; }}, 14439883Sandreas@sandberg.pp.se UnorderedTrue, QnanException); 14449883Sandreas@sandberg.pp.se 0x2: c_seq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 14459883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf == Ft2.sf); }}, 14469883Sandreas@sandberg.pp.se UnorderedFalse, QnanException); 14479883Sandreas@sandberg.pp.se 0x3: c_ngl_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 14489883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf == Ft2.sf); }}, 14499883Sandreas@sandberg.pp.se UnorderedTrue, QnanException); 14509883Sandreas@sandberg.pp.se 0x4: c_lt_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 14519883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf < Ft2.sf); }}, 14529883Sandreas@sandberg.pp.se UnorderedFalse, QnanException); 14539883Sandreas@sandberg.pp.se 0x5: c_nge_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 14549883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf < Ft2.sf); }}, 14559883Sandreas@sandberg.pp.se UnorderedTrue, QnanException); 14569883Sandreas@sandberg.pp.se 0x6: c_le_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 14579883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 14589883Sandreas@sandberg.pp.se UnorderedFalse, QnanException); 14599883Sandreas@sandberg.pp.se 0x7: c_ngt_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 14609883Sandreas@sandberg.pp.se {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 14619883Sandreas@sandberg.pp.se UnorderedTrue, QnanException); 14629883Sandreas@sandberg.pp.se } 14639883Sandreas@sandberg.pp.se } 14649883Sandreas@sandberg.pp.se } 14659883Sandreas@sandberg.pp.se } 14669883Sandreas@sandberg.pp.se default: CP1Unimpl::unknown(); 14679883Sandreas@sandberg.pp.se } 14689883Sandreas@sandberg.pp.se } 14699883Sandreas@sandberg.pp.se 14709883Sandreas@sandberg.pp.se //Table A-19 MIPS32 COP2 Encoding of rs Field 14719883Sandreas@sandberg.pp.se 0x2: decode RS_MSB { 14729883Sandreas@sandberg.pp.se format CP2Unimpl { 14739883Sandreas@sandberg.pp.se 0x0: decode RS_HI { 14749883Sandreas@sandberg.pp.se 0x0: decode RS_LO { 14759883Sandreas@sandberg.pp.se 0x0: mfc2(); 14769883Sandreas@sandberg.pp.se 0x2: cfc2(); 14779883Sandreas@sandberg.pp.se 0x3: mfhc2(); 14789883Sandreas@sandberg.pp.se 0x4: mtc2(); 14799883Sandreas@sandberg.pp.se 0x6: ctc2(); 14809883Sandreas@sandberg.pp.se 0x7: mftc2(); 14819883Sandreas@sandberg.pp.se default: unknown(); 14829883Sandreas@sandberg.pp.se } 14839883Sandreas@sandberg.pp.se 14849883Sandreas@sandberg.pp.se 0x1: decode ND { 14859883Sandreas@sandberg.pp.se 0x0: decode TF { 14869883Sandreas@sandberg.pp.se 0x0: bc2f(); 14879883Sandreas@sandberg.pp.se 0x1: bc2t(); 14889883Sandreas@sandberg.pp.se default: unknown(); 14899883Sandreas@sandberg.pp.se } 14909883Sandreas@sandberg.pp.se 14919883Sandreas@sandberg.pp.se 0x1: decode TF { 14929883Sandreas@sandberg.pp.se 0x0: bc2fl(); 14939883Sandreas@sandberg.pp.se 0x1: bc2tl(); 14949883Sandreas@sandberg.pp.se default: unknown(); 14959883Sandreas@sandberg.pp.se } 14969883Sandreas@sandberg.pp.se default: unknown(); 14979883Sandreas@sandberg.pp.se 14989883Sandreas@sandberg.pp.se } 14999883Sandreas@sandberg.pp.se default: unknown(); 15009883Sandreas@sandberg.pp.se } 15019883Sandreas@sandberg.pp.se default: unknown(); 15029883Sandreas@sandberg.pp.se } 15039883Sandreas@sandberg.pp.se } 15049883Sandreas@sandberg.pp.se 15059883Sandreas@sandberg.pp.se //Table A-20 MIPS64 COP1X Encoding of Function Field 1 15069883Sandreas@sandberg.pp.se //Note: "COP1X instructions are legal only if 64-bit floating point 15079883Sandreas@sandberg.pp.se //operations are enabled." 15089883Sandreas@sandberg.pp.se 0x3: decode FUNCTION_HI { 15099883Sandreas@sandberg.pp.se 0x0: decode FUNCTION_LO { 15109883Sandreas@sandberg.pp.se format LoadIndexedMemory { 15119883Sandreas@sandberg.pp.se 0x0: lwxc1({{ Fd.uw = Mem.uw; }}); 15129883Sandreas@sandberg.pp.se 0x1: ldxc1({{ Fd.ud = Mem.ud; }}); 15139883Sandreas@sandberg.pp.se 0x5: luxc1({{ Fd.ud = Mem.ud; }}, 15149883Sandreas@sandberg.pp.se {{ EA = (Rs + Rt) & ~7; }}); 15159883Sandreas@sandberg.pp.se } 15169883Sandreas@sandberg.pp.se } 15179883Sandreas@sandberg.pp.se 15189883Sandreas@sandberg.pp.se 0x1: decode FUNCTION_LO { 15199883Sandreas@sandberg.pp.se format StoreIndexedMemory { 15209883Sandreas@sandberg.pp.se 0x0: swxc1({{ Mem.uw = Fs.uw; }}); 15219883Sandreas@sandberg.pp.se 0x1: sdxc1({{ Mem.ud = Fs.ud; }}); 15229883Sandreas@sandberg.pp.se 0x5: suxc1({{ Mem.ud = Fs.ud; }}, 15239883Sandreas@sandberg.pp.se {{ EA = (Rs + Rt) & ~7; }}); 15249883Sandreas@sandberg.pp.se } 15259883Sandreas@sandberg.pp.se 0x7: Prefetch::prefx({{ EA = Rs + Rt; }}); 15269883Sandreas@sandberg.pp.se } 15279883Sandreas@sandberg.pp.se 15289883Sandreas@sandberg.pp.se 0x3: decode FUNCTION_LO { 15299883Sandreas@sandberg.pp.se 0x6: Float64Op::alnv_ps({{ 15309883Sandreas@sandberg.pp.se if (Rs<2:0> == 0) { 15319883Sandreas@sandberg.pp.se Fd.ud = Fs.ud; 15329883Sandreas@sandberg.pp.se } else if (Rs<2:0> == 4) { 15339883Sandreas@sandberg.pp.se#if BYTE_ORDER == BIG_ENDIAN 15349883Sandreas@sandberg.pp.se Fd.ud = Fs.ud<31:0> << 32 | Ft.ud<63:32>; 15359883Sandreas@sandberg.pp.se#elif BYTE_ORDER == LITTLE_ENDIAN 15369883Sandreas@sandberg.pp.se Fd.ud = Ft.ud<31:0> << 32 | Fs.ud<63:32>; 15379883Sandreas@sandberg.pp.se#endif 15389883Sandreas@sandberg.pp.se } else { 15399883Sandreas@sandberg.pp.se Fd.ud = Fd.ud; 15409883Sandreas@sandberg.pp.se } 15419883Sandreas@sandberg.pp.se }}); 15429883Sandreas@sandberg.pp.se } 15439883Sandreas@sandberg.pp.se 15449883Sandreas@sandberg.pp.se format FloatAccOp { 15459883Sandreas@sandberg.pp.se 0x4: decode FUNCTION_LO { 15469883Sandreas@sandberg.pp.se 0x0: madd_s({{ Fd.sf = (Fs.sf * Ft.sf) + Fr.sf; }}); 15479883Sandreas@sandberg.pp.se 0x1: madd_d({{ Fd.df = (Fs.df * Ft.df) + Fr.df; }}); 154811363Sandreas@sandberg.pp.se 0x6: madd_ps({{ 15499883Sandreas@sandberg.pp.se Fd1.sf = (Fs1.df * Ft1.df) + Fr1.df; 15509883Sandreas@sandberg.pp.se Fd2.sf = (Fs2.df * Ft2.df) + Fr2.df; 15519883Sandreas@sandberg.pp.se }}); 15529883Sandreas@sandberg.pp.se } 15539883Sandreas@sandberg.pp.se 15549883Sandreas@sandberg.pp.se 0x5: decode FUNCTION_LO { 15559883Sandreas@sandberg.pp.se 0x0: msub_s({{ Fd.sf = (Fs.sf * Ft.sf) - Fr.sf; }}); 15569883Sandreas@sandberg.pp.se 0x1: msub_d({{ Fd.df = (Fs.df * Ft.df) - Fr.df; }}); 15579883Sandreas@sandberg.pp.se 0x6: msub_ps({{ 15589883Sandreas@sandberg.pp.se Fd1.sf = (Fs1.df * Ft1.df) - Fr1.df; 15599883Sandreas@sandberg.pp.se Fd2.sf = (Fs2.df * Ft2.df) - Fr2.df; 15609883Sandreas@sandberg.pp.se }}); 15619883Sandreas@sandberg.pp.se } 15629883Sandreas@sandberg.pp.se 15639883Sandreas@sandberg.pp.se 0x6: decode FUNCTION_LO { 15649883Sandreas@sandberg.pp.se 0x0: nmadd_s({{ Fd.sf = (-1 * Fs.sf * Ft.sf) - Fr.sf; }}); 15659883Sandreas@sandberg.pp.se 0x1: nmadd_d({{ Fd.df = (-1 * Fs.df * Ft.df) + Fr.df; }}); 15669883Sandreas@sandberg.pp.se 0x6: nmadd_ps({{ 15679883Sandreas@sandberg.pp.se Fd1.sf = -((Fs1.df * Ft1.df) + Fr1.df); 15689883Sandreas@sandberg.pp.se Fd2.sf = -((Fs2.df * Ft2.df) + Fr2.df); 15699883Sandreas@sandberg.pp.se }}); 15709883Sandreas@sandberg.pp.se } 15719883Sandreas@sandberg.pp.se 15729883Sandreas@sandberg.pp.se 0x7: decode FUNCTION_LO { 15739883Sandreas@sandberg.pp.se 0x0: nmsub_s({{ Fd.sf = (-1 * Fs.sf * Ft.sf) - Fr.sf; }}); 15749883Sandreas@sandberg.pp.se 0x1: nmsub_d({{ Fd.df = (-1 * Fs.df * Ft.df) - Fr.df; }}); 15759883Sandreas@sandberg.pp.se 0x6: nmsub_ps({{ 15769883Sandreas@sandberg.pp.se Fd1.sf = -((Fs1.df * Ft1.df) - Fr1.df); 15779883Sandreas@sandberg.pp.se Fd2.sf = -((Fs2.df * Ft2.df) - Fr2.df); 15789883Sandreas@sandberg.pp.se }}); 15799883Sandreas@sandberg.pp.se } 15809883Sandreas@sandberg.pp.se } 15819883Sandreas@sandberg.pp.se } 15829883Sandreas@sandberg.pp.se 15839883Sandreas@sandberg.pp.se format Branch { 15849883Sandreas@sandberg.pp.se 0x4: beql({{ cond = (Rs.sw == Rt.sw); }}, Likely); 15859883Sandreas@sandberg.pp.se 0x5: bnel({{ cond = (Rs.sw != Rt.sw); }}, Likely); 15869883Sandreas@sandberg.pp.se 0x6: blezl({{ cond = (Rs.sw <= 0); }}, Likely); 15879883Sandreas@sandberg.pp.se 0x7: bgtzl({{ cond = (Rs.sw > 0); }}, Likely); 15889883Sandreas@sandberg.pp.se } 15899883Sandreas@sandberg.pp.se } 15909883Sandreas@sandberg.pp.se 15919883Sandreas@sandberg.pp.se 0x3: decode OPCODE_LO { 15929883Sandreas@sandberg.pp.se //Table A-5 MIPS32 SPECIAL2 Encoding of Function Field 15939883Sandreas@sandberg.pp.se 0x4: decode FUNCTION_HI { 15949883Sandreas@sandberg.pp.se 0x0: decode FUNCTION_LO { 15959883Sandreas@sandberg.pp.se 0x2: IntOp::mul({{ 15969883Sandreas@sandberg.pp.se int64_t temp1 = Rs.sd * Rt.sd; 15979883Sandreas@sandberg.pp.se Rd.sw = temp1<31:0>; 15989883Sandreas@sandberg.pp.se }}, IntMultOp); 15999883Sandreas@sandberg.pp.se 16009883Sandreas@sandberg.pp.se format HiLoRdSelValOp { 16019883Sandreas@sandberg.pp.se 0x0: madd({{ 16029883Sandreas@sandberg.pp.se val = ((int64_t)HI_RD_SEL << 32 | LO_RD_SEL) + 16039883Sandreas@sandberg.pp.se (Rs.sd * Rt.sd); 16049883Sandreas@sandberg.pp.se }}, IntMultOp); 16059883Sandreas@sandberg.pp.se 0x1: maddu({{ 16069883Sandreas@sandberg.pp.se val = ((uint64_t)HI_RD_SEL << 32 | LO_RD_SEL) + 16079883Sandreas@sandberg.pp.se (Rs.ud * Rt.ud); 16089883Sandreas@sandberg.pp.se }}, IntMultOp); 16099883Sandreas@sandberg.pp.se 0x4: msub({{ 16109883Sandreas@sandberg.pp.se val = ((int64_t)HI_RD_SEL << 32 | LO_RD_SEL) - 16119883Sandreas@sandberg.pp.se (Rs.sd * Rt.sd); 16129883Sandreas@sandberg.pp.se }}, IntMultOp); 16139883Sandreas@sandberg.pp.se 0x5: msubu({{ 16149883Sandreas@sandberg.pp.se val = ((uint64_t)HI_RD_SEL << 32 | LO_RD_SEL) - 16159883Sandreas@sandberg.pp.se (Rs.ud * Rt.ud); 16169883Sandreas@sandberg.pp.se }}, IntMultOp); 16179883Sandreas@sandberg.pp.se } 16189883Sandreas@sandberg.pp.se } 16199883Sandreas@sandberg.pp.se 16209883Sandreas@sandberg.pp.se 0x4: decode FUNCTION_LO { 16219883Sandreas@sandberg.pp.se format BasicOp { 16229883Sandreas@sandberg.pp.se 0x0: clz({{ 16239883Sandreas@sandberg.pp.se int cnt = 32; 16249883Sandreas@sandberg.pp.se for (int idx = 31; idx >= 0; idx--) { 16259883Sandreas@sandberg.pp.se if (Rs<idx:idx> == 1) { 16269883Sandreas@sandberg.pp.se cnt = 31 - idx; 16279883Sandreas@sandberg.pp.se break; 16289883Sandreas@sandberg.pp.se } 16299883Sandreas@sandberg.pp.se } 16309883Sandreas@sandberg.pp.se Rd.uw = cnt; 16319883Sandreas@sandberg.pp.se }}); 16329883Sandreas@sandberg.pp.se 0x1: clo({{ 16339883Sandreas@sandberg.pp.se int cnt = 32; 16349883Sandreas@sandberg.pp.se for (int idx = 31; idx >= 0; idx--) { 1635 if (Rs<idx:idx> == 0) { 1636 cnt = 31 - idx; 1637 break; 1638 } 1639 } 1640 Rd.uw = cnt; 1641 }}); 1642 } 1643 } 1644 1645 0x7: decode FUNCTION_LO { 1646 0x7: FailUnimpl::sdbbp(); 1647 } 1648 } 1649 1650 //Table A-6 MIPS32 SPECIAL3 Encoding of Function Field for Release 2 1651 //of the Architecture 1652 0x7: decode FUNCTION_HI { 1653 0x0: decode FUNCTION_LO { 1654 format BasicOp { 1655 0x0: ext({{ Rt.uw = bits(Rs.uw, MSB+LSB, LSB); }}); 1656 0x4: ins({{ 1657 Rt.uw = bits(Rt.uw, 31, MSB+1) << (MSB+1) | 1658 bits(Rs.uw, MSB-LSB, 0) << LSB | 1659 bits(Rt.uw, LSB-1, 0); 1660 }}); 1661 } 1662 } 1663 1664 0x1: decode FUNCTION_LO { 1665 format MT_Control { 1666 0x0: fork({{ 1667 forkThread(xc->tcBase(), fault, RD, Rs, Rt); 1668 }}, UserMode); 1669 0x1: yield({{ 1670 Rd.sw = yieldThread(xc->tcBase(), fault, Rs.sw, 1671 YQMask); 1672 }}, UserMode); 1673 } 1674 1675 //Table 5-9 MIPS32 LX Encoding of the op Field (DSP ASE MANUAL) 1676 0x2: decode OP_HI { 1677 0x0: decode OP_LO { 1678 format LoadIndexedMemory { 1679 0x0: lwx({{ Rd.sw = Mem.sw; }}); 1680 0x4: lhx({{ Rd.sw = Mem.sh; }}); 1681 0x6: lbux({{ Rd.uw = Mem.ub; }}); 1682 } 1683 } 1684 } 1685 0x4: DspIntOp::insv({{ 1686 int pos = dspctl<5:0>; 1687 int size = dspctl<12:7> - 1; 1688 Rt.uw = insertBits(Rt.uw, pos+size, 1689 pos, Rs.uw<size:0>); 1690 }}); 1691 } 1692 1693 0x2: decode FUNCTION_LO { 1694 1695 //Table 5-5 MIPS32 ADDU.QB Encoding of the op Field 1696 //(DSP ASE MANUAL) 1697 0x0: decode OP_HI { 1698 0x0: decode OP_LO { 1699 format DspIntOp { 1700 0x0: addu_qb({{ 1701 Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_QB, 1702 NOSATURATE, UNSIGNED, &dspctl); 1703 }}); 1704 0x1: subu_qb({{ 1705 Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_QB, 1706 NOSATURATE, UNSIGNED, &dspctl); 1707 }}); 1708 0x4: addu_s_qb({{ 1709 Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_QB, 1710 SATURATE, UNSIGNED, &dspctl); 1711 }}); 1712 0x5: subu_s_qb({{ 1713 Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_QB, 1714 SATURATE, UNSIGNED, &dspctl); 1715 }}); 1716 0x6: muleu_s_ph_qbl({{ 1717 Rd.uw = dspMuleu(Rs.uw, Rt.uw, 1718 MODE_L, &dspctl); 1719 }}, IntMultOp); 1720 0x7: muleu_s_ph_qbr({{ 1721 Rd.uw = dspMuleu(Rs.uw, Rt.uw, 1722 MODE_R, &dspctl); 1723 }}, IntMultOp); 1724 } 1725 } 1726 0x1: decode OP_LO { 1727 format DspIntOp { 1728 0x0: addu_ph({{ 1729 Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 1730 NOSATURATE, UNSIGNED, &dspctl); 1731 }}); 1732 0x1: subu_ph({{ 1733 Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 1734 NOSATURATE, UNSIGNED, &dspctl); 1735 }}); 1736 0x2: addq_ph({{ 1737 Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 1738 NOSATURATE, SIGNED, &dspctl); 1739 }}); 1740 0x3: subq_ph({{ 1741 Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 1742 NOSATURATE, SIGNED, &dspctl); 1743 }}); 1744 0x4: addu_s_ph({{ 1745 Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 1746 SATURATE, UNSIGNED, &dspctl); 1747 }}); 1748 0x5: subu_s_ph({{ 1749 Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 1750 SATURATE, UNSIGNED, &dspctl); 1751 }}); 1752 0x6: addq_s_ph({{ 1753 Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 1754 SATURATE, SIGNED, &dspctl); 1755 }}); 1756 0x7: subq_s_ph({{ 1757 Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 1758 SATURATE, SIGNED, &dspctl); 1759 }}); 1760 } 1761 } 1762 0x2: decode OP_LO { 1763 format DspIntOp { 1764 0x0: addsc({{ 1765 int64_t dresult; 1766 dresult = Rs.ud + Rt.ud; 1767 Rd.sw = dresult<31:0>; 1768 dspctl = insertBits(dspctl, 13, 13, 1769 dresult<32:32>); 1770 }}); 1771 0x1: addwc({{ 1772 int64_t dresult; 1773 dresult = Rs.sd + Rt.sd + dspctl<13:13>; 1774 Rd.sw = dresult<31:0>; 1775 if (dresult<32:32> != dresult<31:31>) 1776 dspctl = insertBits(dspctl, 20, 20, 1); 1777 }}); 1778 0x2: modsub({{ 1779 Rd.sw = (Rs.sw == 0) ? Rt.sw<23:8> : 1780 Rs.sw - Rt.sw<7:0>; 1781 }}); 1782 0x4: raddu_w_qb({{ 1783 Rd.uw = Rs.uw<31:24> + Rs.uw<23:16> + 1784 Rs.uw<15:8> + Rs.uw<7:0>; 1785 }}); 1786 0x6: addq_s_w({{ 1787 Rd.sw = dspAdd(Rs.sw, Rt.sw, SIMD_FMT_W, 1788 SATURATE, SIGNED, &dspctl); 1789 }}); 1790 0x7: subq_s_w({{ 1791 Rd.sw = dspSub(Rs.sw, Rt.sw, SIMD_FMT_W, 1792 SATURATE, SIGNED, &dspctl); 1793 }}); 1794 } 1795 } 1796 0x3: decode OP_LO { 1797 format DspIntOp { 1798 0x4: muleq_s_w_phl({{ 1799 Rd.sw = dspMuleq(Rs.sw, Rt.sw, 1800 MODE_L, &dspctl); 1801 }}, IntMultOp); 1802 0x5: muleq_s_w_phr({{ 1803 Rd.sw = dspMuleq(Rs.sw, Rt.sw, 1804 MODE_R, &dspctl); 1805 }}, IntMultOp); 1806 0x6: mulq_s_ph({{ 1807 Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_PH, 1808 SATURATE, NOROUND, &dspctl); 1809 }}, IntMultOp); 1810 0x7: mulq_rs_ph({{ 1811 Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_PH, 1812 SATURATE, ROUND, &dspctl); 1813 }}, IntMultOp); 1814 } 1815 } 1816 } 1817 1818 //Table 5-6 MIPS32 CMPU_EQ_QB Encoding of the op Field 1819 //(DSP ASE MANUAL) 1820 0x1: decode OP_HI { 1821 0x0: decode OP_LO { 1822 format DspIntOp { 1823 0x0: cmpu_eq_qb({{ 1824 dspCmp(Rs.uw, Rt.uw, SIMD_FMT_QB, 1825 UNSIGNED, CMP_EQ, &dspctl); 1826 }}); 1827 0x1: cmpu_lt_qb({{ 1828 dspCmp(Rs.uw, Rt.uw, SIMD_FMT_QB, 1829 UNSIGNED, CMP_LT, &dspctl); 1830 }}); 1831 0x2: cmpu_le_qb({{ 1832 dspCmp(Rs.uw, Rt.uw, SIMD_FMT_QB, 1833 UNSIGNED, CMP_LE, &dspctl); 1834 }}); 1835 0x3: pick_qb({{ 1836 Rd.uw = dspPick(Rs.uw, Rt.uw, 1837 SIMD_FMT_QB, &dspctl); 1838 }}); 1839 0x4: cmpgu_eq_qb({{ 1840 Rd.uw = dspCmpg(Rs.uw, Rt.uw, SIMD_FMT_QB, 1841 UNSIGNED, CMP_EQ ); 1842 }}); 1843 0x5: cmpgu_lt_qb({{ 1844 Rd.uw = dspCmpg(Rs.uw, Rt.uw, SIMD_FMT_QB, 1845 UNSIGNED, CMP_LT); 1846 }}); 1847 0x6: cmpgu_le_qb({{ 1848 Rd.uw = dspCmpg(Rs.uw, Rt.uw, SIMD_FMT_QB, 1849 UNSIGNED, CMP_LE); 1850 }}); 1851 } 1852 } 1853 0x1: decode OP_LO { 1854 format DspIntOp { 1855 0x0: cmp_eq_ph({{ 1856 dspCmp(Rs.uw, Rt.uw, SIMD_FMT_PH, 1857 SIGNED, CMP_EQ, &dspctl); 1858 }}); 1859 0x1: cmp_lt_ph({{ 1860 dspCmp(Rs.uw, Rt.uw, SIMD_FMT_PH, 1861 SIGNED, CMP_LT, &dspctl); 1862 }}); 1863 0x2: cmp_le_ph({{ 1864 dspCmp(Rs.uw, Rt.uw, SIMD_FMT_PH, 1865 SIGNED, CMP_LE, &dspctl); 1866 }}); 1867 0x3: pick_ph({{ 1868 Rd.uw = dspPick(Rs.uw, Rt.uw, 1869 SIMD_FMT_PH, &dspctl); 1870 }}); 1871 0x4: precrq_qb_ph({{ 1872 Rd.uw = Rs.uw<31:24> << 24 | 1873 Rs.uw<15:8> << 16 | 1874 Rt.uw<31:24> << 8 | 1875 Rt.uw<15:8>; 1876 }}); 1877 0x5: precr_qb_ph({{ 1878 Rd.uw = Rs.uw<23:16> << 24 | 1879 Rs.uw<7:0> << 16 | 1880 Rt.uw<23:16> << 8 | 1881 Rt.uw<7:0>; 1882 }}); 1883 0x6: packrl_ph({{ 1884 Rd.uw = dspPack(Rs.uw, Rt.uw, SIMD_FMT_PH); 1885 }}); 1886 0x7: precrqu_s_qb_ph({{ 1887 Rd.uw = dspPrecrqu(Rs.uw, Rt.uw, &dspctl); 1888 }}); 1889 } 1890 } 1891 0x2: decode OP_LO { 1892 format DspIntOp { 1893 0x4: precrq_ph_w({{ 1894 Rd.uw = Rs.uw<31:16> << 16 | Rt.uw<31:16>; 1895 }}); 1896 0x5: precrq_rs_ph_w({{ 1897 Rd.uw = dspPrecrq(Rs.uw, Rt.uw, 1898 SIMD_FMT_W, &dspctl); 1899 }}); 1900 } 1901 } 1902 0x3: decode OP_LO { 1903 format DspIntOp { 1904 0x0: cmpgdu_eq_qb({{ 1905 Rd.uw = dspCmpgd(Rs.uw, Rt.uw, SIMD_FMT_QB, 1906 UNSIGNED, CMP_EQ, &dspctl); 1907 }}); 1908 0x1: cmpgdu_lt_qb({{ 1909 Rd.uw = dspCmpgd(Rs.uw, Rt.uw, SIMD_FMT_QB, 1910 UNSIGNED, CMP_LT, &dspctl); 1911 }}); 1912 0x2: cmpgdu_le_qb({{ 1913 Rd.uw = dspCmpgd(Rs.uw, Rt.uw, SIMD_FMT_QB, 1914 UNSIGNED, CMP_LE, &dspctl); 1915 }}); 1916 0x6: precr_sra_ph_w({{ 1917 Rt.uw = dspPrecrSra(Rt.uw, Rs.uw, RD, 1918 SIMD_FMT_W, NOROUND); 1919 }}); 1920 0x7: precr_sra_r_ph_w({{ 1921 Rt.uw = dspPrecrSra(Rt.uw, Rs.uw, RD, 1922 SIMD_FMT_W, ROUND); 1923 }}); 1924 } 1925 } 1926 } 1927 1928 //Table 5-7 MIPS32 ABSQ_S.PH Encoding of the op Field 1929 //(DSP ASE MANUAL) 1930 0x2: decode OP_HI { 1931 0x0: decode OP_LO { 1932 format DspIntOp { 1933 0x1: absq_s_qb({{ 1934 Rd.sw = dspAbs(Rt.sw, SIMD_FMT_QB, &dspctl); 1935 }}); 1936 0x2: repl_qb({{ 1937 Rd.uw = RS_RT<7:0> << 24 | 1938 RS_RT<7:0> << 16 | 1939 RS_RT<7:0> << 8 | 1940 RS_RT<7:0>; 1941 }}); 1942 0x3: replv_qb({{ 1943 Rd.sw = Rt.uw<7:0> << 24 | 1944 Rt.uw<7:0> << 16 | 1945 Rt.uw<7:0> << 8 | 1946 Rt.uw<7:0>; 1947 }}); 1948 0x4: precequ_ph_qbl({{ 1949 Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 1950 SIMD_FMT_PH, SIGNED, MODE_L); 1951 }}); 1952 0x5: precequ_ph_qbr({{ 1953 Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 1954 SIMD_FMT_PH, SIGNED, MODE_R); 1955 }}); 1956 0x6: precequ_ph_qbla({{ 1957 Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 1958 SIMD_FMT_PH, SIGNED, MODE_LA); 1959 }}); 1960 0x7: precequ_ph_qbra({{ 1961 Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 1962 SIMD_FMT_PH, SIGNED, MODE_RA); 1963 }}); 1964 } 1965 } 1966 0x1: decode OP_LO { 1967 format DspIntOp { 1968 0x1: absq_s_ph({{ 1969 Rd.sw = dspAbs(Rt.sw, SIMD_FMT_PH, &dspctl); 1970 }}); 1971 0x2: repl_ph({{ 1972 Rd.uw = (sext<10>(RS_RT))<15:0> << 16 | 1973 (sext<10>(RS_RT))<15:0>; 1974 }}); 1975 0x3: replv_ph({{ 1976 Rd.uw = Rt.uw<15:0> << 16 | 1977 Rt.uw<15:0>; 1978 }}); 1979 0x4: preceq_w_phl({{ 1980 Rd.uw = dspPrece(Rt.uw, SIMD_FMT_PH, SIGNED, 1981 SIMD_FMT_W, SIGNED, MODE_L); 1982 }}); 1983 0x5: preceq_w_phr({{ 1984 Rd.uw = dspPrece(Rt.uw, SIMD_FMT_PH, SIGNED, 1985 SIMD_FMT_W, SIGNED, MODE_R); 1986 }}); 1987 } 1988 } 1989 0x2: decode OP_LO { 1990 format DspIntOp { 1991 0x1: absq_s_w({{ 1992 Rd.sw = dspAbs(Rt.sw, SIMD_FMT_W, &dspctl); 1993 }}); 1994 } 1995 } 1996 0x3: decode OP_LO { 1997 0x3: IntOp::bitrev({{ 1998 Rd.uw = bitrev( Rt.uw<15:0> ); 1999 }}); 2000 format DspIntOp { 2001 0x4: preceu_ph_qbl({{ 2002 Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 2003 UNSIGNED, SIMD_FMT_PH, 2004 UNSIGNED, MODE_L); 2005 }}); 2006 0x5: preceu_ph_qbr({{ 2007 Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 2008 UNSIGNED, SIMD_FMT_PH, 2009 UNSIGNED, MODE_R ); 2010 }}); 2011 0x6: preceu_ph_qbla({{ 2012 Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 2013 UNSIGNED, SIMD_FMT_PH, 2014 UNSIGNED, MODE_LA ); 2015 }}); 2016 0x7: preceu_ph_qbra({{ 2017 Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 2018 UNSIGNED, SIMD_FMT_PH, 2019 UNSIGNED, MODE_RA); 2020 }}); 2021 } 2022 } 2023 } 2024 2025 //Table 5-8 MIPS32 SHLL.QB Encoding of the op Field 2026 //(DSP ASE MANUAL) 2027 0x3: decode OP_HI { 2028 0x0: decode OP_LO { 2029 format DspIntOp { 2030 0x0: shll_qb({{ 2031 Rd.sw = dspShll(Rt.sw, RS, SIMD_FMT_QB, 2032 NOSATURATE, UNSIGNED, &dspctl); 2033 }}); 2034 0x1: shrl_qb({{ 2035 Rd.sw = dspShrl(Rt.sw, RS, SIMD_FMT_QB, 2036 UNSIGNED); 2037 }}); 2038 0x2: shllv_qb({{ 2039 Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_QB, 2040 NOSATURATE, UNSIGNED, &dspctl); 2041 }}); 2042 0x3: shrlv_qb({{ 2043 Rd.sw = dspShrl(Rt.sw, Rs.sw, SIMD_FMT_QB, 2044 UNSIGNED); 2045 }}); 2046 0x4: shra_qb({{ 2047 Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_QB, 2048 NOROUND, SIGNED, &dspctl); 2049 }}); 2050 0x5: shra_r_qb({{ 2051 Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_QB, 2052 ROUND, SIGNED, &dspctl); 2053 }}); 2054 0x6: shrav_qb({{ 2055 Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_QB, 2056 NOROUND, SIGNED, &dspctl); 2057 }}); 2058 0x7: shrav_r_qb({{ 2059 Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_QB, 2060 ROUND, SIGNED, &dspctl); 2061 }}); 2062 } 2063 } 2064 0x1: decode OP_LO { 2065 format DspIntOp { 2066 0x0: shll_ph({{ 2067 Rd.uw = dspShll(Rt.uw, RS, SIMD_FMT_PH, 2068 NOSATURATE, SIGNED, &dspctl); 2069 }}); 2070 0x1: shra_ph({{ 2071 Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_PH, 2072 NOROUND, SIGNED, &dspctl); 2073 }}); 2074 0x2: shllv_ph({{ 2075 Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_PH, 2076 NOSATURATE, SIGNED, &dspctl); 2077 }}); 2078 0x3: shrav_ph({{ 2079 Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_PH, 2080 NOROUND, SIGNED, &dspctl); 2081 }}); 2082 0x4: shll_s_ph({{ 2083 Rd.sw = dspShll(Rt.sw, RS, SIMD_FMT_PH, 2084 SATURATE, SIGNED, &dspctl); 2085 }}); 2086 0x5: shra_r_ph({{ 2087 Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_PH, 2088 ROUND, SIGNED, &dspctl); 2089 }}); 2090 0x6: shllv_s_ph({{ 2091 Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_PH, 2092 SATURATE, SIGNED, &dspctl); 2093 }}); 2094 0x7: shrav_r_ph({{ 2095 Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_PH, 2096 ROUND, SIGNED, &dspctl); 2097 }}); 2098 } 2099 } 2100 0x2: decode OP_LO { 2101 format DspIntOp { 2102 0x4: shll_s_w({{ 2103 Rd.sw = dspShll(Rt.sw, RS, SIMD_FMT_W, 2104 SATURATE, SIGNED, &dspctl); 2105 }}); 2106 0x5: shra_r_w({{ 2107 Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_W, 2108 ROUND, SIGNED, &dspctl); 2109 }}); 2110 0x6: shllv_s_w({{ 2111 Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_W, 2112 SATURATE, SIGNED, &dspctl); 2113 }}); 2114 0x7: shrav_r_w({{ 2115 Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_W, 2116 ROUND, SIGNED, &dspctl); 2117 }}); 2118 } 2119 } 2120 0x3: decode OP_LO { 2121 format DspIntOp { 2122 0x1: shrl_ph({{ 2123 Rd.sw = dspShrl(Rt.sw, RS, SIMD_FMT_PH, 2124 UNSIGNED); 2125 }}); 2126 0x3: shrlv_ph({{ 2127 Rd.sw = dspShrl(Rt.sw, Rs.sw, SIMD_FMT_PH, 2128 UNSIGNED); 2129 }}); 2130 } 2131 } 2132 } 2133 } 2134 2135 0x3: decode FUNCTION_LO { 2136 2137 //Table 3.12 MIPS32 ADDUH.QB Encoding of the op Field 2138 //(DSP ASE Rev2 Manual) 2139 0x0: decode OP_HI { 2140 0x0: decode OP_LO { 2141 format DspIntOp { 2142 0x0: adduh_qb({{ 2143 Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_QB, 2144 NOROUND, UNSIGNED); 2145 }}); 2146 0x1: subuh_qb({{ 2147 Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_QB, 2148 NOROUND, UNSIGNED); 2149 }}); 2150 0x2: adduh_r_qb({{ 2151 Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_QB, 2152 ROUND, UNSIGNED); 2153 }}); 2154 0x3: subuh_r_qb({{ 2155 Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_QB, 2156 ROUND, UNSIGNED); 2157 }}); 2158 } 2159 } 2160 0x1: decode OP_LO { 2161 format DspIntOp { 2162 0x0: addqh_ph({{ 2163 Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_PH, 2164 NOROUND, SIGNED); 2165 }}); 2166 0x1: subqh_ph({{ 2167 Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_PH, 2168 NOROUND, SIGNED); 2169 }}); 2170 0x2: addqh_r_ph({{ 2171 Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_PH, 2172 ROUND, SIGNED); 2173 }}); 2174 0x3: subqh_r_ph({{ 2175 Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_PH, 2176 ROUND, SIGNED); 2177 }}); 2178 0x4: mul_ph({{ 2179 Rd.sw = dspMul(Rs.sw, Rt.sw, SIMD_FMT_PH, 2180 NOSATURATE, &dspctl); 2181 }}, IntMultOp); 2182 0x6: mul_s_ph({{ 2183 Rd.sw = dspMul(Rs.sw, Rt.sw, SIMD_FMT_PH, 2184 SATURATE, &dspctl); 2185 }}, IntMultOp); 2186 } 2187 } 2188 0x2: decode OP_LO { 2189 format DspIntOp { 2190 0x0: addqh_w({{ 2191 Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_W, 2192 NOROUND, SIGNED); 2193 }}); 2194 0x1: subqh_w({{ 2195 Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_W, 2196 NOROUND, SIGNED); 2197 }}); 2198 0x2: addqh_r_w({{ 2199 Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_W, 2200 ROUND, SIGNED); 2201 }}); 2202 0x3: subqh_r_w({{ 2203 Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_W, 2204 ROUND, SIGNED); 2205 }}); 2206 0x6: mulq_s_w({{ 2207 Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_W, 2208 SATURATE, NOROUND, &dspctl); 2209 }}, IntMultOp); 2210 0x7: mulq_rs_w({{ 2211 Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_W, 2212 SATURATE, ROUND, &dspctl); 2213 }}, IntMultOp); 2214 } 2215 } 2216 } 2217 } 2218 2219 //Table A-10 MIPS32 BSHFL Encoding of sa Field 2220 0x4: decode SA { 2221 format BasicOp { 2222 0x02: wsbh({{ 2223 Rd.uw = Rt.uw<23:16> << 24 | 2224 Rt.uw<31:24> << 16 | 2225 Rt.uw<7:0> << 8 | 2226 Rt.uw<15:8>; 2227 }}); 2228 0x10: seb({{ Rd.sw = Rt.sb; }}); 2229 0x18: seh({{ Rd.sw = Rt.sh; }}); 2230 } 2231 } 2232 2233 0x6: decode FUNCTION_LO { 2234 2235 //Table 5-10 MIPS32 DPAQ.W.PH Encoding of the op Field 2236 //(DSP ASE MANUAL) 2237 0x0: decode OP_HI { 2238 0x0: decode OP_LO { 2239 format DspHiLoOp { 2240 0x0: dpa_w_ph({{ 2241 dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 2242 SIMD_FMT_PH, SIGNED, MODE_L); 2243 }}, IntMultOp); 2244 0x1: dps_w_ph({{ 2245 dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 2246 SIMD_FMT_PH, SIGNED, MODE_L); 2247 }}, IntMultOp); 2248 0x2: mulsa_w_ph({{ 2249 dspac = dspMulsa(dspac, Rs.sw, Rt.sw, 2250 ACDST, SIMD_FMT_PH ); 2251 }}, IntMultOp); 2252 0x3: dpau_h_qbl({{ 2253 dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 2254 SIMD_FMT_QB, UNSIGNED, MODE_L); 2255 }}, IntMultOp); 2256 0x4: dpaq_s_w_ph({{ 2257 dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 2258 ACDST, SIMD_FMT_PH, 2259 SIMD_FMT_W, NOSATURATE, 2260 MODE_L, &dspctl); 2261 }}, IntMultOp); 2262 0x5: dpsq_s_w_ph({{ 2263 dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 2264 ACDST, SIMD_FMT_PH, 2265 SIMD_FMT_W, NOSATURATE, 2266 MODE_L, &dspctl); 2267 }}, IntMultOp); 2268 0x6: mulsaq_s_w_ph({{ 2269 dspac = dspMulsaq(dspac, Rs.sw, Rt.sw, 2270 ACDST, SIMD_FMT_PH, 2271 &dspctl); 2272 }}, IntMultOp); 2273 0x7: dpau_h_qbr({{ 2274 dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 2275 SIMD_FMT_QB, UNSIGNED, MODE_R); 2276 }}, IntMultOp); 2277 } 2278 } 2279 0x1: decode OP_LO { 2280 format DspHiLoOp { 2281 0x0: dpax_w_ph({{ 2282 dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 2283 SIMD_FMT_PH, SIGNED, MODE_X); 2284 }}, IntMultOp); 2285 0x1: dpsx_w_ph({{ 2286 dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 2287 SIMD_FMT_PH, SIGNED, MODE_X); 2288 }}, IntMultOp); 2289 0x3: dpsu_h_qbl({{ 2290 dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 2291 SIMD_FMT_QB, UNSIGNED, MODE_L); 2292 }}, IntMultOp); 2293 0x4: dpaq_sa_l_w({{ 2294 dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 2295 ACDST, SIMD_FMT_W, 2296 SIMD_FMT_L, SATURATE, 2297 MODE_L, &dspctl); 2298 }}, IntMultOp); 2299 0x5: dpsq_sa_l_w({{ 2300 dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 2301 ACDST, SIMD_FMT_W, 2302 SIMD_FMT_L, SATURATE, 2303 MODE_L, &dspctl); 2304 }}, IntMultOp); 2305 0x7: dpsu_h_qbr({{ 2306 dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 2307 SIMD_FMT_QB, UNSIGNED, MODE_R); 2308 }}, IntMultOp); 2309 } 2310 } 2311 0x2: decode OP_LO { 2312 format DspHiLoOp { 2313 0x0: maq_sa_w_phl({{ 2314 dspac = dspMaq(dspac, Rs.uw, Rt.uw, 2315 ACDST, SIMD_FMT_PH, 2316 MODE_L, SATURATE, &dspctl); 2317 }}, IntMultOp); 2318 0x2: maq_sa_w_phr({{ 2319 dspac = dspMaq(dspac, Rs.uw, Rt.uw, 2320 ACDST, SIMD_FMT_PH, 2321 MODE_R, SATURATE, &dspctl); 2322 }}, IntMultOp); 2323 0x4: maq_s_w_phl({{ 2324 dspac = dspMaq(dspac, Rs.uw, Rt.uw, 2325 ACDST, SIMD_FMT_PH, 2326 MODE_L, NOSATURATE, &dspctl); 2327 }}, IntMultOp); 2328 0x6: maq_s_w_phr({{ 2329 dspac = dspMaq(dspac, Rs.uw, Rt.uw, 2330 ACDST, SIMD_FMT_PH, 2331 MODE_R, NOSATURATE, &dspctl); 2332 }}, IntMultOp); 2333 } 2334 } 2335 0x3: decode OP_LO { 2336 format DspHiLoOp { 2337 0x0: dpaqx_s_w_ph({{ 2338 dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 2339 ACDST, SIMD_FMT_PH, 2340 SIMD_FMT_W, NOSATURATE, 2341 MODE_X, &dspctl); 2342 }}, IntMultOp); 2343 0x1: dpsqx_s_w_ph({{ 2344 dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 2345 ACDST, SIMD_FMT_PH, 2346 SIMD_FMT_W, NOSATURATE, 2347 MODE_X, &dspctl); 2348 }}, IntMultOp); 2349 0x2: dpaqx_sa_w_ph({{ 2350 dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 2351 ACDST, SIMD_FMT_PH, 2352 SIMD_FMT_W, SATURATE, 2353 MODE_X, &dspctl); 2354 }}, IntMultOp); 2355 0x3: dpsqx_sa_w_ph({{ 2356 dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 2357 ACDST, SIMD_FMT_PH, 2358 SIMD_FMT_W, SATURATE, 2359 MODE_X, &dspctl); 2360 }}, IntMultOp); 2361 } 2362 } 2363 } 2364 2365 //Table 3.3 MIPS32 APPEND Encoding of the op Field 2366 0x1: decode OP_HI { 2367 0x0: decode OP_LO { 2368 format IntOp { 2369 0x0: append({{ 2370 Rt.uw = (Rt.uw << RD) | bits(Rs.uw, RD - 1, 0); 2371 }}); 2372 0x1: prepend({{ 2373 Rt.uw = (Rt.uw >> RD) | 2374 (bits(Rs.uw, RD - 1, 0) << (32 - RD)); 2375 }}); 2376 } 2377 } 2378 0x2: decode OP_LO { 2379 format IntOp { 2380 0x0: balign({{ 2381 Rt.uw = (Rt.uw << (8 * BP)) | 2382 (Rs.uw >> (8 * (4 - BP))); 2383 }}); 2384 } 2385 } 2386 } 2387 2388 } 2389 0x7: decode FUNCTION_LO { 2390 2391 //Table 5-11 MIPS32 EXTR.W Encoding of the op Field 2392 //(DSP ASE MANUAL) 2393 0x0: decode OP_HI { 2394 0x0: decode OP_LO { 2395 format DspHiLoOp { 2396 0x0: extr_w({{ 2397 Rt.uw = dspExtr(dspac, SIMD_FMT_W, RS, 2398 NOROUND, NOSATURATE, &dspctl); 2399 }}); 2400 0x1: extrv_w({{ 2401 Rt.uw = dspExtr(dspac, SIMD_FMT_W, Rs.uw, 2402 NOROUND, NOSATURATE, &dspctl); 2403 }}); 2404 0x2: extp({{ 2405 Rt.uw = dspExtp(dspac, RS, &dspctl); 2406 }}); 2407 0x3: extpv({{ 2408 Rt.uw = dspExtp(dspac, Rs.uw, &dspctl); 2409 }}); 2410 0x4: extr_r_w({{ 2411 Rt.uw = dspExtr(dspac, SIMD_FMT_W, RS, 2412 ROUND, NOSATURATE, &dspctl); 2413 }}); 2414 0x5: extrv_r_w({{ 2415 Rt.uw = dspExtr(dspac, SIMD_FMT_W, Rs.uw, 2416 ROUND, NOSATURATE, &dspctl); 2417 }}); 2418 0x6: extr_rs_w({{ 2419 Rt.uw = dspExtr(dspac, SIMD_FMT_W, RS, 2420 ROUND, SATURATE, &dspctl); 2421 }}); 2422 0x7: extrv_rs_w({{ 2423 Rt.uw = dspExtr(dspac, SIMD_FMT_W, Rs.uw, 2424 ROUND, SATURATE, &dspctl); 2425 }}); 2426 } 2427 } 2428 0x1: decode OP_LO { 2429 format DspHiLoOp { 2430 0x2: extpdp({{ 2431 Rt.uw = dspExtpd(dspac, RS, &dspctl); 2432 }}); 2433 0x3: extpdpv({{ 2434 Rt.uw = dspExtpd(dspac, Rs.uw, &dspctl); 2435 }}); 2436 0x6: extr_s_h({{ 2437 Rt.uw = dspExtr(dspac, SIMD_FMT_PH, RS, 2438 NOROUND, SATURATE, &dspctl); 2439 }}); 2440 0x7: extrv_s_h({{ 2441 Rt.uw = dspExtr(dspac, SIMD_FMT_PH, Rs.uw, 2442 NOROUND, SATURATE, &dspctl); 2443 }}); 2444 } 2445 } 2446 0x2: decode OP_LO { 2447 format DspIntOp { 2448 0x2: rddsp({{ 2449 Rd.uw = readDSPControl(&dspctl, RDDSPMASK); 2450 }}); 2451 0x3: wrdsp({{ 2452 writeDSPControl(&dspctl, Rs.uw, WRDSPMASK); 2453 }}); 2454 } 2455 } 2456 0x3: decode OP_LO { 2457 format DspHiLoOp { 2458 0x2: shilo({{ 2459 if (sext<6>(HILOSA) < 0) { 2460 dspac = (uint64_t)dspac << 2461 -sext<6>(HILOSA); 2462 } else { 2463 dspac = (uint64_t)dspac >> 2464 sext<6>(HILOSA); 2465 } 2466 }}); 2467 0x3: shilov({{ 2468 if (sext<6>(Rs.sw<5:0>) < 0) { 2469 dspac = (uint64_t)dspac << 2470 -sext<6>(Rs.sw<5:0>); 2471 } else { 2472 dspac = (uint64_t)dspac >> 2473 sext<6>(Rs.sw<5:0>); 2474 } 2475 }}); 2476 0x7: mthlip({{ 2477 dspac = dspac << 32; 2478 dspac |= Rs.uw; 2479 dspctl = insertBits(dspctl, 5, 0, 2480 dspctl<5:0> + 32); 2481 }}); 2482 } 2483 } 2484 } 2485 0x3: decode OP { 2486#if FULL_SYSTEM 2487 0x0: FailUnimpl::rdhwr(); 2488#else 2489 0x0: decode RD { 2490 29: BasicOp::rdhwr({{ Rt = TpValue; }}); 2491 } 2492#endif 2493 } 2494 } 2495 } 2496 } 2497 2498 0x4: decode OPCODE_LO { 2499 format LoadMemory { 2500 0x0: lb({{ Rt.sw = Mem.sb; }}); 2501 0x1: lh({{ Rt.sw = Mem.sh; }}); 2502 0x3: lw({{ Rt.sw = Mem.sw; }}); 2503 0x4: lbu({{ Rt.uw = Mem.ub;}}); 2504 0x5: lhu({{ Rt.uw = Mem.uh; }}); 2505 } 2506 2507 format LoadUnalignedMemory { 2508 0x2: lwl({{ 2509 uint32_t mem_shift = 24 - (8 * byte_offset); 2510 Rt.uw = mem_word << mem_shift | (Rt.uw & mask(mem_shift)); 2511 }}); 2512 0x6: lwr({{ 2513 uint32_t mem_shift = 8 * byte_offset; 2514 Rt.uw = (Rt.uw & (mask(mem_shift) << (32 - mem_shift))) | 2515 (mem_word >> mem_shift); 2516 }}); 2517 } 2518 } 2519 2520 0x5: decode OPCODE_LO { 2521 format StoreMemory { 2522 0x0: sb({{ Mem.ub = Rt<7:0>; }}); 2523 0x1: sh({{ Mem.uh = Rt<15:0>; }}); 2524 0x3: sw({{ Mem.uw = Rt<31:0>; }}); 2525 } 2526 2527 format StoreUnalignedMemory { 2528 0x2: swl({{ 2529 uint32_t reg_shift = 24 - (8 * byte_offset); 2530 uint32_t mem_shift = 32 - reg_shift; 2531 mem_word = (mem_word & (mask(reg_shift) << mem_shift)) | 2532 (Rt.uw >> reg_shift); 2533 }}); 2534 0x6: swr({{ 2535 uint32_t reg_shift = 8 * byte_offset; 2536 mem_word = Rt.uw << reg_shift | 2537 (mem_word & (mask(reg_shift))); 2538 }}); 2539 } 2540 format CP0Control { 2541 0x7: cache({{ 2542 //Addr CacheEA = Rs.uw + OFFSET; 2543 //fault = xc->CacheOp((uint8_t)CACHE_OP,(Addr) CacheEA); 2544 }}); 2545 } 2546 } 2547 2548 0x6: decode OPCODE_LO { 2549 format LoadMemory { 2550 0x0: ll({{ Rt.uw = Mem.uw; }}, mem_flags=LLSC); 2551 0x1: lwc1({{ Ft.uw = Mem.uw; }}); 2552 0x5: ldc1({{ Ft.ud = Mem.ud; }}); 2553 } 2554 0x2: CP2Unimpl::lwc2(); 2555 0x6: CP2Unimpl::ldc2(); 2556 0x3: Prefetch::pref(); 2557 } 2558 2559 2560 0x7: decode OPCODE_LO { 2561 0x0: StoreCond::sc({{ Mem.uw = Rt.uw; }}, 2562 {{ uint64_t tmp = write_result; 2563 Rt.uw = (tmp == 0 || tmp == 1) ? tmp : Rt.uw; 2564 }}, mem_flags=LLSC, 2565 inst_flags = IsStoreConditional); 2566 format StoreMemory { 2567 0x1: swc1({{ Mem.uw = Ft.uw; }}); 2568 0x5: sdc1({{ Mem.ud = Ft.ud; }}); 2569 } 2570 0x2: CP2Unimpl::swc2(); 2571 0x6: CP2Unimpl::sdc2(); 2572 } 2573} 2574 2575 2576