decoder.isa revision 8564
12686Sksewell@umich.edu// -*- mode:c++ -*- 22100SN/A 35254Sksewell@umich.edu// Copyright (c) 2007 MIPS Technologies, Inc. 45254Sksewell@umich.edu// All rights reserved. 55254Sksewell@umich.edu// 65254Sksewell@umich.edu// Redistribution and use in source and binary forms, with or without 75254Sksewell@umich.edu// modification, are permitted provided that the following conditions are 85254Sksewell@umich.edu// met: redistributions of source code must retain the above copyright 95254Sksewell@umich.edu// notice, this list of conditions and the following disclaimer; 105254Sksewell@umich.edu// redistributions in binary form must reproduce the above copyright 115254Sksewell@umich.edu// notice, this list of conditions and the following disclaimer in the 125254Sksewell@umich.edu// documentation and/or other materials provided with the distribution; 135254Sksewell@umich.edu// neither the name of the copyright holders nor the names of its 145254Sksewell@umich.edu// contributors may be used to endorse or promote products derived from 155254Sksewell@umich.edu// this software without specific prior written permission. 165254Sksewell@umich.edu// 175254Sksewell@umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 185254Sksewell@umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 195254Sksewell@umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 205254Sksewell@umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 215254Sksewell@umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 225254Sksewell@umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 235254Sksewell@umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 245254Sksewell@umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 255254Sksewell@umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 265254Sksewell@umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 275254Sksewell@umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 285254Sksewell@umich.edu// 295254Sksewell@umich.edu// Authors: Korey Sewell 305254Sksewell@umich.edu// Brett Miller 315254Sksewell@umich.edu// Jaidev Patwardhan 322706Sksewell@umich.edu 332022SN/A//////////////////////////////////////////////////////////////////// 342022SN/A// 352043SN/A// The actual MIPS32 ISA decoder 362024SN/A// ----------------------------- 372024SN/A// The following instructions are specified in the MIPS32 ISA 382043SN/A// Specification. Decoding closely follows the style specified 392686Sksewell@umich.edu// in the MIPS32 ISA specification document starting with Table 404661Sksewell@umich.edu// A-2 (document available @ http://www.mips.com) 412022SN/A// 422083SN/Adecode OPCODE_HI default Unknown::unknown() { 432686Sksewell@umich.edu //Table A-2 442101SN/A 0x0: decode OPCODE_LO { 452043SN/A 0x0: decode FUNCTION_HI { 462043SN/A 0x0: decode FUNCTION_LO { 472101SN/A 0x1: decode MOVCI { 482101SN/A format BasicOp { 496384Sgblack@eecs.umich.edu 0: movf({{ 506384Sgblack@eecs.umich.edu Rd = (getCondCode(FCSR, CC) == 0) ? Rd : Rs; 516384Sgblack@eecs.umich.edu }}); 526384Sgblack@eecs.umich.edu 1: movt({{ 536384Sgblack@eecs.umich.edu Rd = (getCondCode(FCSR, CC) == 1) ? Rd : Rs; 546384Sgblack@eecs.umich.edu }}); 552101SN/A } 562101SN/A } 572101SN/A 582046SN/A format BasicOp { 592686Sksewell@umich.edu //Table A-3 Note: "Specific encodings of the rd, rs, and 602686Sksewell@umich.edu //rt fields are used to distinguish SLL, SSNOP, and EHB 612686Sksewell@umich.edu //functions 622470SN/A 0x0: decode RS { 632686Sksewell@umich.edu 0x0: decode RT_RD { 644661Sksewell@umich.edu 0x0: decode SA default Nop::nop() { 655222Sksewell@umich.edu 0x1: ssnop({{;}}); 665222Sksewell@umich.edu 0x3: ehb({{;}}); 672686Sksewell@umich.edu } 682686Sksewell@umich.edu default: sll({{ Rd = Rt.uw << SA; }}); 692470SN/A } 702241SN/A } 712101SN/A 722495SN/A 0x2: decode RS_SRL { 732495SN/A 0x0:decode SRL { 742495SN/A 0: srl({{ Rd = Rt.uw >> SA; }}); 752101SN/A 766384Sgblack@eecs.umich.edu //Hardcoded assuming 32-bit ISA, 776384Sgblack@eecs.umich.edu //probably need parameter here 786384Sgblack@eecs.umich.edu 1: rotr({{ 796384Sgblack@eecs.umich.edu Rd = (Rt.uw << (32 - SA)) | (Rt.uw >> SA); 806384Sgblack@eecs.umich.edu }}); 812495SN/A } 822101SN/A } 832101SN/A 842495SN/A 0x3: decode RS { 852495SN/A 0x0: sra({{ 862495SN/A uint32_t temp = Rt >> SA; 872495SN/A if ( (Rt & 0x80000000) > 0 ) { 882495SN/A uint32_t mask = 0x80000000; 892495SN/A for(int i=0; i < SA; i++) { 902495SN/A temp |= mask; 912495SN/A mask = mask >> 1; 922495SN/A } 932495SN/A } 942495SN/A Rd = temp; 952495SN/A }}); 962495SN/A } 972101SN/A 982101SN/A 0x4: sllv({{ Rd = Rt.uw << Rs<4:0>; }}); 992101SN/A 1002101SN/A 0x6: decode SRLV { 1012101SN/A 0: srlv({{ Rd = Rt.uw >> Rs<4:0>; }}); 1022101SN/A 1036384Sgblack@eecs.umich.edu //Hardcoded assuming 32-bit ISA, 1046384Sgblack@eecs.umich.edu //probably need parameter here 1056384Sgblack@eecs.umich.edu 1: rotrv({{ 1066384Sgblack@eecs.umich.edu Rd = (Rt.uw << (32 - Rs<4:0>)) | 1076384Sgblack@eecs.umich.edu (Rt.uw >> Rs<4:0>); 1086384Sgblack@eecs.umich.edu }}); 1092101SN/A } 1102101SN/A 1112495SN/A 0x7: srav({{ 1122495SN/A int shift_amt = Rs<4:0>; 1132495SN/A 1142495SN/A uint32_t temp = Rt >> shift_amt; 1152495SN/A 1166384Sgblack@eecs.umich.edu if ((Rt & 0x80000000) > 0) { 1176384Sgblack@eecs.umich.edu uint32_t mask = 0x80000000; 1186384Sgblack@eecs.umich.edu for (int i = 0; i < shift_amt; i++) { 1196384Sgblack@eecs.umich.edu temp |= mask; 1206384Sgblack@eecs.umich.edu mask = mask >> 1; 1212495SN/A } 1226384Sgblack@eecs.umich.edu } 1232495SN/A Rd = temp; 1242495SN/A }}); 1252043SN/A } 1262043SN/A } 1272025SN/A 1282043SN/A 0x1: decode FUNCTION_LO { 1292686Sksewell@umich.edu //Table A-3 Note: "Specific encodings of the hint field are 1302686Sksewell@umich.edu //used to distinguish JR from JR.HB and JALR from JALR.HB" 1312123SN/A format Jump { 1322101SN/A 0x0: decode HINT { 1336376Sgblack@eecs.umich.edu 0x1: jr_hb({{ 1346376Sgblack@eecs.umich.edu Config1Reg config1 = Config1; 1356376Sgblack@eecs.umich.edu if (config1.ca == 0) { 1367792Sgblack@eecs.umich.edu NNPC = Rs; 1376376Sgblack@eecs.umich.edu } else { 1386376Sgblack@eecs.umich.edu panic("MIPS16e not supported\n"); 1396376Sgblack@eecs.umich.edu } 1406376Sgblack@eecs.umich.edu }}, IsReturn, ClearHazards); 1416376Sgblack@eecs.umich.edu default: jr({{ 1426376Sgblack@eecs.umich.edu Config1Reg config1 = Config1; 1436376Sgblack@eecs.umich.edu if (config1.ca == 0) { 1447792Sgblack@eecs.umich.edu NNPC = Rs; 1456376Sgblack@eecs.umich.edu } else { 1466376Sgblack@eecs.umich.edu panic("MIPS16e not supported\n"); 1476376Sgblack@eecs.umich.edu } 1486376Sgblack@eecs.umich.edu }}, IsReturn); 1492101SN/A } 1502042SN/A 1512101SN/A 0x1: decode HINT { 1527720Sgblack@eecs.umich.edu 0x1: jalr_hb({{ 1537792Sgblack@eecs.umich.edu Rd = NNPC; 1547792Sgblack@eecs.umich.edu NNPC = Rs; 1557720Sgblack@eecs.umich.edu }}, IsCall, ClearHazards); 1567720Sgblack@eecs.umich.edu default: jalr({{ 1577792Sgblack@eecs.umich.edu Rd = NNPC; 1587792Sgblack@eecs.umich.edu NNPC = Rs; 1597720Sgblack@eecs.umich.edu }}, IsCall); 1602101SN/A } 1612101SN/A } 1622042SN/A 1632101SN/A format BasicOp { 1642686Sksewell@umich.edu 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }}); 1652686Sksewell@umich.edu 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }}); 1668564Sgblack@eecs.umich.edu 0x4: decode FULL_SYSTEM { 1678564Sgblack@eecs.umich.edu 0: syscall_se({{ xc->syscall(R2); }}, 1688564Sgblack@eecs.umich.edu IsSerializeAfter, IsNonSpeculative); 1698564Sgblack@eecs.umich.edu default: syscall({{ fault = new SystemCallFault(); }}); 1708564Sgblack@eecs.umich.edu } 1712686Sksewell@umich.edu 0x7: sync({{ ; }}, IsMemBarrier); 1725222Sksewell@umich.edu 0x5: break({{fault = new BreakpointFault();}}); 1732101SN/A } 1742083SN/A 1752043SN/A } 1762025SN/A 1772043SN/A 0x2: decode FUNCTION_LO { 1786384Sgblack@eecs.umich.edu 0x0: HiLoRsSelOp::mfhi({{ Rd = HI_RS_SEL; }}, 1796384Sgblack@eecs.umich.edu IntMultOp, IsIprAccess); 1804661Sksewell@umich.edu 0x1: HiLoRdSelOp::mthi({{ HI_RD_SEL = Rs; }}); 1816384Sgblack@eecs.umich.edu 0x2: HiLoRsSelOp::mflo({{ Rd = LO_RS_SEL; }}, 1826384Sgblack@eecs.umich.edu IntMultOp, IsIprAccess); 1834661Sksewell@umich.edu 0x3: HiLoRdSelOp::mtlo({{ LO_RD_SEL = Rs; }}); 1842083SN/A } 1852025SN/A 1862043SN/A 0x3: decode FUNCTION_LO { 1874661Sksewell@umich.edu format HiLoRdSelValOp { 1885222Sksewell@umich.edu 0x0: mult({{ val = Rs.sd * Rt.sd; }}, IntMultOp); 1895222Sksewell@umich.edu 0x1: multu({{ val = Rs.ud * Rt.ud; }}, IntMultOp); 1904661Sksewell@umich.edu } 1914661Sksewell@umich.edu 1922686Sksewell@umich.edu format HiLoOp { 1936384Sgblack@eecs.umich.edu 0x2: div({{ 1946384Sgblack@eecs.umich.edu if (Rt.sd != 0) { 1956384Sgblack@eecs.umich.edu HI0 = Rs.sd % Rt.sd; 1966384Sgblack@eecs.umich.edu LO0 = Rs.sd / Rt.sd; 1976384Sgblack@eecs.umich.edu } 1985222Sksewell@umich.edu }}, IntDivOp); 1995222Sksewell@umich.edu 2006384Sgblack@eecs.umich.edu 0x3: divu({{ 2016384Sgblack@eecs.umich.edu if (Rt.ud != 0) { 2026384Sgblack@eecs.umich.edu HI0 = Rs.ud % Rt.ud; 2036384Sgblack@eecs.umich.edu LO0 = Rs.ud / Rt.ud; 2046384Sgblack@eecs.umich.edu } 2055222Sksewell@umich.edu }}, IntDivOp); 2062101SN/A } 2072084SN/A } 2082025SN/A 2092495SN/A 0x4: decode HINT { 2102495SN/A 0x0: decode FUNCTION_LO { 2112495SN/A format IntOp { 2126384Sgblack@eecs.umich.edu 0x0: add({{ 2138564Sgblack@eecs.umich.edu IntReg result; 2148564Sgblack@eecs.umich.edu Rd = result = Rs + Rt; 2158564Sgblack@eecs.umich.edu if (FULL_SYSTEM && 2168564Sgblack@eecs.umich.edu findOverflow(32, result, Rs, Rt)) { 2176384Sgblack@eecs.umich.edu fault = new ArithmeticFault(); 2186384Sgblack@eecs.umich.edu } 2196384Sgblack@eecs.umich.edu }}); 2202495SN/A 0x1: addu({{ Rd.sw = Rs.sw + Rt.sw;}}); 2215222Sksewell@umich.edu 0x2: sub({{ 2228564Sgblack@eecs.umich.edu IntReg result; 2238564Sgblack@eecs.umich.edu Rd = result = Rs - Rt; 2248564Sgblack@eecs.umich.edu if (FULL_SYSTEM && 2258564Sgblack@eecs.umich.edu findOverflow(32, result, Rs, ~Rt)) { 2266384Sgblack@eecs.umich.edu fault = new ArithmeticFault(); 2276384Sgblack@eecs.umich.edu } 2286384Sgblack@eecs.umich.edu }}); 2296384Sgblack@eecs.umich.edu 0x3: subu({{ Rd.sw = Rs.sw - Rt.sw; }}); 2306384Sgblack@eecs.umich.edu 0x4: and({{ Rd = Rs & Rt; }}); 2316384Sgblack@eecs.umich.edu 0x5: or({{ Rd = Rs | Rt; }}); 2326384Sgblack@eecs.umich.edu 0x6: xor({{ Rd = Rs ^ Rt; }}); 2336384Sgblack@eecs.umich.edu 0x7: nor({{ Rd = ~(Rs | Rt); }}); 2342495SN/A } 2352101SN/A } 2362043SN/A } 2372025SN/A 2382495SN/A 0x5: decode HINT { 2392495SN/A 0x0: decode FUNCTION_LO { 2402495SN/A format IntOp{ 2416384Sgblack@eecs.umich.edu 0x2: slt({{ Rd.sw = (Rs.sw < Rt.sw) ? 1 : 0 }}); 2426384Sgblack@eecs.umich.edu 0x3: sltu({{ Rd.uw = (Rs.uw < Rt.uw) ? 1 : 0 }}); 2432495SN/A } 2442101SN/A } 2452084SN/A } 2462024SN/A 2472043SN/A 0x6: decode FUNCTION_LO { 2482239SN/A format Trap { 2492239SN/A 0x0: tge({{ cond = (Rs.sw >= Rt.sw); }}); 2502101SN/A 0x1: tgeu({{ cond = (Rs.uw >= Rt.uw); }}); 2512101SN/A 0x2: tlt({{ cond = (Rs.sw < Rt.sw); }}); 2525222Sksewell@umich.edu 0x3: tltu({{ cond = (Rs.uw < Rt.uw); }}); 2532101SN/A 0x4: teq({{ cond = (Rs.sw == Rt.sw); }}); 2542101SN/A 0x6: tne({{ cond = (Rs.sw != Rt.sw); }}); 2552101SN/A } 2562043SN/A } 2572043SN/A } 2582025SN/A 2592043SN/A 0x1: decode REGIMM_HI { 2602043SN/A 0x0: decode REGIMM_LO { 2612101SN/A format Branch { 2622101SN/A 0x0: bltz({{ cond = (Rs.sw < 0); }}); 2632101SN/A 0x1: bgez({{ cond = (Rs.sw >= 0); }}); 2642686Sksewell@umich.edu 0x2: bltzl({{ cond = (Rs.sw < 0); }}, Likely); 2652686Sksewell@umich.edu 0x3: bgezl({{ cond = (Rs.sw >= 0); }}, Likely); 2662101SN/A } 2672043SN/A } 2682025SN/A 2692043SN/A 0x1: decode REGIMM_LO { 2705222Sksewell@umich.edu format TrapImm { 2715222Sksewell@umich.edu 0x0: tgei( {{ cond = (Rs.sw >= (int16_t)INTIMM); }}); 2726384Sgblack@eecs.umich.edu 0x1: tgeiu({{ 2736384Sgblack@eecs.umich.edu cond = (Rs.uw >= (uint32_t)(int32_t)(int16_t)INTIMM); 2746384Sgblack@eecs.umich.edu }}); 2755222Sksewell@umich.edu 0x2: tlti( {{ cond = (Rs.sw < (int16_t)INTIMM); }}); 2766384Sgblack@eecs.umich.edu 0x3: tltiu({{ 2776384Sgblack@eecs.umich.edu cond = (Rs.uw < (uint32_t)(int32_t)(int16_t)INTIMM); 2786384Sgblack@eecs.umich.edu }}); 2796384Sgblack@eecs.umich.edu 0x4: teqi( {{ cond = (Rs.sw == (int16_t)INTIMM); }}); 2806384Sgblack@eecs.umich.edu 0x6: tnei( {{ cond = (Rs.sw != (int16_t)INTIMM); }}); 2812101SN/A } 2822043SN/A } 2832043SN/A 2842043SN/A 0x2: decode REGIMM_LO { 2852101SN/A format Branch { 2862686Sksewell@umich.edu 0x0: bltzal({{ cond = (Rs.sw < 0); }}, Link); 2872686Sksewell@umich.edu 0x1: decode RS { 2882686Sksewell@umich.edu 0x0: bal ({{ cond = 1; }}, IsCall, Link); 2892686Sksewell@umich.edu default: bgezal({{ cond = (Rs.sw >= 0); }}, Link); 2902686Sksewell@umich.edu } 2912686Sksewell@umich.edu 0x2: bltzall({{ cond = (Rs.sw < 0); }}, Link, Likely); 2922686Sksewell@umich.edu 0x3: bgezall({{ cond = (Rs.sw >= 0); }}, Link, Likely); 2932101SN/A } 2942043SN/A } 2952043SN/A 2962043SN/A 0x3: decode REGIMM_LO { 2976384Sgblack@eecs.umich.edu // from Table 5-4 MIPS32 REGIMM Encoding of rt Field 2986384Sgblack@eecs.umich.edu // (DSP ASE MANUAL) 2994661Sksewell@umich.edu 0x4: DspBranch::bposge32({{ cond = (dspctl<5:0> >= 32); }}); 3002101SN/A format WarnUnimpl { 3012101SN/A 0x7: synci(); 3022101SN/A } 3032043SN/A } 3042043SN/A } 3052043SN/A 3062123SN/A format Jump { 3077792Sgblack@eecs.umich.edu 0x2: j({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }}); 3087792Sgblack@eecs.umich.edu 0x3: jal({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }}, 3097792Sgblack@eecs.umich.edu IsCall, Link); 3102043SN/A } 3112043SN/A 3122100SN/A format Branch { 3132686Sksewell@umich.edu 0x4: decode RS_RT { 3142686Sksewell@umich.edu 0x0: b({{ cond = 1; }}); 3152686Sksewell@umich.edu default: beq({{ cond = (Rs.sw == Rt.sw); }}); 3162686Sksewell@umich.edu } 3172239SN/A 0x5: bne({{ cond = (Rs.sw != Rt.sw); }}); 3182686Sksewell@umich.edu 0x6: blez({{ cond = (Rs.sw <= 0); }}); 3192686Sksewell@umich.edu 0x7: bgtz({{ cond = (Rs.sw > 0); }}); 3202043SN/A } 3212084SN/A } 3222024SN/A 3232101SN/A 0x1: decode OPCODE_LO { 3242686Sksewell@umich.edu format IntImmOp { 3255222Sksewell@umich.edu 0x0: addi({{ 3268564Sgblack@eecs.umich.edu IntReg result; 3278564Sgblack@eecs.umich.edu Rt = result = Rs + imm; 3288564Sgblack@eecs.umich.edu if (FULL_SYSTEM && 3298564Sgblack@eecs.umich.edu findOverflow(32, result, Rs, imm)) { 3306384Sgblack@eecs.umich.edu fault = new ArithmeticFault(); 3316384Sgblack@eecs.umich.edu } 3326384Sgblack@eecs.umich.edu }}); 3336384Sgblack@eecs.umich.edu 0x1: addiu({{ Rt.sw = Rs.sw + imm; }}); 3346384Sgblack@eecs.umich.edu 0x2: slti({{ Rt.sw = (Rs.sw < imm) ? 1 : 0 }}); 3357952Sksewell@umich.edu 0x3: sltiu({{ Rt.uw = (Rs.uw < (uint32_t)sextImm) ? 1 : 0;}}); 3366384Sgblack@eecs.umich.edu 0x4: andi({{ Rt.sw = Rs.sw & zextImm; }}); 3376384Sgblack@eecs.umich.edu 0x5: ori({{ Rt.sw = Rs.sw | zextImm; }}); 3386384Sgblack@eecs.umich.edu 0x6: xori({{ Rt.sw = Rs.sw ^ zextImm; }}); 3392495SN/A 3402495SN/A 0x7: decode RS { 3416384Sgblack@eecs.umich.edu 0x0: lui({{ Rt = imm << 16; }}); 3422495SN/A } 3432084SN/A } 3442084SN/A } 3452024SN/A 3462101SN/A 0x2: decode OPCODE_LO { 3472101SN/A //Table A-11 MIPS32 COP0 Encoding of rs Field 3482101SN/A 0x0: decode RS_MSB { 3492101SN/A 0x0: decode RS { 3506384Sgblack@eecs.umich.edu format CP0Control { 3516384Sgblack@eecs.umich.edu 0x0: mfc0({{ 3526384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 3536384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 3546384Sgblack@eecs.umich.edu Rt = CP0_RD_SEL; 3556384Sgblack@eecs.umich.edu /* Hack for PageMask */ 3566384Sgblack@eecs.umich.edu if (RD == 5) { 3576384Sgblack@eecs.umich.edu // PageMask 3586384Sgblack@eecs.umich.edu if (config3.sp == 0 || pageGrain.esp == 0) 3596384Sgblack@eecs.umich.edu Rt &= 0xFFFFE7FF; 3606384Sgblack@eecs.umich.edu } 3616384Sgblack@eecs.umich.edu }}); 3626384Sgblack@eecs.umich.edu 0x4: mtc0({{ 3636384Sgblack@eecs.umich.edu CP0_RD_SEL = Rt; 3646384Sgblack@eecs.umich.edu CauseReg cause = Cause; 3656384Sgblack@eecs.umich.edu IntCtlReg intCtl = IntCtl; 3666384Sgblack@eecs.umich.edu if (RD == 11) { 3676384Sgblack@eecs.umich.edu // Compare 3686384Sgblack@eecs.umich.edu if (cause.ti == 1) { 3696384Sgblack@eecs.umich.edu cause.ti = 0; 3706384Sgblack@eecs.umich.edu int offset = 10; // corresponding to cause.ip0 3716384Sgblack@eecs.umich.edu offset += intCtl.ipti - 2; 3726384Sgblack@eecs.umich.edu replaceBits(cause, offset, offset, 0); 3736384Sgblack@eecs.umich.edu } 3746384Sgblack@eecs.umich.edu } 3756384Sgblack@eecs.umich.edu Cause = cause; 3766384Sgblack@eecs.umich.edu }}); 3776384Sgblack@eecs.umich.edu } 3786384Sgblack@eecs.umich.edu format CP0Unimpl { 3796384Sgblack@eecs.umich.edu 0x1: dmfc0(); 3806384Sgblack@eecs.umich.edu 0x5: dmtc0(); 3816384Sgblack@eecs.umich.edu default: unknown(); 3826384Sgblack@eecs.umich.edu } 3836384Sgblack@eecs.umich.edu format MT_MFTR { 3846384Sgblack@eecs.umich.edu // Decode MIPS MT MFTR instruction into sub-instructions 3854661Sksewell@umich.edu 0x8: decode MT_U { 3866376Sgblack@eecs.umich.edu 0x0: mftc0({{ 3876376Sgblack@eecs.umich.edu data = xc->readRegOtherThread((RT << 3 | SEL) + 3886376Sgblack@eecs.umich.edu Ctrl_Base_DepTag); 3896376Sgblack@eecs.umich.edu }}); 3904661Sksewell@umich.edu 0x1: decode SEL { 3916384Sgblack@eecs.umich.edu 0x0: mftgpr({{ 3926384Sgblack@eecs.umich.edu data = xc->readRegOtherThread(RT); 3936384Sgblack@eecs.umich.edu }}); 3944661Sksewell@umich.edu 0x1: decode RT { 3956383Sgblack@eecs.umich.edu 0x0: mftlo_dsp0({{ data = xc->readRegOtherThread(INTREG_DSP_LO0); }}); 3966383Sgblack@eecs.umich.edu 0x1: mfthi_dsp0({{ data = xc->readRegOtherThread(INTREG_DSP_HI0); }}); 3976383Sgblack@eecs.umich.edu 0x2: mftacx_dsp0({{ data = xc->readRegOtherThread(INTREG_DSP_ACX0); }}); 3986383Sgblack@eecs.umich.edu 0x4: mftlo_dsp1({{ data = xc->readRegOtherThread(INTREG_DSP_LO1); }}); 3996383Sgblack@eecs.umich.edu 0x5: mfthi_dsp1({{ data = xc->readRegOtherThread(INTREG_DSP_HI1); }}); 4006383Sgblack@eecs.umich.edu 0x6: mftacx_dsp1({{ data = xc->readRegOtherThread(INTREG_DSP_ACX1); }}); 4016383Sgblack@eecs.umich.edu 0x8: mftlo_dsp2({{ data = xc->readRegOtherThread(INTREG_DSP_LO2); }}); 4026383Sgblack@eecs.umich.edu 0x9: mfthi_dsp2({{ data = xc->readRegOtherThread(INTREG_DSP_HI2); }}); 4036383Sgblack@eecs.umich.edu 0x10: mftacx_dsp2({{ data = xc->readRegOtherThread(INTREG_DSP_ACX2); }}); 4046383Sgblack@eecs.umich.edu 0x12: mftlo_dsp3({{ data = xc->readRegOtherThread(INTREG_DSP_LO3); }}); 4056383Sgblack@eecs.umich.edu 0x13: mfthi_dsp3({{ data = xc->readRegOtherThread(INTREG_DSP_HI3); }}); 4066383Sgblack@eecs.umich.edu 0x14: mftacx_dsp3({{ data = xc->readRegOtherThread(INTREG_DSP_ACX3); }}); 4076383Sgblack@eecs.umich.edu 0x16: mftdsp({{ data = xc->readRegOtherThread(INTREG_DSP_CONTROL); }}); 4086384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 4092686Sksewell@umich.edu } 4104661Sksewell@umich.edu 0x2: decode MT_H { 4114661Sksewell@umich.edu 0x0: mftc1({{ data = xc->readRegOtherThread(RT + 4124661Sksewell@umich.edu FP_Base_DepTag); 4136384Sgblack@eecs.umich.edu }}); 4144661Sksewell@umich.edu 0x1: mfthc1({{ data = xc->readRegOtherThread(RT + 4154661Sksewell@umich.edu FP_Base_DepTag); 4166384Sgblack@eecs.umich.edu }}); 4176384Sgblack@eecs.umich.edu } 4186384Sgblack@eecs.umich.edu 0x3: cftc1({{ 4196384Sgblack@eecs.umich.edu uint32_t fcsr_val = xc->readRegOtherThread(FLOATREG_FCSR + 4204661Sksewell@umich.edu FP_Base_DepTag); 4216384Sgblack@eecs.umich.edu switch (RT) { 4226384Sgblack@eecs.umich.edu case 0: 4236384Sgblack@eecs.umich.edu data = xc->readRegOtherThread(FLOATREG_FIR + 4246384Sgblack@eecs.umich.edu Ctrl_Base_DepTag); 4256384Sgblack@eecs.umich.edu break; 4266384Sgblack@eecs.umich.edu case 25: 4276384Sgblack@eecs.umich.edu data = (fcsr_val & 0xFE000000 >> 24) | 4286384Sgblack@eecs.umich.edu (fcsr_val & 0x00800000 >> 23); 4296384Sgblack@eecs.umich.edu break; 4306384Sgblack@eecs.umich.edu case 26: 4316384Sgblack@eecs.umich.edu data = fcsr_val & 0x0003F07C; 4326384Sgblack@eecs.umich.edu break; 4336384Sgblack@eecs.umich.edu case 28: 4346384Sgblack@eecs.umich.edu data = (fcsr_val & 0x00000F80) | 4356384Sgblack@eecs.umich.edu (fcsr_val & 0x01000000 >> 21) | 4366384Sgblack@eecs.umich.edu (fcsr_val & 0x00000003); 4376384Sgblack@eecs.umich.edu break; 4386384Sgblack@eecs.umich.edu case 31: 4396384Sgblack@eecs.umich.edu data = fcsr_val; 4406384Sgblack@eecs.umich.edu break; 4416384Sgblack@eecs.umich.edu default: 4426384Sgblack@eecs.umich.edu fatal("FP Control Value (%d) Not Valid"); 4436384Sgblack@eecs.umich.edu } 4446384Sgblack@eecs.umich.edu }}); 4456384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 4462101SN/A } 4476384Sgblack@eecs.umich.edu } 4482686Sksewell@umich.edu } 4492027SN/A 4506384Sgblack@eecs.umich.edu format MT_MTTR { 4516384Sgblack@eecs.umich.edu // Decode MIPS MT MTTR instruction into sub-instructions 4524661Sksewell@umich.edu 0xC: decode MT_U { 4534661Sksewell@umich.edu 0x0: mttc0({{ xc->setRegOtherThread((RD << 3 | SEL) + Ctrl_Base_DepTag, 4544661Sksewell@umich.edu Rt); 4554661Sksewell@umich.edu }}); 4564661Sksewell@umich.edu 0x1: decode SEL { 4574661Sksewell@umich.edu 0x0: mttgpr({{ xc->setRegOtherThread(RD, Rt); }}); 4584661Sksewell@umich.edu 0x1: decode RT { 4596383Sgblack@eecs.umich.edu 0x0: mttlo_dsp0({{ xc->setRegOtherThread(INTREG_DSP_LO0, Rt); 4604661Sksewell@umich.edu }}); 4616383Sgblack@eecs.umich.edu 0x1: mtthi_dsp0({{ xc->setRegOtherThread(INTREG_DSP_HI0, 4624661Sksewell@umich.edu Rt); 4634661Sksewell@umich.edu }}); 4646383Sgblack@eecs.umich.edu 0x2: mttacx_dsp0({{ xc->setRegOtherThread(INTREG_DSP_ACX0, 4654661Sksewell@umich.edu Rt); 4664661Sksewell@umich.edu }}); 4676383Sgblack@eecs.umich.edu 0x4: mttlo_dsp1({{ xc->setRegOtherThread(INTREG_DSP_LO1, 4684661Sksewell@umich.edu Rt); 4694661Sksewell@umich.edu }}); 4706383Sgblack@eecs.umich.edu 0x5: mtthi_dsp1({{ xc->setRegOtherThread(INTREG_DSP_HI1, 4714661Sksewell@umich.edu Rt); 4724661Sksewell@umich.edu }}); 4736383Sgblack@eecs.umich.edu 0x6: mttacx_dsp1({{ xc->setRegOtherThread(INTREG_DSP_ACX1, 4744661Sksewell@umich.edu Rt); 4754661Sksewell@umich.edu }}); 4766383Sgblack@eecs.umich.edu 0x8: mttlo_dsp2({{ xc->setRegOtherThread(INTREG_DSP_LO2, 4774661Sksewell@umich.edu Rt); 4784661Sksewell@umich.edu }}); 4796383Sgblack@eecs.umich.edu 0x9: mtthi_dsp2({{ xc->setRegOtherThread(INTREG_DSP_HI2, 4804661Sksewell@umich.edu Rt); 4814661Sksewell@umich.edu }}); 4826383Sgblack@eecs.umich.edu 0x10: mttacx_dsp2({{ xc->setRegOtherThread(INTREG_DSP_ACX2, 4834661Sksewell@umich.edu Rt); 4844661Sksewell@umich.edu }}); 4856383Sgblack@eecs.umich.edu 0x12: mttlo_dsp3({{ xc->setRegOtherThread(INTREG_DSP_LO3, 4864661Sksewell@umich.edu Rt); 4874661Sksewell@umich.edu }}); 4886383Sgblack@eecs.umich.edu 0x13: mtthi_dsp3({{ xc->setRegOtherThread(INTREG_DSP_HI3, 4894661Sksewell@umich.edu Rt); 4904661Sksewell@umich.edu }}); 4916383Sgblack@eecs.umich.edu 0x14: mttacx_dsp3({{ xc->setRegOtherThread(INTREG_DSP_ACX3, Rt); 4924661Sksewell@umich.edu }}); 4936383Sgblack@eecs.umich.edu 0x16: mttdsp({{ xc->setRegOtherThread(INTREG_DSP_CONTROL, Rt); }}); 4946384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 4955222Sksewell@umich.edu 4964661Sksewell@umich.edu } 4976384Sgblack@eecs.umich.edu 0x2: mttc1({{ 4986384Sgblack@eecs.umich.edu uint64_t data = xc->readRegOtherThread(RD + 4996384Sgblack@eecs.umich.edu FP_Base_DepTag); 5006384Sgblack@eecs.umich.edu data = insertBits(data, top_bit, 5016384Sgblack@eecs.umich.edu bottom_bit, Rt); 5026384Sgblack@eecs.umich.edu xc->setRegOtherThread(RD + FP_Base_DepTag, 5036384Sgblack@eecs.umich.edu data); 5046384Sgblack@eecs.umich.edu }}); 5056384Sgblack@eecs.umich.edu 0x3: cttc1({{ 5066384Sgblack@eecs.umich.edu uint32_t data; 5076384Sgblack@eecs.umich.edu switch (RD) { 5086384Sgblack@eecs.umich.edu case 25: 5096384Sgblack@eecs.umich.edu data = (Rt.uw<7:1> << 25) | // move 31-25 5106384Sgblack@eecs.umich.edu (FCSR & 0x01000000) | // bit 24 5116384Sgblack@eecs.umich.edu (FCSR & 0x004FFFFF); // bit 22-0 5126384Sgblack@eecs.umich.edu break; 5136384Sgblack@eecs.umich.edu case 26: 5146384Sgblack@eecs.umich.edu data = (FCSR & 0xFFFC0000) | // move 31-18 5156384Sgblack@eecs.umich.edu Rt.uw<17:12> << 12 | // bit 17-12 5166384Sgblack@eecs.umich.edu (FCSR & 0x00000F80) << 7 | // bit 11-7 5176384Sgblack@eecs.umich.edu Rt.uw<6:2> << 2 | // bit 6-2 5186384Sgblack@eecs.umich.edu (FCSR & 0x00000002); // bit 1...0 5196384Sgblack@eecs.umich.edu break; 5206384Sgblack@eecs.umich.edu case 28: 5216384Sgblack@eecs.umich.edu data = (FCSR & 0xFE000000) | // move 31-25 5226384Sgblack@eecs.umich.edu Rt.uw<2:2> << 24 | // bit 24 5236384Sgblack@eecs.umich.edu (FCSR & 0x00FFF000) << 23 | // bit 23-12 5246384Sgblack@eecs.umich.edu Rt.uw<11:7> << 7 | // bit 24 5256384Sgblack@eecs.umich.edu (FCSR & 0x000007E) | 5266384Sgblack@eecs.umich.edu Rt.uw<1:0>; // bit 22-0 5276384Sgblack@eecs.umich.edu break; 5286384Sgblack@eecs.umich.edu case 31: 5296384Sgblack@eecs.umich.edu data = Rt.uw; 5306384Sgblack@eecs.umich.edu break; 5316384Sgblack@eecs.umich.edu default: 5326384Sgblack@eecs.umich.edu panic("FP Control Value (%d) " 5336384Sgblack@eecs.umich.edu "Not Available. Ignoring " 5346384Sgblack@eecs.umich.edu "Access to Floating Control " 5356384Sgblack@eecs.umich.edu "Status Register", FS); 5366384Sgblack@eecs.umich.edu } 5376384Sgblack@eecs.umich.edu xc->setRegOtherThread(FLOATREG_FCSR + FP_Base_DepTag, data); 5386384Sgblack@eecs.umich.edu }}); 5396384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 5404661Sksewell@umich.edu } 5414661Sksewell@umich.edu } 5422101SN/A } 5434661Sksewell@umich.edu 0xB: decode RD { 5444661Sksewell@umich.edu format MT_Control { 5454661Sksewell@umich.edu 0x0: decode POS { 5464661Sksewell@umich.edu 0x0: decode SEL { 5474661Sksewell@umich.edu 0x1: decode SC { 5486376Sgblack@eecs.umich.edu 0x0: dvpe({{ 5496376Sgblack@eecs.umich.edu MVPControlReg mvpControl = MVPControl; 5506376Sgblack@eecs.umich.edu VPEConf0Reg vpeConf0 = VPEConf0; 5516376Sgblack@eecs.umich.edu Rt = MVPControl; 5526376Sgblack@eecs.umich.edu if (vpeConf0.mvp == 1) 5536376Sgblack@eecs.umich.edu mvpControl.evp = 0; 5546376Sgblack@eecs.umich.edu MVPControl = mvpControl; 5556376Sgblack@eecs.umich.edu }}); 5566376Sgblack@eecs.umich.edu 0x1: evpe({{ 5576376Sgblack@eecs.umich.edu MVPControlReg mvpControl = MVPControl; 5586376Sgblack@eecs.umich.edu VPEConf0Reg vpeConf0 = VPEConf0; 5596376Sgblack@eecs.umich.edu Rt = MVPControl; 5606376Sgblack@eecs.umich.edu if (vpeConf0.mvp == 1) 5616376Sgblack@eecs.umich.edu mvpControl.evp = 1; 5626376Sgblack@eecs.umich.edu MVPControl = mvpControl; 5636376Sgblack@eecs.umich.edu }}); 5645222Sksewell@umich.edu default:CP0Unimpl::unknown(); 5654661Sksewell@umich.edu } 5666384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 5674661Sksewell@umich.edu } 5686384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 5696384Sgblack@eecs.umich.edu } 5704661Sksewell@umich.edu 0x1: decode POS { 5714661Sksewell@umich.edu 0xF: decode SEL { 5724661Sksewell@umich.edu 0x1: decode SC { 5736376Sgblack@eecs.umich.edu 0x0: dmt({{ 5746376Sgblack@eecs.umich.edu VPEControlReg vpeControl = VPEControl; 5756376Sgblack@eecs.umich.edu Rt = vpeControl; 5766376Sgblack@eecs.umich.edu vpeControl.te = 0; 5776376Sgblack@eecs.umich.edu VPEControl = vpeControl; 5786376Sgblack@eecs.umich.edu }}); 5796376Sgblack@eecs.umich.edu 0x1: emt({{ 5806376Sgblack@eecs.umich.edu VPEControlReg vpeControl = VPEControl; 5816376Sgblack@eecs.umich.edu Rt = vpeControl; 5826376Sgblack@eecs.umich.edu vpeControl.te = 1; 5836376Sgblack@eecs.umich.edu VPEControl = vpeControl; 5846376Sgblack@eecs.umich.edu }}); 5855222Sksewell@umich.edu default:CP0Unimpl::unknown(); 5864661Sksewell@umich.edu } 5876384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 5884661Sksewell@umich.edu } 5895222Sksewell@umich.edu default:CP0Unimpl::unknown(); 5904661Sksewell@umich.edu } 5914661Sksewell@umich.edu } 5924661Sksewell@umich.edu 0xC: decode POS { 5936384Sgblack@eecs.umich.edu 0x0: decode SC { 5946384Sgblack@eecs.umich.edu 0x0: CP0Control::di({{ 5956384Sgblack@eecs.umich.edu StatusReg status = Status; 5966384Sgblack@eecs.umich.edu ConfigReg config = Config; 5976384Sgblack@eecs.umich.edu // Rev 2.0 or beyond? 5986384Sgblack@eecs.umich.edu if (config.ar >= 1) { 5996384Sgblack@eecs.umich.edu Rt = status; 6006384Sgblack@eecs.umich.edu status.ie = 0; 6016384Sgblack@eecs.umich.edu } else { 6026384Sgblack@eecs.umich.edu // Enable this else branch once we 6036384Sgblack@eecs.umich.edu // actually set values for Config on init 6046384Sgblack@eecs.umich.edu fault = new ReservedInstructionFault(); 6056384Sgblack@eecs.umich.edu } 6066384Sgblack@eecs.umich.edu Status = status; 6076384Sgblack@eecs.umich.edu }}); 6086384Sgblack@eecs.umich.edu 0x1: CP0Control::ei({{ 6096384Sgblack@eecs.umich.edu StatusReg status = Status; 6106384Sgblack@eecs.umich.edu ConfigReg config = Config; 6116384Sgblack@eecs.umich.edu if (config.ar >= 1) { 6126384Sgblack@eecs.umich.edu Rt = status; 6136384Sgblack@eecs.umich.edu status.ie = 1; 6146384Sgblack@eecs.umich.edu } else { 6156384Sgblack@eecs.umich.edu fault = new ReservedInstructionFault(); 6166384Sgblack@eecs.umich.edu } 6176384Sgblack@eecs.umich.edu }}); 6186384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 6196384Sgblack@eecs.umich.edu } 6204661Sksewell@umich.edu } 6216384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 6224661Sksewell@umich.edu } 6234661Sksewell@umich.edu format CP0Control { 6244661Sksewell@umich.edu 0xA: rdpgpr({{ 6256376Sgblack@eecs.umich.edu ConfigReg config = Config; 6266376Sgblack@eecs.umich.edu if (config.ar >= 1) { 6276376Sgblack@eecs.umich.edu // Rev 2 of the architecture 6286376Sgblack@eecs.umich.edu panic("Shadow Sets Not Fully Implemented.\n"); 6296376Sgblack@eecs.umich.edu } else { 6304661Sksewell@umich.edu fault = new ReservedInstructionFault(); 6314661Sksewell@umich.edu } 6326376Sgblack@eecs.umich.edu }}); 6334661Sksewell@umich.edu 0xE: wrpgpr({{ 6346376Sgblack@eecs.umich.edu ConfigReg config = Config; 6356376Sgblack@eecs.umich.edu if (config.ar >= 1) { 6366376Sgblack@eecs.umich.edu // Rev 2 of the architecture 6376376Sgblack@eecs.umich.edu panic("Shadow Sets Not Fully Implemented.\n"); 6386376Sgblack@eecs.umich.edu } else { 6396376Sgblack@eecs.umich.edu fault = new ReservedInstructionFault(); 6404661Sksewell@umich.edu } 6416376Sgblack@eecs.umich.edu }}); 6424661Sksewell@umich.edu } 6436384Sgblack@eecs.umich.edu } 6442101SN/A 6452101SN/A //Table A-12 MIPS32 COP0 Encoding of Function Field When rs=CO 6462101SN/A 0x1: decode FUNCTION { 6476384Sgblack@eecs.umich.edu format CP0Control { 6486384Sgblack@eecs.umich.edu 0x18: eret({{ 6496384Sgblack@eecs.umich.edu StatusReg status = Status; 6506384Sgblack@eecs.umich.edu ConfigReg config = Config; 6516384Sgblack@eecs.umich.edu SRSCtlReg srsCtl = SRSCtl; 6526384Sgblack@eecs.umich.edu DPRINTF(MipsPRA,"Restoring PC - %x\n",EPC); 6536384Sgblack@eecs.umich.edu if (status.erl == 1) { 6546384Sgblack@eecs.umich.edu status.erl = 0; 6557792Sgblack@eecs.umich.edu NPC = ErrorEPC; 6566384Sgblack@eecs.umich.edu // Need to adjust NNPC, otherwise things break 6577792Sgblack@eecs.umich.edu NNPC = ErrorEPC + sizeof(MachInst); 6586384Sgblack@eecs.umich.edu } else { 6597792Sgblack@eecs.umich.edu NPC = EPC; 6606384Sgblack@eecs.umich.edu // Need to adjust NNPC, otherwise things break 6617792Sgblack@eecs.umich.edu NNPC = EPC + sizeof(MachInst); 6626384Sgblack@eecs.umich.edu status.exl = 0; 6636384Sgblack@eecs.umich.edu if (config.ar >=1 && 6646384Sgblack@eecs.umich.edu srsCtl.hss > 0 && 6656384Sgblack@eecs.umich.edu status.bev == 0) { 6666384Sgblack@eecs.umich.edu srsCtl.css = srsCtl.pss; 6676384Sgblack@eecs.umich.edu //xc->setShadowSet(srsCtl.pss); 6686384Sgblack@eecs.umich.edu } 6696376Sgblack@eecs.umich.edu } 6706384Sgblack@eecs.umich.edu LLFlag = 0; 6716384Sgblack@eecs.umich.edu Status = status; 6726384Sgblack@eecs.umich.edu SRSCtl = srsCtl; 6736384Sgblack@eecs.umich.edu }}, IsReturn, IsSerializing, IsERET); 6745222Sksewell@umich.edu 6756384Sgblack@eecs.umich.edu 0x1F: deret({{ 6766384Sgblack@eecs.umich.edu DebugReg debug = Debug; 6776384Sgblack@eecs.umich.edu if (debug.dm == 1) { 6786384Sgblack@eecs.umich.edu debug.dm = 1; 6796384Sgblack@eecs.umich.edu debug.iexi = 0; 6807792Sgblack@eecs.umich.edu NPC = DEPC; 6816384Sgblack@eecs.umich.edu } else { 6827792Sgblack@eecs.umich.edu NPC = NPC; 6836384Sgblack@eecs.umich.edu // Undefined; 6846384Sgblack@eecs.umich.edu } 6856384Sgblack@eecs.umich.edu Debug = debug; 6866384Sgblack@eecs.umich.edu }}, IsReturn, IsSerializing, IsERET); 6876384Sgblack@eecs.umich.edu } 6886384Sgblack@eecs.umich.edu format CP0TLB { 6896384Sgblack@eecs.umich.edu 0x01: tlbr({{ 6906384Sgblack@eecs.umich.edu MipsISA::PTE *PTEntry = 6916384Sgblack@eecs.umich.edu xc->tcBase()->getITBPtr()-> 6926384Sgblack@eecs.umich.edu getEntry(Index & 0x7FFFFFFF); 6936384Sgblack@eecs.umich.edu if (PTEntry == NULL) { 6946384Sgblack@eecs.umich.edu fatal("Invalid PTE Entry received on " 6956384Sgblack@eecs.umich.edu "a TLBR instruction\n"); 6966384Sgblack@eecs.umich.edu } 6976384Sgblack@eecs.umich.edu /* Setup PageMask */ 6986384Sgblack@eecs.umich.edu // If 1KB pages are not enabled, a read of PageMask 6996384Sgblack@eecs.umich.edu // must return 0b00 in bits 12, 11 7006384Sgblack@eecs.umich.edu PageMask = (PTEntry->Mask << 11); 7016384Sgblack@eecs.umich.edu /* Setup EntryHi */ 7026384Sgblack@eecs.umich.edu EntryHi = ((PTEntry->VPN << 11) | (PTEntry->asid)); 7036384Sgblack@eecs.umich.edu /* Setup Entry Lo0 */ 7046384Sgblack@eecs.umich.edu EntryLo0 = ((PTEntry->PFN0 << 6) | 7056384Sgblack@eecs.umich.edu (PTEntry->C0 << 3) | 7066384Sgblack@eecs.umich.edu (PTEntry->D0 << 2) | 7076384Sgblack@eecs.umich.edu (PTEntry->V0 << 1) | 7086384Sgblack@eecs.umich.edu PTEntry->G); 7096384Sgblack@eecs.umich.edu /* Setup Entry Lo1 */ 7106384Sgblack@eecs.umich.edu EntryLo1 = ((PTEntry->PFN1 << 6) | 7116384Sgblack@eecs.umich.edu (PTEntry->C1 << 3) | 7126384Sgblack@eecs.umich.edu (PTEntry->D1 << 2) | 7136384Sgblack@eecs.umich.edu (PTEntry->V1 << 1) | 7146384Sgblack@eecs.umich.edu PTEntry->G); 7156384Sgblack@eecs.umich.edu }}); // Need to hook up to TLB 7165222Sksewell@umich.edu 7176384Sgblack@eecs.umich.edu 0x02: tlbwi({{ 7186384Sgblack@eecs.umich.edu //Create PTE 7196384Sgblack@eecs.umich.edu MipsISA::PTE newEntry; 7206384Sgblack@eecs.umich.edu //Write PTE 7216384Sgblack@eecs.umich.edu newEntry.Mask = (Addr)(PageMask >> 11); 7226384Sgblack@eecs.umich.edu newEntry.VPN = (Addr)(EntryHi >> 11); 7236384Sgblack@eecs.umich.edu /* PageGrain _ ESP Config3 _ SP */ 7246384Sgblack@eecs.umich.edu if (bits(PageGrain, 28) == 0 || bits(Config3, 4) ==0) { 7256384Sgblack@eecs.umich.edu // If 1KB pages are *NOT* enabled, lowest bits of 7266384Sgblack@eecs.umich.edu // the mask are 0b11 for TLB writes 7276384Sgblack@eecs.umich.edu newEntry.Mask |= 0x3; 7286384Sgblack@eecs.umich.edu // Reset bits 0 and 1 if 1KB pages are not enabled 7296384Sgblack@eecs.umich.edu newEntry.VPN &= 0xFFFFFFFC; 7306384Sgblack@eecs.umich.edu } 7316384Sgblack@eecs.umich.edu newEntry.asid = (uint8_t)(EntryHi & 0xFF); 7325222Sksewell@umich.edu 7336384Sgblack@eecs.umich.edu newEntry.PFN0 = (Addr)(EntryLo0 >> 6); 7346384Sgblack@eecs.umich.edu newEntry.PFN1 = (Addr)(EntryLo1 >> 6); 7356384Sgblack@eecs.umich.edu newEntry.D0 = (bool)((EntryLo0 >> 2) & 1); 7366384Sgblack@eecs.umich.edu newEntry.D1 = (bool)((EntryLo1 >> 2) & 1); 7376384Sgblack@eecs.umich.edu newEntry.V1 = (bool)((EntryLo1 >> 1) & 1); 7386384Sgblack@eecs.umich.edu newEntry.V0 = (bool)((EntryLo0 >> 1) & 1); 7396384Sgblack@eecs.umich.edu newEntry.G = (bool)((EntryLo0 & EntryLo1) & 1); 7406384Sgblack@eecs.umich.edu newEntry.C0 = (uint8_t)((EntryLo0 >> 3) & 0x7); 7416384Sgblack@eecs.umich.edu newEntry.C1 = (uint8_t)((EntryLo1 >> 3) & 0x7); 7426384Sgblack@eecs.umich.edu /* Now, compute the AddrShiftAmount and OffsetMask - 7436384Sgblack@eecs.umich.edu TLB optimizations */ 7446384Sgblack@eecs.umich.edu /* Addr Shift Amount for 1KB or larger pages */ 7456384Sgblack@eecs.umich.edu if ((newEntry.Mask & 0xFFFF) == 3) { 7466384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 12; 7476384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFF) == 0x0000) { 7486384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 10; 7496384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFC) == 0x000C) { 7506384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 14; 7516384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFF0) == 0x0030) { 7526384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 16; 7536384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFC0) == 0x00C0) { 7546384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 18; 7556384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFF00) == 0x0300) { 7566384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 20; 7576384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFC00) == 0x0C00) { 7586384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 22; 7596384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xF000) == 0x3000) { 7606384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 24; 7616384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xC000) == 0xC000) { 7626384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 26; 7636384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0x30000) == 0x30000) { 7646384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 28; 7656384Sgblack@eecs.umich.edu } else { 7666384Sgblack@eecs.umich.edu fatal("Invalid Mask Pattern Detected!\n"); 7676384Sgblack@eecs.umich.edu } 7686384Sgblack@eecs.umich.edu newEntry.OffsetMask = 7696384Sgblack@eecs.umich.edu (1 << newEntry.AddrShiftAmount) - 1; 7705222Sksewell@umich.edu 7716384Sgblack@eecs.umich.edu MipsISA::TLB *Ptr = xc->tcBase()->getITBPtr(); 7726384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 7736384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 7746384Sgblack@eecs.umich.edu int SP = 0; 7756384Sgblack@eecs.umich.edu if (bits(config3, config3.sp) == 1 && 7766384Sgblack@eecs.umich.edu bits(pageGrain, pageGrain.esp) == 1) { 7776384Sgblack@eecs.umich.edu SP = 1; 7786384Sgblack@eecs.umich.edu } 7796384Sgblack@eecs.umich.edu IndexReg index = Index; 7806384Sgblack@eecs.umich.edu Ptr->insertAt(newEntry, Index & 0x7FFFFFFF, SP); 7816384Sgblack@eecs.umich.edu }}); 7826384Sgblack@eecs.umich.edu 0x06: tlbwr({{ 7836384Sgblack@eecs.umich.edu //Create PTE 7846384Sgblack@eecs.umich.edu MipsISA::PTE newEntry; 7856384Sgblack@eecs.umich.edu //Write PTE 7866384Sgblack@eecs.umich.edu newEntry.Mask = (Addr)(PageMask >> 11); 7876384Sgblack@eecs.umich.edu newEntry.VPN = (Addr)(EntryHi >> 11); 7886384Sgblack@eecs.umich.edu /* PageGrain _ ESP Config3 _ SP */ 7896384Sgblack@eecs.umich.edu if (bits(PageGrain, 28) == 0 || 7906384Sgblack@eecs.umich.edu bits(Config3, 4) == 0) { 7916384Sgblack@eecs.umich.edu // If 1KB pages are *NOT* enabled, lowest bits of 7926384Sgblack@eecs.umich.edu // the mask are 0b11 for TLB writes 7936384Sgblack@eecs.umich.edu newEntry.Mask |= 0x3; 7946384Sgblack@eecs.umich.edu // Reset bits 0 and 1 if 1KB pages are not enabled 7956384Sgblack@eecs.umich.edu newEntry.VPN &= 0xFFFFFFFC; 7966384Sgblack@eecs.umich.edu } 7976384Sgblack@eecs.umich.edu newEntry.asid = (uint8_t)(EntryHi & 0xFF); 7985222Sksewell@umich.edu 7996384Sgblack@eecs.umich.edu newEntry.PFN0 = (Addr)(EntryLo0 >> 6); 8006384Sgblack@eecs.umich.edu newEntry.PFN1 = (Addr)(EntryLo1 >> 6); 8016384Sgblack@eecs.umich.edu newEntry.D0 = (bool)((EntryLo0 >> 2) & 1); 8026384Sgblack@eecs.umich.edu newEntry.D1 = (bool)((EntryLo1 >> 2) & 1); 8036384Sgblack@eecs.umich.edu newEntry.V1 = (bool)((EntryLo1 >> 1) & 1); 8046384Sgblack@eecs.umich.edu newEntry.V0 = (bool)((EntryLo0 >> 1) & 1); 8056384Sgblack@eecs.umich.edu newEntry.G = (bool)((EntryLo0 & EntryLo1) & 1); 8066384Sgblack@eecs.umich.edu newEntry.C0 = (uint8_t)((EntryLo0 >> 3) & 0x7); 8076384Sgblack@eecs.umich.edu newEntry.C1 = (uint8_t)((EntryLo1 >> 3) & 0x7); 8086384Sgblack@eecs.umich.edu /* Now, compute the AddrShiftAmount and OffsetMask - 8096384Sgblack@eecs.umich.edu TLB optimizations */ 8106384Sgblack@eecs.umich.edu /* Addr Shift Amount for 1KB or larger pages */ 8116384Sgblack@eecs.umich.edu if ((newEntry.Mask & 0xFFFF) == 3){ 8126384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 12; 8136384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFF) == 0x0000) { 8146384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 10; 8156384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFC) == 0x000C) { 8166384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 14; 8176384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFF0) == 0x0030) { 8186384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 16; 8196384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFC0) == 0x00C0) { 8206384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 18; 8216384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFF00) == 0x0300) { 8226384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 20; 8236384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFC00) == 0x0C00) { 8246384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 22; 8256384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xF000) == 0x3000) { 8266384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 24; 8276384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xC000) == 0xC000) { 8286384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 26; 8296384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0x30000) == 0x30000) { 8306384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 28; 8316384Sgblack@eecs.umich.edu } else { 8326384Sgblack@eecs.umich.edu fatal("Invalid Mask Pattern Detected!\n"); 8336384Sgblack@eecs.umich.edu } 8346384Sgblack@eecs.umich.edu newEntry.OffsetMask = 8356384Sgblack@eecs.umich.edu (1 << newEntry.AddrShiftAmount) - 1; 8365222Sksewell@umich.edu 8376384Sgblack@eecs.umich.edu MipsISA::TLB *Ptr = xc->tcBase()->getITBPtr(); 8386384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 8396384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 8406384Sgblack@eecs.umich.edu int SP = 0; 8416384Sgblack@eecs.umich.edu if (bits(config3, config3.sp) == 1 && 8426384Sgblack@eecs.umich.edu bits(pageGrain, pageGrain.esp) == 1) { 8436384Sgblack@eecs.umich.edu SP = 1; 8446384Sgblack@eecs.umich.edu } 8456384Sgblack@eecs.umich.edu IndexReg index = Index; 8466384Sgblack@eecs.umich.edu Ptr->insertAt(newEntry, Random, SP); 8476384Sgblack@eecs.umich.edu }}); 8482101SN/A 8496384Sgblack@eecs.umich.edu 0x08: tlbp({{ 8506384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 8516384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 8526384Sgblack@eecs.umich.edu EntryHiReg entryHi = EntryHi; 8536384Sgblack@eecs.umich.edu int tlbIndex; 8546384Sgblack@eecs.umich.edu Addr vpn; 8556384Sgblack@eecs.umich.edu if (pageGrain.esp == 1 && config3.sp ==1) { 8566384Sgblack@eecs.umich.edu vpn = EntryHi >> 11; 8576384Sgblack@eecs.umich.edu } else { 8586384Sgblack@eecs.umich.edu // Mask off lower 2 bits 8596384Sgblack@eecs.umich.edu vpn = ((EntryHi >> 11) & 0xFFFFFFFC); 8606384Sgblack@eecs.umich.edu } 8616384Sgblack@eecs.umich.edu tlbIndex = xc->tcBase()->getITBPtr()-> 8626385Sgblack@eecs.umich.edu probeEntry(vpn, entryHi.asid); 8636384Sgblack@eecs.umich.edu // Check TLB for entry matching EntryHi 8646384Sgblack@eecs.umich.edu if (tlbIndex != -1) { 8656384Sgblack@eecs.umich.edu Index = tlbIndex; 8666384Sgblack@eecs.umich.edu } else { 8676384Sgblack@eecs.umich.edu // else, set Index = 1 << 31 8686384Sgblack@eecs.umich.edu Index = (1 << 31); 8696384Sgblack@eecs.umich.edu } 8706384Sgblack@eecs.umich.edu }}); 8716384Sgblack@eecs.umich.edu } 8726384Sgblack@eecs.umich.edu format CP0Unimpl { 8736384Sgblack@eecs.umich.edu 0x20: wait(); 8746384Sgblack@eecs.umich.edu } 8756384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 8762101SN/A } 8772043SN/A } 8782027SN/A 8792101SN/A //Table A-13 MIPS32 COP1 Encoding of rs Field 8802101SN/A 0x1: decode RS_MSB { 8812101SN/A 0x0: decode RS_HI { 8822101SN/A 0x0: decode RS_LO { 8832686Sksewell@umich.edu format CP1Control { 8842742Sksewell@umich.edu 0x0: mfc1 ({{ Rt.uw = Fs.uw; }}); 8852495SN/A 8862495SN/A 0x2: cfc1({{ 8876384Sgblack@eecs.umich.edu switch (FS) { 8882573SN/A case 0: 8892616SN/A Rt = FIR; 8902573SN/A break; 8912573SN/A case 25: 8926384Sgblack@eecs.umich.edu Rt = (FCSR & 0xFE000000) >> 24 | 8936384Sgblack@eecs.umich.edu (FCSR & 0x00800000) >> 23; 8942573SN/A break; 8952573SN/A case 26: 8966384Sgblack@eecs.umich.edu Rt = (FCSR & 0x0003F07C); 8972573SN/A break; 8982573SN/A case 28: 8996384Sgblack@eecs.umich.edu Rt = (FCSR & 0x00000F80) | 9006384Sgblack@eecs.umich.edu (FCSR & 0x01000000) >> 21 | 9016384Sgblack@eecs.umich.edu (FCSR & 0x00000003); 9022573SN/A break; 9032573SN/A case 31: 9042616SN/A Rt = FCSR; 9052573SN/A break; 9062573SN/A default: 9075222Sksewell@umich.edu warn("FP Control Value (%d) Not Valid"); 9082573SN/A } 9092573SN/A }}); 9102573SN/A 9116384Sgblack@eecs.umich.edu 0x3: mfhc1({{ Rt.uw = Fs.ud<63:32>; }}); 9122686Sksewell@umich.edu 9136384Sgblack@eecs.umich.edu 0x4: mtc1({{ Fs.uw = Rt.uw; }}); 9142686Sksewell@umich.edu 9152573SN/A 0x6: ctc1({{ 9166384Sgblack@eecs.umich.edu switch (FS) { 9172573SN/A case 25: 9186384Sgblack@eecs.umich.edu FCSR = (Rt.uw<7:1> << 25) | // move 31-25 9196384Sgblack@eecs.umich.edu (FCSR & 0x01000000) | // bit 24 9206384Sgblack@eecs.umich.edu (FCSR & 0x004FFFFF); // bit 22-0 9212573SN/A break; 9222573SN/A case 26: 9236384Sgblack@eecs.umich.edu FCSR = (FCSR & 0xFFFC0000) | // move 31-18 9246384Sgblack@eecs.umich.edu Rt.uw<17:12> << 12 | // bit 17-12 9256384Sgblack@eecs.umich.edu (FCSR & 0x00000F80) << 7 | // bit 11-7 9266384Sgblack@eecs.umich.edu Rt.uw<6:2> << 2 | // bit 6-2 9276384Sgblack@eecs.umich.edu (FCSR & 0x00000002); // bit 1-0 9282573SN/A break; 9292573SN/A case 28: 9306384Sgblack@eecs.umich.edu FCSR = (FCSR & 0xFE000000) | // move 31-25 9316384Sgblack@eecs.umich.edu Rt.uw<2:2> << 24 | // bit 24 9326384Sgblack@eecs.umich.edu (FCSR & 0x00FFF000) << 23 | // bit 23-12 9336384Sgblack@eecs.umich.edu Rt.uw<11:7> << 7 | // bit 24 9346384Sgblack@eecs.umich.edu (FCSR & 0x000007E) | 9356384Sgblack@eecs.umich.edu Rt.uw<1:0>; // bit 22-0 9362573SN/A break; 9372573SN/A case 31: 9386384Sgblack@eecs.umich.edu FCSR = Rt.uw; 9392573SN/A break; 9402573SN/A 9412573SN/A default: 9426384Sgblack@eecs.umich.edu panic("FP Control Value (%d) " 9436384Sgblack@eecs.umich.edu "Not Available. Ignoring Access " 9446384Sgblack@eecs.umich.edu "to Floating Control Status " 9456384Sgblack@eecs.umich.edu "Register", FS); 9462495SN/A } 9472495SN/A }}); 9482686Sksewell@umich.edu 9492686Sksewell@umich.edu 0x7: mthc1({{ 9502686Sksewell@umich.edu uint64_t fs_hi = Rt.uw; 9512686Sksewell@umich.edu uint64_t fs_lo = Fs.ud & 0x0FFFFFFFF; 9522686Sksewell@umich.edu Fs.ud = (fs_hi << 32) | fs_lo; 9532686Sksewell@umich.edu }}); 9542686Sksewell@umich.edu 9552101SN/A } 9565222Sksewell@umich.edu format CP1Unimpl { 9575222Sksewell@umich.edu 0x1: dmfc1(); 9585222Sksewell@umich.edu 0x5: dmtc1(); 9595222Sksewell@umich.edu } 9606384Sgblack@eecs.umich.edu } 9612025SN/A 9626384Sgblack@eecs.umich.edu 0x1: decode RS_LO { 9636384Sgblack@eecs.umich.edu 0x0: decode ND { 9646384Sgblack@eecs.umich.edu format Branch { 9656384Sgblack@eecs.umich.edu 0x0: decode TF { 9666384Sgblack@eecs.umich.edu 0x0: bc1f({{ 9676384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 0; 9686384Sgblack@eecs.umich.edu }}); 9696384Sgblack@eecs.umich.edu 0x1: bc1t({{ 9706384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 1; 9716384Sgblack@eecs.umich.edu }}); 9726384Sgblack@eecs.umich.edu } 9736384Sgblack@eecs.umich.edu 0x1: decode TF { 9746384Sgblack@eecs.umich.edu 0x0: bc1fl({{ 9756384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 0; 9766384Sgblack@eecs.umich.edu }}, Likely); 9776384Sgblack@eecs.umich.edu 0x1: bc1tl({{ 9786384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 1; 9796384Sgblack@eecs.umich.edu }}, Likely); 9806384Sgblack@eecs.umich.edu } 9816384Sgblack@eecs.umich.edu } 9826384Sgblack@eecs.umich.edu } 9836384Sgblack@eecs.umich.edu format CP1Unimpl { 9846384Sgblack@eecs.umich.edu 0x1: bc1any2(); 9856384Sgblack@eecs.umich.edu 0x2: bc1any4(); 9866384Sgblack@eecs.umich.edu default: unknown(); 9876384Sgblack@eecs.umich.edu } 9886384Sgblack@eecs.umich.edu } 9892043SN/A } 9902027SN/A 9912101SN/A 0x1: decode RS_HI { 9922101SN/A 0x2: decode RS_LO { 9936384Sgblack@eecs.umich.edu //Table A-14 MIPS32 COP1 Encoding of Function Field When 9946384Sgblack@eecs.umich.edu //rs=S (( single-precision floating point)) 9952572SN/A 0x0: decode FUNCTION_HI { 9962572SN/A 0x0: decode FUNCTION_LO { 9972101SN/A format FloatOp { 9986384Sgblack@eecs.umich.edu 0x0: add_s({{ Fd.sf = Fs.sf + Ft.sf; }}); 9996384Sgblack@eecs.umich.edu 0x1: sub_s({{ Fd.sf = Fs.sf - Ft.sf; }}); 10006384Sgblack@eecs.umich.edu 0x2: mul_s({{ Fd.sf = Fs.sf * Ft.sf; }}); 10016384Sgblack@eecs.umich.edu 0x3: div_s({{ Fd.sf = Fs.sf / Ft.sf; }}); 10026384Sgblack@eecs.umich.edu 0x4: sqrt_s({{ Fd.sf = sqrt(Fs.sf); }}); 10036384Sgblack@eecs.umich.edu 0x5: abs_s({{ Fd.sf = fabs(Fs.sf); }}); 10046384Sgblack@eecs.umich.edu 0x7: neg_s({{ Fd.sf = -Fs.sf; }}); 10052101SN/A } 10066384Sgblack@eecs.umich.edu 0x6: BasicOp::mov_s({{ Fd.sf = Fs.sf; }}); 10072101SN/A } 10082572SN/A 0x1: decode FUNCTION_LO { 10092686Sksewell@umich.edu format FloatConvertOp { 10106384Sgblack@eecs.umich.edu 0x0: round_l_s({{ val = Fs.sf; }}, 10116384Sgblack@eecs.umich.edu ToLong, Round); 10126384Sgblack@eecs.umich.edu 0x1: trunc_l_s({{ val = Fs.sf; }}, 10136384Sgblack@eecs.umich.edu ToLong, Trunc); 10146384Sgblack@eecs.umich.edu 0x2: ceil_l_s({{ val = Fs.sf;}}, 10156384Sgblack@eecs.umich.edu ToLong, Ceil); 10166384Sgblack@eecs.umich.edu 0x3: floor_l_s({{ val = Fs.sf; }}, 10176384Sgblack@eecs.umich.edu ToLong, Floor); 10186384Sgblack@eecs.umich.edu 0x4: round_w_s({{ val = Fs.sf; }}, 10196384Sgblack@eecs.umich.edu ToWord, Round); 10206384Sgblack@eecs.umich.edu 0x5: trunc_w_s({{ val = Fs.sf; }}, 10216384Sgblack@eecs.umich.edu ToWord, Trunc); 10226384Sgblack@eecs.umich.edu 0x6: ceil_w_s({{ val = Fs.sf; }}, 10236384Sgblack@eecs.umich.edu ToWord, Ceil); 10246384Sgblack@eecs.umich.edu 0x7: floor_w_s({{ val = Fs.sf; }}, 10256384Sgblack@eecs.umich.edu ToWord, Floor); 10262101SN/A } 10272101SN/A } 10282027SN/A 10292572SN/A 0x2: decode FUNCTION_LO { 10302101SN/A 0x1: decode MOVCF { 10312686Sksewell@umich.edu format BasicOp { 10326384Sgblack@eecs.umich.edu 0x0: movf_s({{ 10336384Sgblack@eecs.umich.edu Fd = (getCondCode(FCSR,CC) == 0) ? 10346384Sgblack@eecs.umich.edu Fs : Fd; 10356384Sgblack@eecs.umich.edu }}); 10366384Sgblack@eecs.umich.edu 0x1: movt_s({{ 10376384Sgblack@eecs.umich.edu Fd = (getCondCode(FCSR,CC) == 1) ? 10386384Sgblack@eecs.umich.edu Fs : Fd; 10396384Sgblack@eecs.umich.edu }}); 10402101SN/A } 10412101SN/A } 10422027SN/A 10432686Sksewell@umich.edu format BasicOp { 10442686Sksewell@umich.edu 0x2: movz_s({{ Fd = (Rt == 0) ? Fs : Fd; }}); 10452686Sksewell@umich.edu 0x3: movn_s({{ Fd = (Rt != 0) ? Fs : Fd; }}); 10462686Sksewell@umich.edu } 10472686Sksewell@umich.edu 10482602SN/A format FloatOp { 10492602SN/A 0x5: recip_s({{ Fd = 1 / Fs; }}); 10506384Sgblack@eecs.umich.edu 0x6: rsqrt_s({{ Fd = 1 / sqrt(Fs); }}); 10512101SN/A } 10525222Sksewell@umich.edu format CP1Unimpl { 10536384Sgblack@eecs.umich.edu default: unknown(); 10545222Sksewell@umich.edu } 10552101SN/A } 10565222Sksewell@umich.edu 0x3: CP1Unimpl::unknown(); 10572027SN/A 10582572SN/A 0x4: decode FUNCTION_LO { 10592603SN/A format FloatConvertOp { 10602686Sksewell@umich.edu 0x1: cvt_d_s({{ val = Fs.sf; }}, ToDouble); 10612686Sksewell@umich.edu 0x4: cvt_w_s({{ val = Fs.sf; }}, ToWord); 10622686Sksewell@umich.edu 0x5: cvt_l_s({{ val = Fs.sf; }}, ToLong); 10632101SN/A } 10642055SN/A 10652686Sksewell@umich.edu 0x6: FloatOp::cvt_ps_s({{ 10666384Sgblack@eecs.umich.edu Fd.ud = (uint64_t) Fs.uw << 32 | 10676384Sgblack@eecs.umich.edu (uint64_t) Ft.uw; 10686384Sgblack@eecs.umich.edu }}); 10695222Sksewell@umich.edu format CP1Unimpl { 10706384Sgblack@eecs.umich.edu default: unknown(); 10715222Sksewell@umich.edu } 10722101SN/A } 10735222Sksewell@umich.edu 0x5: CP1Unimpl::unknown(); 10742602SN/A 10752602SN/A 0x6: decode FUNCTION_LO { 10762603SN/A format FloatCompareOp { 10776384Sgblack@eecs.umich.edu 0x0: c_f_s({{ cond = 0; }}, 10786384Sgblack@eecs.umich.edu SinglePrecision, UnorderedFalse); 10796384Sgblack@eecs.umich.edu 0x1: c_un_s({{ cond = 0; }}, 10806384Sgblack@eecs.umich.edu SinglePrecision, UnorderedTrue); 10812686Sksewell@umich.edu 0x2: c_eq_s({{ cond = (Fs.sf == Ft.sf); }}, 10822686Sksewell@umich.edu UnorderedFalse); 10832686Sksewell@umich.edu 0x3: c_ueq_s({{ cond = (Fs.sf == Ft.sf); }}, 10842686Sksewell@umich.edu UnorderedTrue); 10857799Sgblack@eecs.umich.edu 0x4: c_olt_s({{ cond = (Fs.sf < Ft.sf); }}, 10862686Sksewell@umich.edu UnorderedFalse); 10872686Sksewell@umich.edu 0x5: c_ult_s({{ cond = (Fs.sf < Ft.sf); }}, 10882686Sksewell@umich.edu UnorderedTrue); 10892686Sksewell@umich.edu 0x6: c_ole_s({{ cond = (Fs.sf <= Ft.sf); }}, 10902686Sksewell@umich.edu UnorderedFalse); 10912686Sksewell@umich.edu 0x7: c_ule_s({{ cond = (Fs.sf <= Ft.sf); }}, 10922686Sksewell@umich.edu UnorderedTrue); 10932602SN/A } 10942602SN/A } 10952602SN/A 10962602SN/A 0x7: decode FUNCTION_LO { 10972686Sksewell@umich.edu format FloatCompareOp { 10982686Sksewell@umich.edu 0x0: c_sf_s({{ cond = 0; }}, SinglePrecision, 10992686Sksewell@umich.edu UnorderedFalse, QnanException); 11002686Sksewell@umich.edu 0x1: c_ngle_s({{ cond = 0; }}, SinglePrecision, 11012686Sksewell@umich.edu UnorderedTrue, QnanException); 11026384Sgblack@eecs.umich.edu 0x2: c_seq_s({{ cond = (Fs.sf == Ft.sf); }}, 11032686Sksewell@umich.edu UnorderedFalse, QnanException); 11042686Sksewell@umich.edu 0x3: c_ngl_s({{ cond = (Fs.sf == Ft.sf); }}, 11052686Sksewell@umich.edu UnorderedTrue, QnanException); 11062686Sksewell@umich.edu 0x4: c_lt_s({{ cond = (Fs.sf < Ft.sf); }}, 11072686Sksewell@umich.edu UnorderedFalse, QnanException); 11082686Sksewell@umich.edu 0x5: c_nge_s({{ cond = (Fs.sf < Ft.sf); }}, 11092686Sksewell@umich.edu UnorderedTrue, QnanException); 11102686Sksewell@umich.edu 0x6: c_le_s({{ cond = (Fs.sf <= Ft.sf); }}, 11112686Sksewell@umich.edu UnorderedFalse, QnanException); 11122686Sksewell@umich.edu 0x7: c_ngt_s({{ cond = (Fs.sf <= Ft.sf); }}, 11132686Sksewell@umich.edu UnorderedTrue, QnanException); 11142602SN/A } 11152602SN/A } 11162101SN/A } 11172055SN/A 11186384Sgblack@eecs.umich.edu //Table A-15 MIPS32 COP1 Encoding of Function Field When 11196384Sgblack@eecs.umich.edu //rs=D 11202572SN/A 0x1: decode FUNCTION_HI { 11212572SN/A 0x0: decode FUNCTION_LO { 11222101SN/A format FloatOp { 11232686Sksewell@umich.edu 0x0: add_d({{ Fd.df = Fs.df + Ft.df; }}); 11242686Sksewell@umich.edu 0x1: sub_d({{ Fd.df = Fs.df - Ft.df; }}); 11252686Sksewell@umich.edu 0x2: mul_d({{ Fd.df = Fs.df * Ft.df; }}); 11262686Sksewell@umich.edu 0x3: div_d({{ Fd.df = Fs.df / Ft.df; }}); 11276384Sgblack@eecs.umich.edu 0x4: sqrt_d({{ Fd.df = sqrt(Fs.df); }}); 11286384Sgblack@eecs.umich.edu 0x5: abs_d({{ Fd.df = fabs(Fs.df); }}); 11296384Sgblack@eecs.umich.edu 0x7: neg_d({{ Fd.df = -1 * Fs.df; }}); 11302101SN/A } 11316384Sgblack@eecs.umich.edu 0x6: BasicOp::mov_d({{ Fd.df = Fs.df; }}); 11322101SN/A } 11332027SN/A 11342572SN/A 0x1: decode FUNCTION_LO { 11352686Sksewell@umich.edu format FloatConvertOp { 11366384Sgblack@eecs.umich.edu 0x0: round_l_d({{ val = Fs.df; }}, 11376384Sgblack@eecs.umich.edu ToLong, Round); 11386384Sgblack@eecs.umich.edu 0x1: trunc_l_d({{ val = Fs.df; }}, 11396384Sgblack@eecs.umich.edu ToLong, Trunc); 11406384Sgblack@eecs.umich.edu 0x2: ceil_l_d({{ val = Fs.df; }}, 11416384Sgblack@eecs.umich.edu ToLong, Ceil); 11426384Sgblack@eecs.umich.edu 0x3: floor_l_d({{ val = Fs.df; }}, 11436384Sgblack@eecs.umich.edu ToLong, Floor); 11446384Sgblack@eecs.umich.edu 0x4: round_w_d({{ val = Fs.df; }}, 11456384Sgblack@eecs.umich.edu ToWord, Round); 11466384Sgblack@eecs.umich.edu 0x5: trunc_w_d({{ val = Fs.df; }}, 11476384Sgblack@eecs.umich.edu ToWord, Trunc); 11486384Sgblack@eecs.umich.edu 0x6: ceil_w_d({{ val = Fs.df; }}, 11496384Sgblack@eecs.umich.edu ToWord, Ceil); 11506384Sgblack@eecs.umich.edu 0x7: floor_w_d({{ val = Fs.df; }}, 11516384Sgblack@eecs.umich.edu ToWord, Floor); 11522101SN/A } 11532101SN/A } 11542027SN/A 11552572SN/A 0x2: decode FUNCTION_LO { 11562101SN/A 0x1: decode MOVCF { 11572686Sksewell@umich.edu format BasicOp { 11586384Sgblack@eecs.umich.edu 0x0: movf_d({{ 11596384Sgblack@eecs.umich.edu Fd.df = (getCondCode(FCSR,CC) == 0) ? 11602686Sksewell@umich.edu Fs.df : Fd.df; 11616384Sgblack@eecs.umich.edu }}); 11626384Sgblack@eecs.umich.edu 0x1: movt_d({{ 11636384Sgblack@eecs.umich.edu Fd.df = (getCondCode(FCSR,CC) == 1) ? 11642686Sksewell@umich.edu Fs.df : Fd.df; 11656384Sgblack@eecs.umich.edu }}); 11662101SN/A } 11672101SN/A } 11682027SN/A 11692101SN/A format BasicOp { 11706384Sgblack@eecs.umich.edu 0x2: movz_d({{ 11716384Sgblack@eecs.umich.edu Fd.df = (Rt == 0) ? Fs.df : Fd.df; 11726384Sgblack@eecs.umich.edu }}); 11736384Sgblack@eecs.umich.edu 0x3: movn_d({{ 11746384Sgblack@eecs.umich.edu Fd.df = (Rt != 0) ? Fs.df : Fd.df; 11756384Sgblack@eecs.umich.edu }}); 11762101SN/A } 11772027SN/A 11782605SN/A format FloatOp { 11796384Sgblack@eecs.umich.edu 0x5: recip_d({{ Fd.df = 1 / Fs.df; }}); 11806384Sgblack@eecs.umich.edu 0x6: rsqrt_d({{ Fd.df = 1 / sqrt(Fs.df); }}); 11812101SN/A } 11825222Sksewell@umich.edu format CP1Unimpl { 11836384Sgblack@eecs.umich.edu default: unknown(); 11845222Sksewell@umich.edu } 11855222Sksewell@umich.edu 11862101SN/A } 11872572SN/A 0x4: decode FUNCTION_LO { 11882686Sksewell@umich.edu format FloatConvertOp { 11892686Sksewell@umich.edu 0x0: cvt_s_d({{ val = Fs.df; }}, ToSingle); 11902686Sksewell@umich.edu 0x4: cvt_w_d({{ val = Fs.df; }}, ToWord); 11912686Sksewell@umich.edu 0x5: cvt_l_d({{ val = Fs.df; }}, ToLong); 11922101SN/A } 11936384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 11942101SN/A } 11952602SN/A 11962602SN/A 0x6: decode FUNCTION_LO { 11972604SN/A format FloatCompareOp { 11986384Sgblack@eecs.umich.edu 0x0: c_f_d({{ cond = 0; }}, 11996384Sgblack@eecs.umich.edu DoublePrecision, UnorderedFalse); 12006384Sgblack@eecs.umich.edu 0x1: c_un_d({{ cond = 0; }}, 12016384Sgblack@eecs.umich.edu DoublePrecision, UnorderedTrue); 12022686Sksewell@umich.edu 0x2: c_eq_d({{ cond = (Fs.df == Ft.df); }}, 12032686Sksewell@umich.edu UnorderedFalse); 12042686Sksewell@umich.edu 0x3: c_ueq_d({{ cond = (Fs.df == Ft.df); }}, 12052686Sksewell@umich.edu UnorderedTrue); 12067799Sgblack@eecs.umich.edu 0x4: c_olt_d({{ cond = (Fs.df < Ft.df); }}, 12072686Sksewell@umich.edu UnorderedFalse); 12082686Sksewell@umich.edu 0x5: c_ult_d({{ cond = (Fs.df < Ft.df); }}, 12092686Sksewell@umich.edu UnorderedTrue); 12102686Sksewell@umich.edu 0x6: c_ole_d({{ cond = (Fs.df <= Ft.df); }}, 12112686Sksewell@umich.edu UnorderedFalse); 12122686Sksewell@umich.edu 0x7: c_ule_d({{ cond = (Fs.df <= Ft.df); }}, 12132686Sksewell@umich.edu UnorderedTrue); 12142602SN/A } 12152602SN/A } 12162602SN/A 12172602SN/A 0x7: decode FUNCTION_LO { 12182686Sksewell@umich.edu format FloatCompareOp { 12192686Sksewell@umich.edu 0x0: c_sf_d({{ cond = 0; }}, DoublePrecision, 12202686Sksewell@umich.edu UnorderedFalse, QnanException); 12212686Sksewell@umich.edu 0x1: c_ngle_d({{ cond = 0; }}, DoublePrecision, 12222686Sksewell@umich.edu UnorderedTrue, QnanException); 12232686Sksewell@umich.edu 0x2: c_seq_d({{ cond = (Fs.df == Ft.df); }}, 12242686Sksewell@umich.edu UnorderedFalse, QnanException); 12252686Sksewell@umich.edu 0x3: c_ngl_d({{ cond = (Fs.df == Ft.df); }}, 12262686Sksewell@umich.edu UnorderedTrue, QnanException); 12272686Sksewell@umich.edu 0x4: c_lt_d({{ cond = (Fs.df < Ft.df); }}, 12282686Sksewell@umich.edu UnorderedFalse, QnanException); 12292686Sksewell@umich.edu 0x5: c_nge_d({{ cond = (Fs.df < Ft.df); }}, 12302686Sksewell@umich.edu UnorderedTrue, QnanException); 12312686Sksewell@umich.edu 0x6: c_le_d({{ cond = (Fs.df <= Ft.df); }}, 12322686Sksewell@umich.edu UnorderedFalse, QnanException); 12332686Sksewell@umich.edu 0x7: c_ngt_d({{ cond = (Fs.df <= Ft.df); }}, 12342686Sksewell@umich.edu UnorderedTrue, QnanException); 12352602SN/A } 12362602SN/A } 12376384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 12382101SN/A } 12395222Sksewell@umich.edu 0x2: CP1Unimpl::unknown(); 12405222Sksewell@umich.edu 0x3: CP1Unimpl::unknown(); 12415222Sksewell@umich.edu 0x7: CP1Unimpl::unknown(); 12422027SN/A 12436384Sgblack@eecs.umich.edu //Table A-16 MIPS32 COP1 Encoding of Function 12446384Sgblack@eecs.umich.edu //Field When rs=W 12452101SN/A 0x4: decode FUNCTION { 12462605SN/A format FloatConvertOp { 12472686Sksewell@umich.edu 0x20: cvt_s_w({{ val = Fs.uw; }}, ToSingle); 12482686Sksewell@umich.edu 0x21: cvt_d_w({{ val = Fs.uw; }}, ToDouble); 12495222Sksewell@umich.edu 0x26: CP1Unimpl::cvt_ps_w(); 12502101SN/A } 12516384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 12522101SN/A } 12532027SN/A 12546384Sgblack@eecs.umich.edu //Table A-16 MIPS32 COP1 Encoding of Function Field 12556384Sgblack@eecs.umich.edu //When rs=L1 12566384Sgblack@eecs.umich.edu //Note: "1. Format type L is legal only if 64-bit 12576384Sgblack@eecs.umich.edu //floating point operations are enabled." 12582101SN/A 0x5: decode FUNCTION_HI { 12592686Sksewell@umich.edu format FloatConvertOp { 12602686Sksewell@umich.edu 0x20: cvt_s_l({{ val = Fs.ud; }}, ToSingle); 12612686Sksewell@umich.edu 0x21: cvt_d_l({{ val = Fs.ud; }}, ToDouble); 12625222Sksewell@umich.edu 0x26: CP1Unimpl::cvt_ps_l(); 12632101SN/A } 12646384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 12652101SN/A } 12662101SN/A 12676384Sgblack@eecs.umich.edu //Table A-17 MIPS64 COP1 Encoding of Function Field 12686384Sgblack@eecs.umich.edu //When rs=PS1 12696384Sgblack@eecs.umich.edu //Note: "1. Format type PS is legal only if 64-bit 12706384Sgblack@eecs.umich.edu //floating point operations are enabled. " 12712572SN/A 0x6: decode FUNCTION_HI { 12722572SN/A 0x0: decode FUNCTION_LO { 12732101SN/A format Float64Op { 12742605SN/A 0x0: add_ps({{ 12752607SN/A Fd1.sf = Fs1.sf + Ft2.sf; 12762607SN/A Fd2.sf = Fs2.sf + Ft2.sf; 12772101SN/A }}); 12782605SN/A 0x1: sub_ps({{ 12792607SN/A Fd1.sf = Fs1.sf - Ft2.sf; 12802607SN/A Fd2.sf = Fs2.sf - Ft2.sf; 12812101SN/A }}); 12822605SN/A 0x2: mul_ps({{ 12832607SN/A Fd1.sf = Fs1.sf * Ft2.sf; 12842607SN/A Fd2.sf = Fs2.sf * Ft2.sf; 12852101SN/A }}); 12862605SN/A 0x5: abs_ps({{ 12872607SN/A Fd1.sf = fabs(Fs1.sf); 12882607SN/A Fd2.sf = fabs(Fs2.sf); 12892101SN/A }}); 12902605SN/A 0x6: mov_ps({{ 12912607SN/A Fd1.sf = Fs1.sf; 12922607SN/A Fd2.sf = Fs2.sf; 12932101SN/A }}); 12942605SN/A 0x7: neg_ps({{ 12952686Sksewell@umich.edu Fd1.sf = -(Fs1.sf); 12962686Sksewell@umich.edu Fd2.sf = -(Fs2.sf); 12972101SN/A }}); 12986384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 12992101SN/A } 13002101SN/A } 13015222Sksewell@umich.edu 0x1: CP1Unimpl::unknown(); 13022572SN/A 0x2: decode FUNCTION_LO { 13032101SN/A 0x1: decode MOVCF { 13042101SN/A format Float64Op { 13052607SN/A 0x0: movf_ps({{ 13062686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 0) ? 13072686Sksewell@umich.edu Fs1 : Fd1; 13082686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC+1) == 0) ? 13092686Sksewell@umich.edu Fs2 : Fd2; 13102607SN/A }}); 13112607SN/A 0x1: movt_ps({{ 13122686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 1) ? 13132686Sksewell@umich.edu Fs1 : Fd1; 13142686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC+1) == 1) ? 13152686Sksewell@umich.edu Fs2 : Fd2; 13162607SN/A }}); 13172101SN/A } 13182101SN/A } 13192101SN/A 13202605SN/A format Float64Op { 13212607SN/A 0x2: movz_ps({{ 13222686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 0) ? 13232686Sksewell@umich.edu Fs1 : Fd1; 13242686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 0) ? 13252686Sksewell@umich.edu Fs2 : Fd2; 13262607SN/A }}); 13272607SN/A 0x3: movn_ps({{ 13282686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 1) ? 13292686Sksewell@umich.edu Fs1 : Fd1; 13302686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 1) ? 13312686Sksewell@umich.edu Fs2 : Fd2; 13322607SN/A }}); 13332135SN/A } 13346384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 13352101SN/A } 13365222Sksewell@umich.edu 0x3: CP1Unimpl::unknown(); 13372572SN/A 0x4: decode FUNCTION_LO { 13382686Sksewell@umich.edu 0x0: FloatOp::cvt_s_pu({{ Fd.sf = Fs2.sf; }}); 13395222Sksewell@umich.edu default: CP1Unimpl::unknown(); 13402101SN/A } 13412101SN/A 13422572SN/A 0x5: decode FUNCTION_LO { 13432686Sksewell@umich.edu 0x0: FloatOp::cvt_s_pl({{ Fd.sf = Fs1.sf; }}); 13442101SN/A format Float64Op { 13456384Sgblack@eecs.umich.edu 0x4: pll({{ 13466384Sgblack@eecs.umich.edu Fd.ud = (uint64_t)Fs1.uw << 32 | Ft1.uw; 13476384Sgblack@eecs.umich.edu }}); 13486384Sgblack@eecs.umich.edu 0x5: plu({{ 13496384Sgblack@eecs.umich.edu Fd.ud = (uint64_t)Fs1.uw << 32 | Ft2.uw; 13506384Sgblack@eecs.umich.edu }}); 13516384Sgblack@eecs.umich.edu 0x6: pul({{ 13526384Sgblack@eecs.umich.edu Fd.ud = (uint64_t)Fs2.uw << 32 | Ft1.uw; 13536384Sgblack@eecs.umich.edu }}); 13546384Sgblack@eecs.umich.edu 0x7: puu({{ 13556384Sgblack@eecs.umich.edu Fd.ud = (uint64_t)Fs2.uw << 32 | Ft2.uw; 13566384Sgblack@eecs.umich.edu }}); 13572101SN/A } 13585222Sksewell@umich.edu default: CP1Unimpl::unknown(); 13592101SN/A } 13602602SN/A 13612602SN/A 0x6: decode FUNCTION_LO { 13622608SN/A format FloatPSCompareOp { 13632686Sksewell@umich.edu 0x0: c_f_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 13642686Sksewell@umich.edu UnorderedFalse); 13652686Sksewell@umich.edu 0x1: c_un_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 13662686Sksewell@umich.edu UnorderedTrue); 13672686Sksewell@umich.edu 0x2: c_eq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 13682686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 13692686Sksewell@umich.edu UnorderedFalse); 13702686Sksewell@umich.edu 0x3: c_ueq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 13712686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 13722686Sksewell@umich.edu UnorderedTrue); 13732686Sksewell@umich.edu 0x4: c_olt_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 13742686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 13752686Sksewell@umich.edu UnorderedFalse); 13762686Sksewell@umich.edu 0x5: c_ult_ps({{ cond1 = (Fs.sf < Ft.sf); }}, 13772686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 13782686Sksewell@umich.edu UnorderedTrue); 13792686Sksewell@umich.edu 0x6: c_ole_ps({{ cond1 = (Fs.sf <= Ft.sf); }}, 13802686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 13812686Sksewell@umich.edu UnorderedFalse); 13822686Sksewell@umich.edu 0x7: c_ule_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 13832686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 13842686Sksewell@umich.edu UnorderedTrue); 13852602SN/A } 13862602SN/A } 13872602SN/A 13882602SN/A 0x7: decode FUNCTION_LO { 13892686Sksewell@umich.edu format FloatPSCompareOp { 13902686Sksewell@umich.edu 0x0: c_sf_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 13912686Sksewell@umich.edu UnorderedFalse, QnanException); 13922686Sksewell@umich.edu 0x1: c_ngle_ps({{ cond1 = 0; }}, 13932686Sksewell@umich.edu {{ cond2 = 0; }}, 13942686Sksewell@umich.edu UnorderedTrue, QnanException); 13952686Sksewell@umich.edu 0x2: c_seq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 13962686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 13972686Sksewell@umich.edu UnorderedFalse, QnanException); 13982686Sksewell@umich.edu 0x3: c_ngl_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 13992686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 14002686Sksewell@umich.edu UnorderedTrue, QnanException); 14012686Sksewell@umich.edu 0x4: c_lt_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 14022686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 14032686Sksewell@umich.edu UnorderedFalse, QnanException); 14042686Sksewell@umich.edu 0x5: c_nge_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 14052686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 14062686Sksewell@umich.edu UnorderedTrue, QnanException); 14072686Sksewell@umich.edu 0x6: c_le_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 14082686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 14092686Sksewell@umich.edu UnorderedFalse, QnanException); 14102686Sksewell@umich.edu 0x7: c_ngt_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 14112686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 14122686Sksewell@umich.edu UnorderedTrue, QnanException); 14132602SN/A } 14142602SN/A } 14152101SN/A } 14162101SN/A } 14176384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 14182101SN/A } 14192101SN/A } 14202101SN/A 14212101SN/A //Table A-19 MIPS32 COP2 Encoding of rs Field 14222101SN/A 0x2: decode RS_MSB { 14235222Sksewell@umich.edu format CP2Unimpl { 14242686Sksewell@umich.edu 0x0: decode RS_HI { 14252686Sksewell@umich.edu 0x0: decode RS_LO { 14262101SN/A 0x0: mfc2(); 14272101SN/A 0x2: cfc2(); 14282101SN/A 0x3: mfhc2(); 14292101SN/A 0x4: mtc2(); 14302101SN/A 0x6: ctc2(); 14312101SN/A 0x7: mftc2(); 14326384Sgblack@eecs.umich.edu default: unknown(); 14332101SN/A } 14342101SN/A 14352686Sksewell@umich.edu 0x1: decode ND { 14362686Sksewell@umich.edu 0x0: decode TF { 14372101SN/A 0x0: bc2f(); 14382101SN/A 0x1: bc2t(); 14396384Sgblack@eecs.umich.edu default: unknown(); 14402101SN/A } 14412101SN/A 14422686Sksewell@umich.edu 0x1: decode TF { 14432101SN/A 0x0: bc2fl(); 14442101SN/A 0x1: bc2tl(); 14456384Sgblack@eecs.umich.edu default: unknown(); 14462101SN/A } 14476384Sgblack@eecs.umich.edu default: unknown(); 14485222Sksewell@umich.edu 14496384Sgblack@eecs.umich.edu } 14506384Sgblack@eecs.umich.edu default: unknown(); 14516384Sgblack@eecs.umich.edu } 14526384Sgblack@eecs.umich.edu default: unknown(); 14532101SN/A } 14542101SN/A } 14552101SN/A 14562101SN/A //Table A-20 MIPS64 COP1X Encoding of Function Field 1 14572101SN/A //Note: "COP1X instructions are legal only if 64-bit floating point 14582101SN/A //operations are enabled." 14592101SN/A 0x3: decode FUNCTION_HI { 14602101SN/A 0x0: decode FUNCTION_LO { 14612686Sksewell@umich.edu format LoadIndexedMemory { 14626384Sgblack@eecs.umich.edu 0x0: lwxc1({{ Fd.uw = Mem.uw; }}); 14636384Sgblack@eecs.umich.edu 0x1: ldxc1({{ Fd.ud = Mem.ud; }}); 14646384Sgblack@eecs.umich.edu 0x5: luxc1({{ Fd.ud = Mem.ud; }}, 14652742Sksewell@umich.edu {{ EA = (Rs + Rt) & ~7; }}); 14662101SN/A } 14672043SN/A } 14682027SN/A 14692101SN/A 0x1: decode FUNCTION_LO { 14702686Sksewell@umich.edu format StoreIndexedMemory { 14716384Sgblack@eecs.umich.edu 0x0: swxc1({{ Mem.uw = Fs.uw; }}); 14726384Sgblack@eecs.umich.edu 0x1: sdxc1({{ Mem.ud = Fs.ud; }}); 14736384Sgblack@eecs.umich.edu 0x5: suxc1({{ Mem.ud = Fs.ud; }}, 14742742Sksewell@umich.edu {{ EA = (Rs + Rt) & ~7; }}); 14752046SN/A } 14762686Sksewell@umich.edu 0x7: Prefetch::prefx({{ EA = Rs + Rt; }}); 14772101SN/A } 14782027SN/A 14792686Sksewell@umich.edu 0x3: decode FUNCTION_LO { 14806384Sgblack@eecs.umich.edu 0x6: Float64Op::alnv_ps({{ 14816384Sgblack@eecs.umich.edu if (Rs<2:0> == 0) { 14826384Sgblack@eecs.umich.edu Fd.ud = Fs.ud; 14836384Sgblack@eecs.umich.edu } else if (Rs<2:0> == 4) { 14848564Sgblack@eecs.umich.edu if (GuestByteOrder == BigEndianByteOrder) 14858564Sgblack@eecs.umich.edu Fd.ud = Fs.ud<31:0> << 32 | Ft.ud<63:32>; 14868564Sgblack@eecs.umich.edu else 14878564Sgblack@eecs.umich.edu Fd.ud = Ft.ud<31:0> << 32 | Fs.ud<63:32>; 14886384Sgblack@eecs.umich.edu } else { 14896384Sgblack@eecs.umich.edu Fd.ud = Fd.ud; 14906384Sgblack@eecs.umich.edu } 14916384Sgblack@eecs.umich.edu }}); 14922686Sksewell@umich.edu } 14932027SN/A 14942686Sksewell@umich.edu format FloatAccOp { 14952686Sksewell@umich.edu 0x4: decode FUNCTION_LO { 14962686Sksewell@umich.edu 0x0: madd_s({{ Fd.sf = (Fs.sf * Ft.sf) + Fr.sf; }}); 14972686Sksewell@umich.edu 0x1: madd_d({{ Fd.df = (Fs.df * Ft.df) + Fr.df; }}); 14982686Sksewell@umich.edu 0x6: madd_ps({{ 14992686Sksewell@umich.edu Fd1.sf = (Fs1.df * Ft1.df) + Fr1.df; 15002686Sksewell@umich.edu Fd2.sf = (Fs2.df * Ft2.df) + Fr2.df; 15012686Sksewell@umich.edu }}); 15022686Sksewell@umich.edu } 15032027SN/A 15042686Sksewell@umich.edu 0x5: decode FUNCTION_LO { 15052686Sksewell@umich.edu 0x0: msub_s({{ Fd.sf = (Fs.sf * Ft.sf) - Fr.sf; }}); 15062686Sksewell@umich.edu 0x1: msub_d({{ Fd.df = (Fs.df * Ft.df) - Fr.df; }}); 15072686Sksewell@umich.edu 0x6: msub_ps({{ 15082686Sksewell@umich.edu Fd1.sf = (Fs1.df * Ft1.df) - Fr1.df; 15092686Sksewell@umich.edu Fd2.sf = (Fs2.df * Ft2.df) - Fr2.df; 15102686Sksewell@umich.edu }}); 15112686Sksewell@umich.edu } 15122027SN/A 15132686Sksewell@umich.edu 0x6: decode FUNCTION_LO { 15142686Sksewell@umich.edu 0x0: nmadd_s({{ Fd.sf = (-1 * Fs.sf * Ft.sf) - Fr.sf; }}); 15158433Sguodeyuan@tsinghua.org.cn 0x1: nmadd_d({{ Fd.df = (-1 * Fs.df * Ft.df) - Fr.df; }}); 15162686Sksewell@umich.edu 0x6: nmadd_ps({{ 15172686Sksewell@umich.edu Fd1.sf = -((Fs1.df * Ft1.df) + Fr1.df); 15182686Sksewell@umich.edu Fd2.sf = -((Fs2.df * Ft2.df) + Fr2.df); 15192686Sksewell@umich.edu }}); 15202686Sksewell@umich.edu } 15212027SN/A 15222686Sksewell@umich.edu 0x7: decode FUNCTION_LO { 15238433Sguodeyuan@tsinghua.org.cn 0x0: nmsub_s({{ Fd.sf = (-1 * Fs.sf * Ft.sf) + Fr.sf; }}); 15248433Sguodeyuan@tsinghua.org.cn 0x1: nmsub_d({{ Fd.df = (-1 * Fs.df * Ft.df) + Fr.df; }}); 15252686Sksewell@umich.edu 0x6: nmsub_ps({{ 15262686Sksewell@umich.edu Fd1.sf = -((Fs1.df * Ft1.df) - Fr1.df); 15272686Sksewell@umich.edu Fd2.sf = -((Fs2.df * Ft2.df) - Fr2.df); 15282686Sksewell@umich.edu }}); 15292046SN/A } 15302101SN/A } 15312043SN/A } 15322025SN/A 15332686Sksewell@umich.edu format Branch { 15342686Sksewell@umich.edu 0x4: beql({{ cond = (Rs.sw == Rt.sw); }}, Likely); 15352686Sksewell@umich.edu 0x5: bnel({{ cond = (Rs.sw != Rt.sw); }}, Likely); 15362686Sksewell@umich.edu 0x6: blezl({{ cond = (Rs.sw <= 0); }}, Likely); 15372686Sksewell@umich.edu 0x7: bgtzl({{ cond = (Rs.sw > 0); }}, Likely); 15382046SN/A } 15392084SN/A } 15402024SN/A 15412686Sksewell@umich.edu 0x3: decode OPCODE_LO { 15422043SN/A //Table A-5 MIPS32 SPECIAL2 Encoding of Function Field 15432043SN/A 0x4: decode FUNCTION_HI { 15442686Sksewell@umich.edu 0x0: decode FUNCTION_LO { 15456384Sgblack@eecs.umich.edu 0x2: IntOp::mul({{ 15466384Sgblack@eecs.umich.edu int64_t temp1 = Rs.sd * Rt.sd; 15476384Sgblack@eecs.umich.edu Rd.sw = temp1<31:0>; 15486384Sgblack@eecs.umich.edu }}, IntMultOp); 15492027SN/A 15504661Sksewell@umich.edu format HiLoRdSelValOp { 15516384Sgblack@eecs.umich.edu 0x0: madd({{ 15526384Sgblack@eecs.umich.edu val = ((int64_t)HI_RD_SEL << 32 | LO_RD_SEL) + 15536384Sgblack@eecs.umich.edu (Rs.sd * Rt.sd); 15546384Sgblack@eecs.umich.edu }}, IntMultOp); 15556384Sgblack@eecs.umich.edu 0x1: maddu({{ 15566384Sgblack@eecs.umich.edu val = ((uint64_t)HI_RD_SEL << 32 | LO_RD_SEL) + 15576384Sgblack@eecs.umich.edu (Rs.ud * Rt.ud); 15586384Sgblack@eecs.umich.edu }}, IntMultOp); 15596384Sgblack@eecs.umich.edu 0x4: msub({{ 15606384Sgblack@eecs.umich.edu val = ((int64_t)HI_RD_SEL << 32 | LO_RD_SEL) - 15616384Sgblack@eecs.umich.edu (Rs.sd * Rt.sd); 15626384Sgblack@eecs.umich.edu }}, IntMultOp); 15636384Sgblack@eecs.umich.edu 0x5: msubu({{ 15646384Sgblack@eecs.umich.edu val = ((uint64_t)HI_RD_SEL << 32 | LO_RD_SEL) - 15656384Sgblack@eecs.umich.edu (Rs.ud * Rt.ud); 15666384Sgblack@eecs.umich.edu }}, IntMultOp); 15672043SN/A } 15682043SN/A } 15692027SN/A 15702043SN/A 0x4: decode FUNCTION_LO { 15712101SN/A format BasicOp { 15726384Sgblack@eecs.umich.edu 0x0: clz({{ 15736384Sgblack@eecs.umich.edu int cnt = 32; 15746384Sgblack@eecs.umich.edu for (int idx = 31; idx >= 0; idx--) { 15756384Sgblack@eecs.umich.edu if (Rs<idx:idx> == 1) { 15766384Sgblack@eecs.umich.edu cnt = 31 - idx; 15776384Sgblack@eecs.umich.edu break; 15786384Sgblack@eecs.umich.edu } 15796384Sgblack@eecs.umich.edu } 15806384Sgblack@eecs.umich.edu Rd.uw = cnt; 15816384Sgblack@eecs.umich.edu }}); 15826384Sgblack@eecs.umich.edu 0x1: clo({{ 15836384Sgblack@eecs.umich.edu int cnt = 32; 15846384Sgblack@eecs.umich.edu for (int idx = 31; idx >= 0; idx--) { 15856384Sgblack@eecs.umich.edu if (Rs<idx:idx> == 0) { 15866384Sgblack@eecs.umich.edu cnt = 31 - idx; 15876384Sgblack@eecs.umich.edu break; 15886384Sgblack@eecs.umich.edu } 15896384Sgblack@eecs.umich.edu } 15906384Sgblack@eecs.umich.edu Rd.uw = cnt; 15916384Sgblack@eecs.umich.edu }}); 15922101SN/A } 15932043SN/A } 15942027SN/A 15952043SN/A 0x7: decode FUNCTION_LO { 15962686Sksewell@umich.edu 0x7: FailUnimpl::sdbbp(); 15972043SN/A } 15982043SN/A } 15992024SN/A 16002686Sksewell@umich.edu //Table A-6 MIPS32 SPECIAL3 Encoding of Function Field for Release 2 16012686Sksewell@umich.edu //of the Architecture 16022043SN/A 0x7: decode FUNCTION_HI { 16032101SN/A 0x0: decode FUNCTION_LO { 16042686Sksewell@umich.edu format BasicOp { 16052742Sksewell@umich.edu 0x0: ext({{ Rt.uw = bits(Rs.uw, MSB+LSB, LSB); }}); 16066384Sgblack@eecs.umich.edu 0x4: ins({{ 16076384Sgblack@eecs.umich.edu Rt.uw = bits(Rt.uw, 31, MSB+1) << (MSB+1) | 16086384Sgblack@eecs.umich.edu bits(Rs.uw, MSB-LSB, 0) << LSB | 16096384Sgblack@eecs.umich.edu bits(Rt.uw, LSB-1, 0); 16106384Sgblack@eecs.umich.edu }}); 16112046SN/A } 16122101SN/A } 16132026SN/A 16142101SN/A 0x1: decode FUNCTION_LO { 16154661Sksewell@umich.edu format MT_Control { 16166384Sgblack@eecs.umich.edu 0x0: fork({{ 16176384Sgblack@eecs.umich.edu forkThread(xc->tcBase(), fault, RD, Rs, Rt); 16186384Sgblack@eecs.umich.edu }}, UserMode); 16196384Sgblack@eecs.umich.edu 0x1: yield({{ 16206384Sgblack@eecs.umich.edu Rd.sw = yieldThread(xc->tcBase(), fault, Rs.sw, 16216384Sgblack@eecs.umich.edu YQMask); 16226384Sgblack@eecs.umich.edu }}, UserMode); 16234661Sksewell@umich.edu } 16244661Sksewell@umich.edu 16254661Sksewell@umich.edu //Table 5-9 MIPS32 LX Encoding of the op Field (DSP ASE MANUAL) 16264661Sksewell@umich.edu 0x2: decode OP_HI { 16274661Sksewell@umich.edu 0x0: decode OP_LO { 16284661Sksewell@umich.edu format LoadIndexedMemory { 16294661Sksewell@umich.edu 0x0: lwx({{ Rd.sw = Mem.sw; }}); 16304661Sksewell@umich.edu 0x4: lhx({{ Rd.sw = Mem.sh; }}); 16314661Sksewell@umich.edu 0x6: lbux({{ Rd.uw = Mem.ub; }}); 16324661Sksewell@umich.edu } 16334661Sksewell@umich.edu } 16344661Sksewell@umich.edu } 16356384Sgblack@eecs.umich.edu 0x4: DspIntOp::insv({{ 16366384Sgblack@eecs.umich.edu int pos = dspctl<5:0>; 16376384Sgblack@eecs.umich.edu int size = dspctl<12:7> - 1; 16386384Sgblack@eecs.umich.edu Rt.uw = insertBits(Rt.uw, pos+size, 16396384Sgblack@eecs.umich.edu pos, Rs.uw<size:0>); 16406384Sgblack@eecs.umich.edu }}); 16414661Sksewell@umich.edu } 16424661Sksewell@umich.edu 16434661Sksewell@umich.edu 0x2: decode FUNCTION_LO { 16444661Sksewell@umich.edu 16456384Sgblack@eecs.umich.edu //Table 5-5 MIPS32 ADDU.QB Encoding of the op Field 16466384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 16474661Sksewell@umich.edu 0x0: decode OP_HI { 16484661Sksewell@umich.edu 0x0: decode OP_LO { 16494661Sksewell@umich.edu format DspIntOp { 16506384Sgblack@eecs.umich.edu 0x0: addu_qb({{ 16516384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_QB, 16526384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 16536384Sgblack@eecs.umich.edu }}); 16546384Sgblack@eecs.umich.edu 0x1: subu_qb({{ 16556384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_QB, 16566384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 16576384Sgblack@eecs.umich.edu }}); 16586384Sgblack@eecs.umich.edu 0x4: addu_s_qb({{ 16596384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_QB, 16606384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 16616384Sgblack@eecs.umich.edu }}); 16626384Sgblack@eecs.umich.edu 0x5: subu_s_qb({{ 16636384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_QB, 16646384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 16656384Sgblack@eecs.umich.edu }}); 16666384Sgblack@eecs.umich.edu 0x6: muleu_s_ph_qbl({{ 16676384Sgblack@eecs.umich.edu Rd.uw = dspMuleu(Rs.uw, Rt.uw, 16686384Sgblack@eecs.umich.edu MODE_L, &dspctl); 16696384Sgblack@eecs.umich.edu }}, IntMultOp); 16706384Sgblack@eecs.umich.edu 0x7: muleu_s_ph_qbr({{ 16716384Sgblack@eecs.umich.edu Rd.uw = dspMuleu(Rs.uw, Rt.uw, 16726384Sgblack@eecs.umich.edu MODE_R, &dspctl); 16736384Sgblack@eecs.umich.edu }}, IntMultOp); 16744661Sksewell@umich.edu } 16754661Sksewell@umich.edu } 16764661Sksewell@umich.edu 0x1: decode OP_LO { 16774661Sksewell@umich.edu format DspIntOp { 16786384Sgblack@eecs.umich.edu 0x0: addu_ph({{ 16796384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 16806384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 16816384Sgblack@eecs.umich.edu }}); 16826384Sgblack@eecs.umich.edu 0x1: subu_ph({{ 16836384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 16846384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 16856384Sgblack@eecs.umich.edu }}); 16866384Sgblack@eecs.umich.edu 0x2: addq_ph({{ 16876384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 16886384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 16896384Sgblack@eecs.umich.edu }}); 16906384Sgblack@eecs.umich.edu 0x3: subq_ph({{ 16916384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 16926384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 16936384Sgblack@eecs.umich.edu }}); 16946384Sgblack@eecs.umich.edu 0x4: addu_s_ph({{ 16956384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 16966384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 16976384Sgblack@eecs.umich.edu }}); 16986384Sgblack@eecs.umich.edu 0x5: subu_s_ph({{ 16996384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 17006384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 17016384Sgblack@eecs.umich.edu }}); 17026384Sgblack@eecs.umich.edu 0x6: addq_s_ph({{ 17036384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 17046384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17056384Sgblack@eecs.umich.edu }}); 17066384Sgblack@eecs.umich.edu 0x7: subq_s_ph({{ 17076384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 17086384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17096384Sgblack@eecs.umich.edu }}); 17104661Sksewell@umich.edu } 17114661Sksewell@umich.edu } 17124661Sksewell@umich.edu 0x2: decode OP_LO { 17134661Sksewell@umich.edu format DspIntOp { 17146384Sgblack@eecs.umich.edu 0x0: addsc({{ 17156384Sgblack@eecs.umich.edu int64_t dresult; 17166384Sgblack@eecs.umich.edu dresult = Rs.ud + Rt.ud; 17176384Sgblack@eecs.umich.edu Rd.sw = dresult<31:0>; 17186384Sgblack@eecs.umich.edu dspctl = insertBits(dspctl, 13, 13, 17196384Sgblack@eecs.umich.edu dresult<32:32>); 17206384Sgblack@eecs.umich.edu }}); 17216384Sgblack@eecs.umich.edu 0x1: addwc({{ 17226384Sgblack@eecs.umich.edu int64_t dresult; 17236384Sgblack@eecs.umich.edu dresult = Rs.sd + Rt.sd + dspctl<13:13>; 17246384Sgblack@eecs.umich.edu Rd.sw = dresult<31:0>; 17256384Sgblack@eecs.umich.edu if (dresult<32:32> != dresult<31:31>) 17266384Sgblack@eecs.umich.edu dspctl = insertBits(dspctl, 20, 20, 1); 17276384Sgblack@eecs.umich.edu }}); 17286384Sgblack@eecs.umich.edu 0x2: modsub({{ 17296384Sgblack@eecs.umich.edu Rd.sw = (Rs.sw == 0) ? Rt.sw<23:8> : 17306384Sgblack@eecs.umich.edu Rs.sw - Rt.sw<7:0>; 17316384Sgblack@eecs.umich.edu }}); 17326384Sgblack@eecs.umich.edu 0x4: raddu_w_qb({{ 17336384Sgblack@eecs.umich.edu Rd.uw = Rs.uw<31:24> + Rs.uw<23:16> + 17346384Sgblack@eecs.umich.edu Rs.uw<15:8> + Rs.uw<7:0>; 17356384Sgblack@eecs.umich.edu }}); 17366384Sgblack@eecs.umich.edu 0x6: addq_s_w({{ 17376384Sgblack@eecs.umich.edu Rd.sw = dspAdd(Rs.sw, Rt.sw, SIMD_FMT_W, 17386384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17396384Sgblack@eecs.umich.edu }}); 17406384Sgblack@eecs.umich.edu 0x7: subq_s_w({{ 17416384Sgblack@eecs.umich.edu Rd.sw = dspSub(Rs.sw, Rt.sw, SIMD_FMT_W, 17426384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17436384Sgblack@eecs.umich.edu }}); 17444661Sksewell@umich.edu } 17454661Sksewell@umich.edu } 17464661Sksewell@umich.edu 0x3: decode OP_LO { 17474661Sksewell@umich.edu format DspIntOp { 17486384Sgblack@eecs.umich.edu 0x4: muleq_s_w_phl({{ 17496384Sgblack@eecs.umich.edu Rd.sw = dspMuleq(Rs.sw, Rt.sw, 17506384Sgblack@eecs.umich.edu MODE_L, &dspctl); 17516384Sgblack@eecs.umich.edu }}, IntMultOp); 17526384Sgblack@eecs.umich.edu 0x5: muleq_s_w_phr({{ 17536384Sgblack@eecs.umich.edu Rd.sw = dspMuleq(Rs.sw, Rt.sw, 17546384Sgblack@eecs.umich.edu MODE_R, &dspctl); 17556384Sgblack@eecs.umich.edu }}, IntMultOp); 17566384Sgblack@eecs.umich.edu 0x6: mulq_s_ph({{ 17576384Sgblack@eecs.umich.edu Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_PH, 17586384Sgblack@eecs.umich.edu SATURATE, NOROUND, &dspctl); 17596384Sgblack@eecs.umich.edu }}, IntMultOp); 17606384Sgblack@eecs.umich.edu 0x7: mulq_rs_ph({{ 17616384Sgblack@eecs.umich.edu Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_PH, 17626384Sgblack@eecs.umich.edu SATURATE, ROUND, &dspctl); 17636384Sgblack@eecs.umich.edu }}, IntMultOp); 17644661Sksewell@umich.edu } 17654661Sksewell@umich.edu } 17664661Sksewell@umich.edu } 17674661Sksewell@umich.edu 17686384Sgblack@eecs.umich.edu //Table 5-6 MIPS32 CMPU_EQ_QB Encoding of the op Field 17696384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 17704661Sksewell@umich.edu 0x1: decode OP_HI { 17714661Sksewell@umich.edu 0x0: decode OP_LO { 17724661Sksewell@umich.edu format DspIntOp { 17736384Sgblack@eecs.umich.edu 0x0: cmpu_eq_qb({{ 17746384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_QB, 17756384Sgblack@eecs.umich.edu UNSIGNED, CMP_EQ, &dspctl); 17766384Sgblack@eecs.umich.edu }}); 17776384Sgblack@eecs.umich.edu 0x1: cmpu_lt_qb({{ 17786384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_QB, 17796384Sgblack@eecs.umich.edu UNSIGNED, CMP_LT, &dspctl); 17806384Sgblack@eecs.umich.edu }}); 17816384Sgblack@eecs.umich.edu 0x2: cmpu_le_qb({{ 17826384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_QB, 17836384Sgblack@eecs.umich.edu UNSIGNED, CMP_LE, &dspctl); 17846384Sgblack@eecs.umich.edu }}); 17856384Sgblack@eecs.umich.edu 0x3: pick_qb({{ 17866384Sgblack@eecs.umich.edu Rd.uw = dspPick(Rs.uw, Rt.uw, 17876384Sgblack@eecs.umich.edu SIMD_FMT_QB, &dspctl); 17886384Sgblack@eecs.umich.edu }}); 17896384Sgblack@eecs.umich.edu 0x4: cmpgu_eq_qb({{ 17906384Sgblack@eecs.umich.edu Rd.uw = dspCmpg(Rs.uw, Rt.uw, SIMD_FMT_QB, 17916384Sgblack@eecs.umich.edu UNSIGNED, CMP_EQ ); 17926384Sgblack@eecs.umich.edu }}); 17936384Sgblack@eecs.umich.edu 0x5: cmpgu_lt_qb({{ 17946384Sgblack@eecs.umich.edu Rd.uw = dspCmpg(Rs.uw, Rt.uw, SIMD_FMT_QB, 17956384Sgblack@eecs.umich.edu UNSIGNED, CMP_LT); 17966384Sgblack@eecs.umich.edu }}); 17976384Sgblack@eecs.umich.edu 0x6: cmpgu_le_qb({{ 17986384Sgblack@eecs.umich.edu Rd.uw = dspCmpg(Rs.uw, Rt.uw, SIMD_FMT_QB, 17996384Sgblack@eecs.umich.edu UNSIGNED, CMP_LE); 18006384Sgblack@eecs.umich.edu }}); 18014661Sksewell@umich.edu } 18024661Sksewell@umich.edu } 18034661Sksewell@umich.edu 0x1: decode OP_LO { 18044661Sksewell@umich.edu format DspIntOp { 18056384Sgblack@eecs.umich.edu 0x0: cmp_eq_ph({{ 18066384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_PH, 18076384Sgblack@eecs.umich.edu SIGNED, CMP_EQ, &dspctl); 18086384Sgblack@eecs.umich.edu }}); 18096384Sgblack@eecs.umich.edu 0x1: cmp_lt_ph({{ 18106384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_PH, 18116384Sgblack@eecs.umich.edu SIGNED, CMP_LT, &dspctl); 18126384Sgblack@eecs.umich.edu }}); 18136384Sgblack@eecs.umich.edu 0x2: cmp_le_ph({{ 18146384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_PH, 18156384Sgblack@eecs.umich.edu SIGNED, CMP_LE, &dspctl); 18166384Sgblack@eecs.umich.edu }}); 18176384Sgblack@eecs.umich.edu 0x3: pick_ph({{ 18186384Sgblack@eecs.umich.edu Rd.uw = dspPick(Rs.uw, Rt.uw, 18196384Sgblack@eecs.umich.edu SIMD_FMT_PH, &dspctl); 18206384Sgblack@eecs.umich.edu }}); 18216384Sgblack@eecs.umich.edu 0x4: precrq_qb_ph({{ 18226384Sgblack@eecs.umich.edu Rd.uw = Rs.uw<31:24> << 24 | 18236384Sgblack@eecs.umich.edu Rs.uw<15:8> << 16 | 18246384Sgblack@eecs.umich.edu Rt.uw<31:24> << 8 | 18256384Sgblack@eecs.umich.edu Rt.uw<15:8>; 18266384Sgblack@eecs.umich.edu }}); 18276384Sgblack@eecs.umich.edu 0x5: precr_qb_ph({{ 18286384Sgblack@eecs.umich.edu Rd.uw = Rs.uw<23:16> << 24 | 18296384Sgblack@eecs.umich.edu Rs.uw<7:0> << 16 | 18306384Sgblack@eecs.umich.edu Rt.uw<23:16> << 8 | 18316384Sgblack@eecs.umich.edu Rt.uw<7:0>; 18326384Sgblack@eecs.umich.edu }}); 18336384Sgblack@eecs.umich.edu 0x6: packrl_ph({{ 18346384Sgblack@eecs.umich.edu Rd.uw = dspPack(Rs.uw, Rt.uw, SIMD_FMT_PH); 18356384Sgblack@eecs.umich.edu }}); 18366384Sgblack@eecs.umich.edu 0x7: precrqu_s_qb_ph({{ 18376384Sgblack@eecs.umich.edu Rd.uw = dspPrecrqu(Rs.uw, Rt.uw, &dspctl); 18386384Sgblack@eecs.umich.edu }}); 18394661Sksewell@umich.edu } 18404661Sksewell@umich.edu } 18414661Sksewell@umich.edu 0x2: decode OP_LO { 18424661Sksewell@umich.edu format DspIntOp { 18436384Sgblack@eecs.umich.edu 0x4: precrq_ph_w({{ 18446384Sgblack@eecs.umich.edu Rd.uw = Rs.uw<31:16> << 16 | Rt.uw<31:16>; 18456384Sgblack@eecs.umich.edu }}); 18466384Sgblack@eecs.umich.edu 0x5: precrq_rs_ph_w({{ 18476384Sgblack@eecs.umich.edu Rd.uw = dspPrecrq(Rs.uw, Rt.uw, 18486384Sgblack@eecs.umich.edu SIMD_FMT_W, &dspctl); 18496384Sgblack@eecs.umich.edu }}); 18504661Sksewell@umich.edu } 18514661Sksewell@umich.edu } 18524661Sksewell@umich.edu 0x3: decode OP_LO { 18534661Sksewell@umich.edu format DspIntOp { 18546384Sgblack@eecs.umich.edu 0x0: cmpgdu_eq_qb({{ 18556384Sgblack@eecs.umich.edu Rd.uw = dspCmpgd(Rs.uw, Rt.uw, SIMD_FMT_QB, 18566384Sgblack@eecs.umich.edu UNSIGNED, CMP_EQ, &dspctl); 18576384Sgblack@eecs.umich.edu }}); 18586384Sgblack@eecs.umich.edu 0x1: cmpgdu_lt_qb({{ 18596384Sgblack@eecs.umich.edu Rd.uw = dspCmpgd(Rs.uw, Rt.uw, SIMD_FMT_QB, 18606384Sgblack@eecs.umich.edu UNSIGNED, CMP_LT, &dspctl); 18616384Sgblack@eecs.umich.edu }}); 18626384Sgblack@eecs.umich.edu 0x2: cmpgdu_le_qb({{ 18636384Sgblack@eecs.umich.edu Rd.uw = dspCmpgd(Rs.uw, Rt.uw, SIMD_FMT_QB, 18646384Sgblack@eecs.umich.edu UNSIGNED, CMP_LE, &dspctl); 18656384Sgblack@eecs.umich.edu }}); 18666384Sgblack@eecs.umich.edu 0x6: precr_sra_ph_w({{ 18676384Sgblack@eecs.umich.edu Rt.uw = dspPrecrSra(Rt.uw, Rs.uw, RD, 18686384Sgblack@eecs.umich.edu SIMD_FMT_W, NOROUND); 18696384Sgblack@eecs.umich.edu }}); 18706384Sgblack@eecs.umich.edu 0x7: precr_sra_r_ph_w({{ 18716384Sgblack@eecs.umich.edu Rt.uw = dspPrecrSra(Rt.uw, Rs.uw, RD, 18726384Sgblack@eecs.umich.edu SIMD_FMT_W, ROUND); 18736384Sgblack@eecs.umich.edu }}); 18744661Sksewell@umich.edu } 18754661Sksewell@umich.edu } 18764661Sksewell@umich.edu } 18774661Sksewell@umich.edu 18786384Sgblack@eecs.umich.edu //Table 5-7 MIPS32 ABSQ_S.PH Encoding of the op Field 18796384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 18804661Sksewell@umich.edu 0x2: decode OP_HI { 18814661Sksewell@umich.edu 0x0: decode OP_LO { 18824661Sksewell@umich.edu format DspIntOp { 18836384Sgblack@eecs.umich.edu 0x1: absq_s_qb({{ 18846384Sgblack@eecs.umich.edu Rd.sw = dspAbs(Rt.sw, SIMD_FMT_QB, &dspctl); 18856384Sgblack@eecs.umich.edu }}); 18866384Sgblack@eecs.umich.edu 0x2: repl_qb({{ 18876384Sgblack@eecs.umich.edu Rd.uw = RS_RT<7:0> << 24 | 18886384Sgblack@eecs.umich.edu RS_RT<7:0> << 16 | 18896384Sgblack@eecs.umich.edu RS_RT<7:0> << 8 | 18906384Sgblack@eecs.umich.edu RS_RT<7:0>; 18916384Sgblack@eecs.umich.edu }}); 18926384Sgblack@eecs.umich.edu 0x3: replv_qb({{ 18936384Sgblack@eecs.umich.edu Rd.sw = Rt.uw<7:0> << 24 | 18946384Sgblack@eecs.umich.edu Rt.uw<7:0> << 16 | 18956384Sgblack@eecs.umich.edu Rt.uw<7:0> << 8 | 18966384Sgblack@eecs.umich.edu Rt.uw<7:0>; 18976384Sgblack@eecs.umich.edu }}); 18986384Sgblack@eecs.umich.edu 0x4: precequ_ph_qbl({{ 18996384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 19006384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_L); 19016384Sgblack@eecs.umich.edu }}); 19026384Sgblack@eecs.umich.edu 0x5: precequ_ph_qbr({{ 19036384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 19046384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_R); 19056384Sgblack@eecs.umich.edu }}); 19066384Sgblack@eecs.umich.edu 0x6: precequ_ph_qbla({{ 19076384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 19086384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_LA); 19096384Sgblack@eecs.umich.edu }}); 19106384Sgblack@eecs.umich.edu 0x7: precequ_ph_qbra({{ 19116384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 19126384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_RA); 19136384Sgblack@eecs.umich.edu }}); 19144661Sksewell@umich.edu } 19154661Sksewell@umich.edu } 19164661Sksewell@umich.edu 0x1: decode OP_LO { 19174661Sksewell@umich.edu format DspIntOp { 19186384Sgblack@eecs.umich.edu 0x1: absq_s_ph({{ 19196384Sgblack@eecs.umich.edu Rd.sw = dspAbs(Rt.sw, SIMD_FMT_PH, &dspctl); 19206384Sgblack@eecs.umich.edu }}); 19216384Sgblack@eecs.umich.edu 0x2: repl_ph({{ 19226384Sgblack@eecs.umich.edu Rd.uw = (sext<10>(RS_RT))<15:0> << 16 | 19236384Sgblack@eecs.umich.edu (sext<10>(RS_RT))<15:0>; 19246384Sgblack@eecs.umich.edu }}); 19256384Sgblack@eecs.umich.edu 0x3: replv_ph({{ 19266384Sgblack@eecs.umich.edu Rd.uw = Rt.uw<15:0> << 16 | 19276384Sgblack@eecs.umich.edu Rt.uw<15:0>; 19286384Sgblack@eecs.umich.edu }}); 19296384Sgblack@eecs.umich.edu 0x4: preceq_w_phl({{ 19306384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_PH, SIGNED, 19316384Sgblack@eecs.umich.edu SIMD_FMT_W, SIGNED, MODE_L); 19326384Sgblack@eecs.umich.edu }}); 19336384Sgblack@eecs.umich.edu 0x5: preceq_w_phr({{ 19346384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_PH, SIGNED, 19356384Sgblack@eecs.umich.edu SIMD_FMT_W, SIGNED, MODE_R); 19366384Sgblack@eecs.umich.edu }}); 19374661Sksewell@umich.edu } 19384661Sksewell@umich.edu } 19394661Sksewell@umich.edu 0x2: decode OP_LO { 19404661Sksewell@umich.edu format DspIntOp { 19416384Sgblack@eecs.umich.edu 0x1: absq_s_w({{ 19426384Sgblack@eecs.umich.edu Rd.sw = dspAbs(Rt.sw, SIMD_FMT_W, &dspctl); 19436384Sgblack@eecs.umich.edu }}); 19444661Sksewell@umich.edu } 19454661Sksewell@umich.edu } 19464661Sksewell@umich.edu 0x3: decode OP_LO { 19476384Sgblack@eecs.umich.edu 0x3: IntOp::bitrev({{ 19486384Sgblack@eecs.umich.edu Rd.uw = bitrev( Rt.uw<15:0> ); 19496384Sgblack@eecs.umich.edu }}); 19504661Sksewell@umich.edu format DspIntOp { 19516384Sgblack@eecs.umich.edu 0x4: preceu_ph_qbl({{ 19526384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 19536384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 19546384Sgblack@eecs.umich.edu UNSIGNED, MODE_L); 19556384Sgblack@eecs.umich.edu }}); 19566384Sgblack@eecs.umich.edu 0x5: preceu_ph_qbr({{ 19576384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 19586384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 19596384Sgblack@eecs.umich.edu UNSIGNED, MODE_R ); 19606384Sgblack@eecs.umich.edu }}); 19616384Sgblack@eecs.umich.edu 0x6: preceu_ph_qbla({{ 19626384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 19636384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 19646384Sgblack@eecs.umich.edu UNSIGNED, MODE_LA ); 19656384Sgblack@eecs.umich.edu }}); 19666384Sgblack@eecs.umich.edu 0x7: preceu_ph_qbra({{ 19676384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 19686384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 19696384Sgblack@eecs.umich.edu UNSIGNED, MODE_RA); 19706384Sgblack@eecs.umich.edu }}); 19714661Sksewell@umich.edu } 19724661Sksewell@umich.edu } 19734661Sksewell@umich.edu } 19744661Sksewell@umich.edu 19756384Sgblack@eecs.umich.edu //Table 5-8 MIPS32 SHLL.QB Encoding of the op Field 19766384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 19774661Sksewell@umich.edu 0x3: decode OP_HI { 19784661Sksewell@umich.edu 0x0: decode OP_LO { 19794661Sksewell@umich.edu format DspIntOp { 19806384Sgblack@eecs.umich.edu 0x0: shll_qb({{ 19816384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, RS, SIMD_FMT_QB, 19826384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 19836384Sgblack@eecs.umich.edu }}); 19846384Sgblack@eecs.umich.edu 0x1: shrl_qb({{ 19856384Sgblack@eecs.umich.edu Rd.sw = dspShrl(Rt.sw, RS, SIMD_FMT_QB, 19866384Sgblack@eecs.umich.edu UNSIGNED); 19876384Sgblack@eecs.umich.edu }}); 19886384Sgblack@eecs.umich.edu 0x2: shllv_qb({{ 19896384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_QB, 19906384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 19916384Sgblack@eecs.umich.edu }}); 19926384Sgblack@eecs.umich.edu 0x3: shrlv_qb({{ 19936384Sgblack@eecs.umich.edu Rd.sw = dspShrl(Rt.sw, Rs.sw, SIMD_FMT_QB, 19946384Sgblack@eecs.umich.edu UNSIGNED); 19956384Sgblack@eecs.umich.edu }}); 19966384Sgblack@eecs.umich.edu 0x4: shra_qb({{ 19976384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_QB, 19986384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 19996384Sgblack@eecs.umich.edu }}); 20006384Sgblack@eecs.umich.edu 0x5: shra_r_qb({{ 20016384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_QB, 20026384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20036384Sgblack@eecs.umich.edu }}); 20046384Sgblack@eecs.umich.edu 0x6: shrav_qb({{ 20056384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_QB, 20066384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 20076384Sgblack@eecs.umich.edu }}); 20086384Sgblack@eecs.umich.edu 0x7: shrav_r_qb({{ 20096384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_QB, 20106384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20116384Sgblack@eecs.umich.edu }}); 20124661Sksewell@umich.edu } 20134661Sksewell@umich.edu } 20144661Sksewell@umich.edu 0x1: decode OP_LO { 20154661Sksewell@umich.edu format DspIntOp { 20166384Sgblack@eecs.umich.edu 0x0: shll_ph({{ 20176384Sgblack@eecs.umich.edu Rd.uw = dspShll(Rt.uw, RS, SIMD_FMT_PH, 20186384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 20196384Sgblack@eecs.umich.edu }}); 20206384Sgblack@eecs.umich.edu 0x1: shra_ph({{ 20216384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_PH, 20226384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 20236384Sgblack@eecs.umich.edu }}); 20246384Sgblack@eecs.umich.edu 0x2: shllv_ph({{ 20256384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_PH, 20266384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 20276384Sgblack@eecs.umich.edu }}); 20286384Sgblack@eecs.umich.edu 0x3: shrav_ph({{ 20296384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_PH, 20306384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 20316384Sgblack@eecs.umich.edu }}); 20326384Sgblack@eecs.umich.edu 0x4: shll_s_ph({{ 20336384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, RS, SIMD_FMT_PH, 20346384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 20356384Sgblack@eecs.umich.edu }}); 20366384Sgblack@eecs.umich.edu 0x5: shra_r_ph({{ 20376384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_PH, 20386384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20396384Sgblack@eecs.umich.edu }}); 20406384Sgblack@eecs.umich.edu 0x6: shllv_s_ph({{ 20416384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_PH, 20426384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 20436384Sgblack@eecs.umich.edu }}); 20446384Sgblack@eecs.umich.edu 0x7: shrav_r_ph({{ 20456384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_PH, 20466384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20476384Sgblack@eecs.umich.edu }}); 20484661Sksewell@umich.edu } 20494661Sksewell@umich.edu } 20504661Sksewell@umich.edu 0x2: decode OP_LO { 20514661Sksewell@umich.edu format DspIntOp { 20526384Sgblack@eecs.umich.edu 0x4: shll_s_w({{ 20536384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, RS, SIMD_FMT_W, 20546384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 20556384Sgblack@eecs.umich.edu }}); 20566384Sgblack@eecs.umich.edu 0x5: shra_r_w({{ 20576384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_W, 20586384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20596384Sgblack@eecs.umich.edu }}); 20606384Sgblack@eecs.umich.edu 0x6: shllv_s_w({{ 20616384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_W, 20626384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 20636384Sgblack@eecs.umich.edu }}); 20646384Sgblack@eecs.umich.edu 0x7: shrav_r_w({{ 20656384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_W, 20666384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20676384Sgblack@eecs.umich.edu }}); 20684661Sksewell@umich.edu } 20694661Sksewell@umich.edu } 20704661Sksewell@umich.edu 0x3: decode OP_LO { 20714661Sksewell@umich.edu format DspIntOp { 20726384Sgblack@eecs.umich.edu 0x1: shrl_ph({{ 20736384Sgblack@eecs.umich.edu Rd.sw = dspShrl(Rt.sw, RS, SIMD_FMT_PH, 20746384Sgblack@eecs.umich.edu UNSIGNED); 20756384Sgblack@eecs.umich.edu }}); 20766384Sgblack@eecs.umich.edu 0x3: shrlv_ph({{ 20776384Sgblack@eecs.umich.edu Rd.sw = dspShrl(Rt.sw, Rs.sw, SIMD_FMT_PH, 20786384Sgblack@eecs.umich.edu UNSIGNED); 20796384Sgblack@eecs.umich.edu }}); 20804661Sksewell@umich.edu } 20814661Sksewell@umich.edu } 20824661Sksewell@umich.edu } 20834661Sksewell@umich.edu } 20844661Sksewell@umich.edu 20854661Sksewell@umich.edu 0x3: decode FUNCTION_LO { 20864661Sksewell@umich.edu 20876384Sgblack@eecs.umich.edu //Table 3.12 MIPS32 ADDUH.QB Encoding of the op Field 20886384Sgblack@eecs.umich.edu //(DSP ASE Rev2 Manual) 20894661Sksewell@umich.edu 0x0: decode OP_HI { 20904661Sksewell@umich.edu 0x0: decode OP_LO { 20914661Sksewell@umich.edu format DspIntOp { 20926384Sgblack@eecs.umich.edu 0x0: adduh_qb({{ 20936384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_QB, 20946384Sgblack@eecs.umich.edu NOROUND, UNSIGNED); 20956384Sgblack@eecs.umich.edu }}); 20966384Sgblack@eecs.umich.edu 0x1: subuh_qb({{ 20976384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_QB, 20986384Sgblack@eecs.umich.edu NOROUND, UNSIGNED); 20996384Sgblack@eecs.umich.edu }}); 21006384Sgblack@eecs.umich.edu 0x2: adduh_r_qb({{ 21016384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_QB, 21026384Sgblack@eecs.umich.edu ROUND, UNSIGNED); 21036384Sgblack@eecs.umich.edu }}); 21046384Sgblack@eecs.umich.edu 0x3: subuh_r_qb({{ 21056384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_QB, 21066384Sgblack@eecs.umich.edu ROUND, UNSIGNED); 21076384Sgblack@eecs.umich.edu }}); 21084661Sksewell@umich.edu } 21094661Sksewell@umich.edu } 21104661Sksewell@umich.edu 0x1: decode OP_LO { 21114661Sksewell@umich.edu format DspIntOp { 21126384Sgblack@eecs.umich.edu 0x0: addqh_ph({{ 21136384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_PH, 21146384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21156384Sgblack@eecs.umich.edu }}); 21166384Sgblack@eecs.umich.edu 0x1: subqh_ph({{ 21176384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_PH, 21186384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21196384Sgblack@eecs.umich.edu }}); 21206384Sgblack@eecs.umich.edu 0x2: addqh_r_ph({{ 21216384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_PH, 21226384Sgblack@eecs.umich.edu ROUND, SIGNED); 21236384Sgblack@eecs.umich.edu }}); 21246384Sgblack@eecs.umich.edu 0x3: subqh_r_ph({{ 21256384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_PH, 21266384Sgblack@eecs.umich.edu ROUND, SIGNED); 21276384Sgblack@eecs.umich.edu }}); 21286384Sgblack@eecs.umich.edu 0x4: mul_ph({{ 21296384Sgblack@eecs.umich.edu Rd.sw = dspMul(Rs.sw, Rt.sw, SIMD_FMT_PH, 21306384Sgblack@eecs.umich.edu NOSATURATE, &dspctl); 21316384Sgblack@eecs.umich.edu }}, IntMultOp); 21326384Sgblack@eecs.umich.edu 0x6: mul_s_ph({{ 21336384Sgblack@eecs.umich.edu Rd.sw = dspMul(Rs.sw, Rt.sw, SIMD_FMT_PH, 21346384Sgblack@eecs.umich.edu SATURATE, &dspctl); 21356384Sgblack@eecs.umich.edu }}, IntMultOp); 21364661Sksewell@umich.edu } 21374661Sksewell@umich.edu } 21384661Sksewell@umich.edu 0x2: decode OP_LO { 21394661Sksewell@umich.edu format DspIntOp { 21406384Sgblack@eecs.umich.edu 0x0: addqh_w({{ 21416384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_W, 21426384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21436384Sgblack@eecs.umich.edu }}); 21446384Sgblack@eecs.umich.edu 0x1: subqh_w({{ 21456384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_W, 21466384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21476384Sgblack@eecs.umich.edu }}); 21486384Sgblack@eecs.umich.edu 0x2: addqh_r_w({{ 21496384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_W, 21506384Sgblack@eecs.umich.edu ROUND, SIGNED); 21516384Sgblack@eecs.umich.edu }}); 21526384Sgblack@eecs.umich.edu 0x3: subqh_r_w({{ 21536384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_W, 21546384Sgblack@eecs.umich.edu ROUND, SIGNED); 21556384Sgblack@eecs.umich.edu }}); 21566384Sgblack@eecs.umich.edu 0x6: mulq_s_w({{ 21576384Sgblack@eecs.umich.edu Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_W, 21586384Sgblack@eecs.umich.edu SATURATE, NOROUND, &dspctl); 21596384Sgblack@eecs.umich.edu }}, IntMultOp); 21606384Sgblack@eecs.umich.edu 0x7: mulq_rs_w({{ 21616384Sgblack@eecs.umich.edu Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_W, 21626384Sgblack@eecs.umich.edu SATURATE, ROUND, &dspctl); 21636384Sgblack@eecs.umich.edu }}, IntMultOp); 21644661Sksewell@umich.edu } 21654661Sksewell@umich.edu } 21662061SN/A } 21672101SN/A } 21682061SN/A 21692101SN/A //Table A-10 MIPS32 BSHFL Encoding of sa Field 21702101SN/A 0x4: decode SA { 21712046SN/A format BasicOp { 21726384Sgblack@eecs.umich.edu 0x02: wsbh({{ 21736384Sgblack@eecs.umich.edu Rd.uw = Rt.uw<23:16> << 24 | 21746384Sgblack@eecs.umich.edu Rt.uw<31:24> << 16 | 21756384Sgblack@eecs.umich.edu Rt.uw<7:0> << 8 | 21766384Sgblack@eecs.umich.edu Rt.uw<15:8>; 21772686Sksewell@umich.edu }}); 21782742Sksewell@umich.edu 0x10: seb({{ Rd.sw = Rt.sb; }}); 21792742Sksewell@umich.edu 0x18: seh({{ Rd.sw = Rt.sh; }}); 21802046SN/A } 21812101SN/A } 21822043SN/A 21832101SN/A 0x6: decode FUNCTION_LO { 21844661Sksewell@umich.edu 21856384Sgblack@eecs.umich.edu //Table 5-10 MIPS32 DPAQ.W.PH Encoding of the op Field 21866384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 21874661Sksewell@umich.edu 0x0: decode OP_HI { 21884661Sksewell@umich.edu 0x0: decode OP_LO { 21894661Sksewell@umich.edu format DspHiLoOp { 21906384Sgblack@eecs.umich.edu 0x0: dpa_w_ph({{ 21916384Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 21926384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_L); 21936384Sgblack@eecs.umich.edu }}, IntMultOp); 21946384Sgblack@eecs.umich.edu 0x1: dps_w_ph({{ 21956384Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 21966384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_L); 21976384Sgblack@eecs.umich.edu }}, IntMultOp); 21986384Sgblack@eecs.umich.edu 0x2: mulsa_w_ph({{ 21996384Sgblack@eecs.umich.edu dspac = dspMulsa(dspac, Rs.sw, Rt.sw, 22006384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH ); 22016384Sgblack@eecs.umich.edu }}, IntMultOp); 22026384Sgblack@eecs.umich.edu 0x3: dpau_h_qbl({{ 22036384Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 22046384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_L); 22056384Sgblack@eecs.umich.edu }}, IntMultOp); 22066384Sgblack@eecs.umich.edu 0x4: dpaq_s_w_ph({{ 22076384Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 22086384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22096384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 22106384Sgblack@eecs.umich.edu MODE_L, &dspctl); 22116384Sgblack@eecs.umich.edu }}, IntMultOp); 22126384Sgblack@eecs.umich.edu 0x5: dpsq_s_w_ph({{ 22136384Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 22146384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22156384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 22166384Sgblack@eecs.umich.edu MODE_L, &dspctl); 22176384Sgblack@eecs.umich.edu }}, IntMultOp); 22186384Sgblack@eecs.umich.edu 0x6: mulsaq_s_w_ph({{ 22196384Sgblack@eecs.umich.edu dspac = dspMulsaq(dspac, Rs.sw, Rt.sw, 22206384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22216384Sgblack@eecs.umich.edu &dspctl); 22226384Sgblack@eecs.umich.edu }}, IntMultOp); 22236384Sgblack@eecs.umich.edu 0x7: dpau_h_qbr({{ 22246384Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 22256384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_R); 22266384Sgblack@eecs.umich.edu }}, IntMultOp); 22274661Sksewell@umich.edu } 22284661Sksewell@umich.edu } 22294661Sksewell@umich.edu 0x1: decode OP_LO { 22304661Sksewell@umich.edu format DspHiLoOp { 22316384Sgblack@eecs.umich.edu 0x0: dpax_w_ph({{ 22326384Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 22336384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_X); 22346384Sgblack@eecs.umich.edu }}, IntMultOp); 22356384Sgblack@eecs.umich.edu 0x1: dpsx_w_ph({{ 22366384Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 22376384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_X); 22386384Sgblack@eecs.umich.edu }}, IntMultOp); 22396384Sgblack@eecs.umich.edu 0x3: dpsu_h_qbl({{ 22406384Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 22416384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_L); 22426384Sgblack@eecs.umich.edu }}, IntMultOp); 22436384Sgblack@eecs.umich.edu 0x4: dpaq_sa_l_w({{ 22446384Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 22456384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_W, 22466384Sgblack@eecs.umich.edu SIMD_FMT_L, SATURATE, 22476384Sgblack@eecs.umich.edu MODE_L, &dspctl); 22486384Sgblack@eecs.umich.edu }}, IntMultOp); 22496384Sgblack@eecs.umich.edu 0x5: dpsq_sa_l_w({{ 22506384Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 22516384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_W, 22526384Sgblack@eecs.umich.edu SIMD_FMT_L, SATURATE, 22536384Sgblack@eecs.umich.edu MODE_L, &dspctl); 22546384Sgblack@eecs.umich.edu }}, IntMultOp); 22556384Sgblack@eecs.umich.edu 0x7: dpsu_h_qbr({{ 22566384Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 22576384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_R); 22586384Sgblack@eecs.umich.edu }}, IntMultOp); 22594661Sksewell@umich.edu } 22604661Sksewell@umich.edu } 22614661Sksewell@umich.edu 0x2: decode OP_LO { 22624661Sksewell@umich.edu format DspHiLoOp { 22636384Sgblack@eecs.umich.edu 0x0: maq_sa_w_phl({{ 22646384Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs.uw, Rt.uw, 22656384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22666384Sgblack@eecs.umich.edu MODE_L, SATURATE, &dspctl); 22676384Sgblack@eecs.umich.edu }}, IntMultOp); 22686384Sgblack@eecs.umich.edu 0x2: maq_sa_w_phr({{ 22696384Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs.uw, Rt.uw, 22706384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22716384Sgblack@eecs.umich.edu MODE_R, SATURATE, &dspctl); 22726384Sgblack@eecs.umich.edu }}, IntMultOp); 22736384Sgblack@eecs.umich.edu 0x4: maq_s_w_phl({{ 22746384Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs.uw, Rt.uw, 22756384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22766384Sgblack@eecs.umich.edu MODE_L, NOSATURATE, &dspctl); 22776384Sgblack@eecs.umich.edu }}, IntMultOp); 22786384Sgblack@eecs.umich.edu 0x6: maq_s_w_phr({{ 22796384Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs.uw, Rt.uw, 22806384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22816384Sgblack@eecs.umich.edu MODE_R, NOSATURATE, &dspctl); 22826384Sgblack@eecs.umich.edu }}, IntMultOp); 22834661Sksewell@umich.edu } 22844661Sksewell@umich.edu } 22854661Sksewell@umich.edu 0x3: decode OP_LO { 22864661Sksewell@umich.edu format DspHiLoOp { 22876384Sgblack@eecs.umich.edu 0x0: dpaqx_s_w_ph({{ 22886384Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 22896384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22906384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 22916384Sgblack@eecs.umich.edu MODE_X, &dspctl); 22926384Sgblack@eecs.umich.edu }}, IntMultOp); 22936384Sgblack@eecs.umich.edu 0x1: dpsqx_s_w_ph({{ 22946384Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 22956384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22966384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 22976384Sgblack@eecs.umich.edu MODE_X, &dspctl); 22986384Sgblack@eecs.umich.edu }}, IntMultOp); 22996384Sgblack@eecs.umich.edu 0x2: dpaqx_sa_w_ph({{ 23006384Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 23016384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23026384Sgblack@eecs.umich.edu SIMD_FMT_W, SATURATE, 23036384Sgblack@eecs.umich.edu MODE_X, &dspctl); 23046384Sgblack@eecs.umich.edu }}, IntMultOp); 23056384Sgblack@eecs.umich.edu 0x3: dpsqx_sa_w_ph({{ 23066384Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 23076384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23086384Sgblack@eecs.umich.edu SIMD_FMT_W, SATURATE, 23096384Sgblack@eecs.umich.edu MODE_X, &dspctl); 23106384Sgblack@eecs.umich.edu }}, IntMultOp); 23114661Sksewell@umich.edu } 23124661Sksewell@umich.edu } 23134661Sksewell@umich.edu } 23144661Sksewell@umich.edu 23154661Sksewell@umich.edu //Table 3.3 MIPS32 APPEND Encoding of the op Field 23164661Sksewell@umich.edu 0x1: decode OP_HI { 23174661Sksewell@umich.edu 0x0: decode OP_LO { 23184661Sksewell@umich.edu format IntOp { 23196384Sgblack@eecs.umich.edu 0x0: append({{ 23206384Sgblack@eecs.umich.edu Rt.uw = (Rt.uw << RD) | bits(Rs.uw, RD - 1, 0); 23216384Sgblack@eecs.umich.edu }}); 23226384Sgblack@eecs.umich.edu 0x1: prepend({{ 23236384Sgblack@eecs.umich.edu Rt.uw = (Rt.uw >> RD) | 23246384Sgblack@eecs.umich.edu (bits(Rs.uw, RD - 1, 0) << (32 - RD)); 23256384Sgblack@eecs.umich.edu }}); 23264661Sksewell@umich.edu } 23274661Sksewell@umich.edu } 23284661Sksewell@umich.edu 0x2: decode OP_LO { 23294661Sksewell@umich.edu format IntOp { 23306384Sgblack@eecs.umich.edu 0x0: balign({{ 23316384Sgblack@eecs.umich.edu Rt.uw = (Rt.uw << (8 * BP)) | 23326384Sgblack@eecs.umich.edu (Rs.uw >> (8 * (4 - BP))); 23336384Sgblack@eecs.umich.edu }}); 23344661Sksewell@umich.edu } 23354661Sksewell@umich.edu } 23364661Sksewell@umich.edu } 23374661Sksewell@umich.edu 23382101SN/A } 23394661Sksewell@umich.edu 0x7: decode FUNCTION_LO { 23404661Sksewell@umich.edu 23416384Sgblack@eecs.umich.edu //Table 5-11 MIPS32 EXTR.W Encoding of the op Field 23426384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 23434661Sksewell@umich.edu 0x0: decode OP_HI { 23444661Sksewell@umich.edu 0x0: decode OP_LO { 23454661Sksewell@umich.edu format DspHiLoOp { 23466384Sgblack@eecs.umich.edu 0x0: extr_w({{ 23476384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, RS, 23486384Sgblack@eecs.umich.edu NOROUND, NOSATURATE, &dspctl); 23496384Sgblack@eecs.umich.edu }}); 23506384Sgblack@eecs.umich.edu 0x1: extrv_w({{ 23516384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, Rs.uw, 23526384Sgblack@eecs.umich.edu NOROUND, NOSATURATE, &dspctl); 23536384Sgblack@eecs.umich.edu }}); 23546384Sgblack@eecs.umich.edu 0x2: extp({{ 23556384Sgblack@eecs.umich.edu Rt.uw = dspExtp(dspac, RS, &dspctl); 23566384Sgblack@eecs.umich.edu }}); 23576384Sgblack@eecs.umich.edu 0x3: extpv({{ 23586384Sgblack@eecs.umich.edu Rt.uw = dspExtp(dspac, Rs.uw, &dspctl); 23596384Sgblack@eecs.umich.edu }}); 23606384Sgblack@eecs.umich.edu 0x4: extr_r_w({{ 23616384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, RS, 23626384Sgblack@eecs.umich.edu ROUND, NOSATURATE, &dspctl); 23636384Sgblack@eecs.umich.edu }}); 23646384Sgblack@eecs.umich.edu 0x5: extrv_r_w({{ 23656384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, Rs.uw, 23666384Sgblack@eecs.umich.edu ROUND, NOSATURATE, &dspctl); 23676384Sgblack@eecs.umich.edu }}); 23686384Sgblack@eecs.umich.edu 0x6: extr_rs_w({{ 23696384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, RS, 23706384Sgblack@eecs.umich.edu ROUND, SATURATE, &dspctl); 23716384Sgblack@eecs.umich.edu }}); 23726384Sgblack@eecs.umich.edu 0x7: extrv_rs_w({{ 23736384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, Rs.uw, 23746384Sgblack@eecs.umich.edu ROUND, SATURATE, &dspctl); 23756384Sgblack@eecs.umich.edu }}); 23764661Sksewell@umich.edu } 23774661Sksewell@umich.edu } 23784661Sksewell@umich.edu 0x1: decode OP_LO { 23794661Sksewell@umich.edu format DspHiLoOp { 23806384Sgblack@eecs.umich.edu 0x2: extpdp({{ 23816384Sgblack@eecs.umich.edu Rt.uw = dspExtpd(dspac, RS, &dspctl); 23826384Sgblack@eecs.umich.edu }}); 23836384Sgblack@eecs.umich.edu 0x3: extpdpv({{ 23846384Sgblack@eecs.umich.edu Rt.uw = dspExtpd(dspac, Rs.uw, &dspctl); 23856384Sgblack@eecs.umich.edu }}); 23866384Sgblack@eecs.umich.edu 0x6: extr_s_h({{ 23876384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_PH, RS, 23886384Sgblack@eecs.umich.edu NOROUND, SATURATE, &dspctl); 23896384Sgblack@eecs.umich.edu }}); 23906384Sgblack@eecs.umich.edu 0x7: extrv_s_h({{ 23916384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_PH, Rs.uw, 23926384Sgblack@eecs.umich.edu NOROUND, SATURATE, &dspctl); 23936384Sgblack@eecs.umich.edu }}); 23944661Sksewell@umich.edu } 23954661Sksewell@umich.edu } 23964661Sksewell@umich.edu 0x2: decode OP_LO { 23974661Sksewell@umich.edu format DspIntOp { 23986384Sgblack@eecs.umich.edu 0x2: rddsp({{ 23996384Sgblack@eecs.umich.edu Rd.uw = readDSPControl(&dspctl, RDDSPMASK); 24006384Sgblack@eecs.umich.edu }}); 24016384Sgblack@eecs.umich.edu 0x3: wrdsp({{ 24026384Sgblack@eecs.umich.edu writeDSPControl(&dspctl, Rs.uw, WRDSPMASK); 24036384Sgblack@eecs.umich.edu }}); 24044661Sksewell@umich.edu } 24054661Sksewell@umich.edu } 24064661Sksewell@umich.edu 0x3: decode OP_LO { 24074661Sksewell@umich.edu format DspHiLoOp { 24086384Sgblack@eecs.umich.edu 0x2: shilo({{ 24096384Sgblack@eecs.umich.edu if (sext<6>(HILOSA) < 0) { 24106384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac << 24116384Sgblack@eecs.umich.edu -sext<6>(HILOSA); 24126384Sgblack@eecs.umich.edu } else { 24136384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac >> 24146384Sgblack@eecs.umich.edu sext<6>(HILOSA); 24156384Sgblack@eecs.umich.edu } 24166384Sgblack@eecs.umich.edu }}); 24176384Sgblack@eecs.umich.edu 0x3: shilov({{ 24186384Sgblack@eecs.umich.edu if (sext<6>(Rs.sw<5:0>) < 0) { 24196384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac << 24206384Sgblack@eecs.umich.edu -sext<6>(Rs.sw<5:0>); 24216384Sgblack@eecs.umich.edu } else { 24226384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac >> 24236384Sgblack@eecs.umich.edu sext<6>(Rs.sw<5:0>); 24246384Sgblack@eecs.umich.edu } 24256384Sgblack@eecs.umich.edu }}); 24266384Sgblack@eecs.umich.edu 0x7: mthlip({{ 24276384Sgblack@eecs.umich.edu dspac = dspac << 32; 24286384Sgblack@eecs.umich.edu dspac |= Rs.uw; 24296384Sgblack@eecs.umich.edu dspctl = insertBits(dspctl, 5, 0, 24306384Sgblack@eecs.umich.edu dspctl<5:0> + 32); 24316384Sgblack@eecs.umich.edu }}); 24324661Sksewell@umich.edu } 24334661Sksewell@umich.edu } 24344661Sksewell@umich.edu } 24358564Sgblack@eecs.umich.edu 0x3: decode OP default FailUnimpl::rdhwr() { 24368564Sgblack@eecs.umich.edu 0x0: decode FULL_SYSTEM { 24378564Sgblack@eecs.umich.edu 0: decode RD { 24388564Sgblack@eecs.umich.edu 29: BasicOp::rdhwr_se({{ Rt = TpValue; }}); 24398564Sgblack@eecs.umich.edu } 24406810Sgblack@eecs.umich.edu } 24415222Sksewell@umich.edu } 24424661Sksewell@umich.edu } 24432043SN/A } 24442084SN/A } 24452024SN/A 24462686Sksewell@umich.edu 0x4: decode OPCODE_LO { 24472124SN/A format LoadMemory { 24487708Sgblack@eecs.umich.edu 0x0: lb({{ Rt.sw = Mem.sb; }}); 24497708Sgblack@eecs.umich.edu 0x1: lh({{ Rt.sw = Mem.sh; }}); 24502479SN/A 0x3: lw({{ Rt.sw = Mem.sw; }}); 24517708Sgblack@eecs.umich.edu 0x4: lbu({{ Rt.uw = Mem.ub;}}); 24527708Sgblack@eecs.umich.edu 0x5: lhu({{ Rt.uw = Mem.uh; }}); 24532686Sksewell@umich.edu } 24542495SN/A 24552686Sksewell@umich.edu format LoadUnalignedMemory { 24566384Sgblack@eecs.umich.edu 0x2: lwl({{ 24576384Sgblack@eecs.umich.edu uint32_t mem_shift = 24 - (8 * byte_offset); 24586384Sgblack@eecs.umich.edu Rt.uw = mem_word << mem_shift | (Rt.uw & mask(mem_shift)); 24596384Sgblack@eecs.umich.edu }}); 24606384Sgblack@eecs.umich.edu 0x6: lwr({{ 24616384Sgblack@eecs.umich.edu uint32_t mem_shift = 8 * byte_offset; 24626384Sgblack@eecs.umich.edu Rt.uw = (Rt.uw & (mask(mem_shift) << (32 - mem_shift))) | 24636384Sgblack@eecs.umich.edu (mem_word >> mem_shift); 24646384Sgblack@eecs.umich.edu }}); 24656384Sgblack@eecs.umich.edu } 24662084SN/A } 24672024SN/A 24682686Sksewell@umich.edu 0x5: decode OPCODE_LO { 24692124SN/A format StoreMemory { 24707708Sgblack@eecs.umich.edu 0x0: sb({{ Mem.ub = Rt<7:0>; }}); 24717708Sgblack@eecs.umich.edu 0x1: sh({{ Mem.uh = Rt<15:0>; }}); 24722479SN/A 0x3: sw({{ Mem.uw = Rt<31:0>; }}); 24732084SN/A } 24742024SN/A 24752686Sksewell@umich.edu format StoreUnalignedMemory { 24766384Sgblack@eecs.umich.edu 0x2: swl({{ 24776384Sgblack@eecs.umich.edu uint32_t reg_shift = 24 - (8 * byte_offset); 24786384Sgblack@eecs.umich.edu uint32_t mem_shift = 32 - reg_shift; 24796384Sgblack@eecs.umich.edu mem_word = (mem_word & (mask(reg_shift) << mem_shift)) | 24806384Sgblack@eecs.umich.edu (Rt.uw >> reg_shift); 24816384Sgblack@eecs.umich.edu }}); 24826384Sgblack@eecs.umich.edu 0x6: swr({{ 24836384Sgblack@eecs.umich.edu uint32_t reg_shift = 8 * byte_offset; 24846384Sgblack@eecs.umich.edu mem_word = Rt.uw << reg_shift | 24856384Sgblack@eecs.umich.edu (mem_word & (mask(reg_shift))); 24866384Sgblack@eecs.umich.edu }}); 24872084SN/A } 24885222Sksewell@umich.edu format CP0Control { 24895222Sksewell@umich.edu 0x7: cache({{ 24905254Sksewell@umich.edu //Addr CacheEA = Rs.uw + OFFSET; 24916384Sgblack@eecs.umich.edu //fault = xc->CacheOp((uint8_t)CACHE_OP,(Addr) CacheEA); 24926384Sgblack@eecs.umich.edu }}); 24935222Sksewell@umich.edu } 24942084SN/A } 24952024SN/A 24962686Sksewell@umich.edu 0x6: decode OPCODE_LO { 24972686Sksewell@umich.edu format LoadMemory { 24986076Sgblack@eecs.umich.edu 0x0: ll({{ Rt.uw = Mem.uw; }}, mem_flags=LLSC); 24992686Sksewell@umich.edu 0x1: lwc1({{ Ft.uw = Mem.uw; }}); 25002573SN/A 0x5: ldc1({{ Ft.ud = Mem.ud; }}); 25012084SN/A } 25025222Sksewell@umich.edu 0x2: CP2Unimpl::lwc2(); 25035222Sksewell@umich.edu 0x6: CP2Unimpl::ldc2(); 25042686Sksewell@umich.edu 0x3: Prefetch::pref(); 25052084SN/A } 25062024SN/A 25072239SN/A 25082686Sksewell@umich.edu 0x7: decode OPCODE_LO { 25096384Sgblack@eecs.umich.edu 0x0: StoreCond::sc({{ Mem.uw = Rt.uw; }}, 25102686Sksewell@umich.edu {{ uint64_t tmp = write_result; 25112686Sksewell@umich.edu Rt.uw = (tmp == 0 || tmp == 1) ? tmp : Rt.uw; 25126384Sgblack@eecs.umich.edu }}, mem_flags=LLSC, 25136384Sgblack@eecs.umich.edu inst_flags = IsStoreConditional); 25142686Sksewell@umich.edu format StoreMemory { 25156384Sgblack@eecs.umich.edu 0x1: swc1({{ Mem.uw = Ft.uw; }}); 25166384Sgblack@eecs.umich.edu 0x5: sdc1({{ Mem.ud = Ft.ud; }}); 25172084SN/A } 25185222Sksewell@umich.edu 0x2: CP2Unimpl::swc2(); 25195222Sksewell@umich.edu 0x6: CP2Unimpl::sdc2(); 25202027SN/A } 25212024SN/A} 25222022SN/A 25232027SN/A 2524