decoder.isa revision 7952
12686Sksewell@umich.edu// -*- mode:c++ -*- 22100SN/A 35254Sksewell@umich.edu// Copyright (c) 2007 MIPS Technologies, Inc. 45254Sksewell@umich.edu// All rights reserved. 55254Sksewell@umich.edu// 65254Sksewell@umich.edu// Redistribution and use in source and binary forms, with or without 75254Sksewell@umich.edu// modification, are permitted provided that the following conditions are 85254Sksewell@umich.edu// met: redistributions of source code must retain the above copyright 95254Sksewell@umich.edu// notice, this list of conditions and the following disclaimer; 105254Sksewell@umich.edu// redistributions in binary form must reproduce the above copyright 115254Sksewell@umich.edu// notice, this list of conditions and the following disclaimer in the 125254Sksewell@umich.edu// documentation and/or other materials provided with the distribution; 135254Sksewell@umich.edu// neither the name of the copyright holders nor the names of its 145254Sksewell@umich.edu// contributors may be used to endorse or promote products derived from 155254Sksewell@umich.edu// this software without specific prior written permission. 165254Sksewell@umich.edu// 175254Sksewell@umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 185254Sksewell@umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 195254Sksewell@umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 205254Sksewell@umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 215254Sksewell@umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 225254Sksewell@umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 235254Sksewell@umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 245254Sksewell@umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 255254Sksewell@umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 265254Sksewell@umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 275254Sksewell@umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 285254Sksewell@umich.edu// 295254Sksewell@umich.edu// Authors: Korey Sewell 305254Sksewell@umich.edu// Brett Miller 315254Sksewell@umich.edu// Jaidev Patwardhan 322706Sksewell@umich.edu 332022SN/A//////////////////////////////////////////////////////////////////// 342022SN/A// 352043SN/A// The actual MIPS32 ISA decoder 362024SN/A// ----------------------------- 372024SN/A// The following instructions are specified in the MIPS32 ISA 382043SN/A// Specification. Decoding closely follows the style specified 392686Sksewell@umich.edu// in the MIPS32 ISA specification document starting with Table 404661Sksewell@umich.edu// A-2 (document available @ http://www.mips.com) 412022SN/A// 422083SN/Adecode OPCODE_HI default Unknown::unknown() { 432686Sksewell@umich.edu //Table A-2 442101SN/A 0x0: decode OPCODE_LO { 452043SN/A 0x0: decode FUNCTION_HI { 462043SN/A 0x0: decode FUNCTION_LO { 472101SN/A 0x1: decode MOVCI { 482101SN/A format BasicOp { 496384Sgblack@eecs.umich.edu 0: movf({{ 506384Sgblack@eecs.umich.edu Rd = (getCondCode(FCSR, CC) == 0) ? Rd : Rs; 516384Sgblack@eecs.umich.edu }}); 526384Sgblack@eecs.umich.edu 1: movt({{ 536384Sgblack@eecs.umich.edu Rd = (getCondCode(FCSR, CC) == 1) ? Rd : Rs; 546384Sgblack@eecs.umich.edu }}); 552101SN/A } 562101SN/A } 572101SN/A 582046SN/A format BasicOp { 592686Sksewell@umich.edu //Table A-3 Note: "Specific encodings of the rd, rs, and 602686Sksewell@umich.edu //rt fields are used to distinguish SLL, SSNOP, and EHB 612686Sksewell@umich.edu //functions 622470SN/A 0x0: decode RS { 632686Sksewell@umich.edu 0x0: decode RT_RD { 644661Sksewell@umich.edu 0x0: decode SA default Nop::nop() { 655222Sksewell@umich.edu 0x1: ssnop({{;}}); 665222Sksewell@umich.edu 0x3: ehb({{;}}); 672686Sksewell@umich.edu } 682686Sksewell@umich.edu default: sll({{ Rd = Rt.uw << SA; }}); 692470SN/A } 702241SN/A } 712101SN/A 722495SN/A 0x2: decode RS_SRL { 732495SN/A 0x0:decode SRL { 742495SN/A 0: srl({{ Rd = Rt.uw >> SA; }}); 752101SN/A 766384Sgblack@eecs.umich.edu //Hardcoded assuming 32-bit ISA, 776384Sgblack@eecs.umich.edu //probably need parameter here 786384Sgblack@eecs.umich.edu 1: rotr({{ 796384Sgblack@eecs.umich.edu Rd = (Rt.uw << (32 - SA)) | (Rt.uw >> SA); 806384Sgblack@eecs.umich.edu }}); 812495SN/A } 822101SN/A } 832101SN/A 842495SN/A 0x3: decode RS { 852495SN/A 0x0: sra({{ 862495SN/A uint32_t temp = Rt >> SA; 872495SN/A if ( (Rt & 0x80000000) > 0 ) { 882495SN/A uint32_t mask = 0x80000000; 892495SN/A for(int i=0; i < SA; i++) { 902495SN/A temp |= mask; 912495SN/A mask = mask >> 1; 922495SN/A } 932495SN/A } 942495SN/A Rd = temp; 952495SN/A }}); 962495SN/A } 972101SN/A 982101SN/A 0x4: sllv({{ Rd = Rt.uw << Rs<4:0>; }}); 992101SN/A 1002101SN/A 0x6: decode SRLV { 1012101SN/A 0: srlv({{ Rd = Rt.uw >> Rs<4:0>; }}); 1022101SN/A 1036384Sgblack@eecs.umich.edu //Hardcoded assuming 32-bit ISA, 1046384Sgblack@eecs.umich.edu //probably need parameter here 1056384Sgblack@eecs.umich.edu 1: rotrv({{ 1066384Sgblack@eecs.umich.edu Rd = (Rt.uw << (32 - Rs<4:0>)) | 1076384Sgblack@eecs.umich.edu (Rt.uw >> Rs<4:0>); 1086384Sgblack@eecs.umich.edu }}); 1092101SN/A } 1102101SN/A 1112495SN/A 0x7: srav({{ 1122495SN/A int shift_amt = Rs<4:0>; 1132495SN/A 1142495SN/A uint32_t temp = Rt >> shift_amt; 1152495SN/A 1166384Sgblack@eecs.umich.edu if ((Rt & 0x80000000) > 0) { 1176384Sgblack@eecs.umich.edu uint32_t mask = 0x80000000; 1186384Sgblack@eecs.umich.edu for (int i = 0; i < shift_amt; i++) { 1196384Sgblack@eecs.umich.edu temp |= mask; 1206384Sgblack@eecs.umich.edu mask = mask >> 1; 1212495SN/A } 1226384Sgblack@eecs.umich.edu } 1232495SN/A Rd = temp; 1242495SN/A }}); 1252043SN/A } 1262043SN/A } 1272025SN/A 1282043SN/A 0x1: decode FUNCTION_LO { 1292686Sksewell@umich.edu //Table A-3 Note: "Specific encodings of the hint field are 1302686Sksewell@umich.edu //used to distinguish JR from JR.HB and JALR from JALR.HB" 1312123SN/A format Jump { 1322101SN/A 0x0: decode HINT { 1336376Sgblack@eecs.umich.edu 0x1: jr_hb({{ 1346376Sgblack@eecs.umich.edu Config1Reg config1 = Config1; 1356376Sgblack@eecs.umich.edu if (config1.ca == 0) { 1367792Sgblack@eecs.umich.edu NNPC = Rs; 1376376Sgblack@eecs.umich.edu } else { 1386376Sgblack@eecs.umich.edu panic("MIPS16e not supported\n"); 1396376Sgblack@eecs.umich.edu } 1406376Sgblack@eecs.umich.edu }}, IsReturn, ClearHazards); 1416376Sgblack@eecs.umich.edu default: jr({{ 1426376Sgblack@eecs.umich.edu Config1Reg config1 = Config1; 1436376Sgblack@eecs.umich.edu if (config1.ca == 0) { 1447792Sgblack@eecs.umich.edu NNPC = Rs; 1456376Sgblack@eecs.umich.edu } else { 1466376Sgblack@eecs.umich.edu panic("MIPS16e not supported\n"); 1476376Sgblack@eecs.umich.edu } 1486376Sgblack@eecs.umich.edu }}, IsReturn); 1492101SN/A } 1502042SN/A 1512101SN/A 0x1: decode HINT { 1527720Sgblack@eecs.umich.edu 0x1: jalr_hb({{ 1537792Sgblack@eecs.umich.edu Rd = NNPC; 1547792Sgblack@eecs.umich.edu NNPC = Rs; 1557720Sgblack@eecs.umich.edu }}, IsCall, ClearHazards); 1567720Sgblack@eecs.umich.edu default: jalr({{ 1577792Sgblack@eecs.umich.edu Rd = NNPC; 1587792Sgblack@eecs.umich.edu NNPC = Rs; 1597720Sgblack@eecs.umich.edu }}, IsCall); 1602101SN/A } 1612101SN/A } 1622042SN/A 1632101SN/A format BasicOp { 1642686Sksewell@umich.edu 0x2: movz({{ Rd = (Rt == 0) ? Rs : Rd; }}); 1652686Sksewell@umich.edu 0x3: movn({{ Rd = (Rt != 0) ? Rs : Rd; }}); 1665222Sksewell@umich.edu#if FULL_SYSTEM 1676384Sgblack@eecs.umich.edu 0x4: syscall({{ fault = new SystemCallFault(); }}); 1685222Sksewell@umich.edu#else 1692965Sksewell@umich.edu 0x4: syscall({{ xc->syscall(R2); }}, 1706037Sksewell@umich.edu IsSerializeAfter, IsNonSpeculative); 1715222Sksewell@umich.edu#endif 1722686Sksewell@umich.edu 0x7: sync({{ ; }}, IsMemBarrier); 1735222Sksewell@umich.edu 0x5: break({{fault = new BreakpointFault();}}); 1742101SN/A } 1752083SN/A 1762043SN/A } 1772025SN/A 1782043SN/A 0x2: decode FUNCTION_LO { 1796384Sgblack@eecs.umich.edu 0x0: HiLoRsSelOp::mfhi({{ Rd = HI_RS_SEL; }}, 1806384Sgblack@eecs.umich.edu IntMultOp, IsIprAccess); 1814661Sksewell@umich.edu 0x1: HiLoRdSelOp::mthi({{ HI_RD_SEL = Rs; }}); 1826384Sgblack@eecs.umich.edu 0x2: HiLoRsSelOp::mflo({{ Rd = LO_RS_SEL; }}, 1836384Sgblack@eecs.umich.edu IntMultOp, IsIprAccess); 1844661Sksewell@umich.edu 0x3: HiLoRdSelOp::mtlo({{ LO_RD_SEL = Rs; }}); 1852083SN/A } 1862025SN/A 1872043SN/A 0x3: decode FUNCTION_LO { 1884661Sksewell@umich.edu format HiLoRdSelValOp { 1895222Sksewell@umich.edu 0x0: mult({{ val = Rs.sd * Rt.sd; }}, IntMultOp); 1905222Sksewell@umich.edu 0x1: multu({{ val = Rs.ud * Rt.ud; }}, IntMultOp); 1914661Sksewell@umich.edu } 1924661Sksewell@umich.edu 1932686Sksewell@umich.edu format HiLoOp { 1946384Sgblack@eecs.umich.edu 0x2: div({{ 1956384Sgblack@eecs.umich.edu if (Rt.sd != 0) { 1966384Sgblack@eecs.umich.edu HI0 = Rs.sd % Rt.sd; 1976384Sgblack@eecs.umich.edu LO0 = Rs.sd / Rt.sd; 1986384Sgblack@eecs.umich.edu } 1995222Sksewell@umich.edu }}, IntDivOp); 2005222Sksewell@umich.edu 2016384Sgblack@eecs.umich.edu 0x3: divu({{ 2026384Sgblack@eecs.umich.edu if (Rt.ud != 0) { 2036384Sgblack@eecs.umich.edu HI0 = Rs.ud % Rt.ud; 2046384Sgblack@eecs.umich.edu LO0 = Rs.ud / Rt.ud; 2056384Sgblack@eecs.umich.edu } 2065222Sksewell@umich.edu }}, IntDivOp); 2072101SN/A } 2082084SN/A } 2092025SN/A 2102495SN/A 0x4: decode HINT { 2112495SN/A 0x0: decode FUNCTION_LO { 2122495SN/A format IntOp { 2136384Sgblack@eecs.umich.edu 0x0: add({{ 2146384Sgblack@eecs.umich.edu /* More complicated since an ADD can cause 2156384Sgblack@eecs.umich.edu an arithmetic overflow exception */ 2166384Sgblack@eecs.umich.edu int64_t Src1 = Rs.sw; 2176384Sgblack@eecs.umich.edu int64_t Src2 = Rt.sw; 2186384Sgblack@eecs.umich.edu int64_t temp_result; 2196384Sgblack@eecs.umich.edu#if FULL_SYSTEM 2206384Sgblack@eecs.umich.edu if (((Src1 >> 31) & 1) == 1) 2216384Sgblack@eecs.umich.edu Src1 |= 0x100000000LL; 2225222Sksewell@umich.edu#endif 2236384Sgblack@eecs.umich.edu temp_result = Src1 + Src2; 2246384Sgblack@eecs.umich.edu#if FULL_SYSTEM 2256384Sgblack@eecs.umich.edu if (bits(temp_result, 31) == 2266384Sgblack@eecs.umich.edu bits(temp_result, 32)) { 2275222Sksewell@umich.edu#endif 2286384Sgblack@eecs.umich.edu Rd.sw = temp_result; 2296384Sgblack@eecs.umich.edu#if FULL_SYSTEM 2306384Sgblack@eecs.umich.edu } else { 2316384Sgblack@eecs.umich.edu fault = new ArithmeticFault(); 2326384Sgblack@eecs.umich.edu } 2335222Sksewell@umich.edu#endif 2346384Sgblack@eecs.umich.edu }}); 2352495SN/A 0x1: addu({{ Rd.sw = Rs.sw + Rt.sw;}}); 2365222Sksewell@umich.edu 0x2: sub({{ 2376384Sgblack@eecs.umich.edu /* More complicated since an SUB can cause 2386384Sgblack@eecs.umich.edu an arithmetic overflow exception */ 2396384Sgblack@eecs.umich.edu int64_t Src1 = Rs.sw; 2406384Sgblack@eecs.umich.edu int64_t Src2 = Rt.sw; 2416384Sgblack@eecs.umich.edu int64_t temp_result = Src1 - Src2; 2425222Sksewell@umich.edu#if FULL_SYSTEM 2436384Sgblack@eecs.umich.edu if (bits(temp_result, 31) == 2446384Sgblack@eecs.umich.edu bits(temp_result, 32)) { 2455222Sksewell@umich.edu#endif 2466384Sgblack@eecs.umich.edu Rd.sw = temp_result; 2475222Sksewell@umich.edu#if FULL_SYSTEM 2486384Sgblack@eecs.umich.edu } else { 2496384Sgblack@eecs.umich.edu fault = new ArithmeticFault(); 2506384Sgblack@eecs.umich.edu } 2515222Sksewell@umich.edu#endif 2526384Sgblack@eecs.umich.edu }}); 2536384Sgblack@eecs.umich.edu 0x3: subu({{ Rd.sw = Rs.sw - Rt.sw; }}); 2546384Sgblack@eecs.umich.edu 0x4: and({{ Rd = Rs & Rt; }}); 2556384Sgblack@eecs.umich.edu 0x5: or({{ Rd = Rs | Rt; }}); 2566384Sgblack@eecs.umich.edu 0x6: xor({{ Rd = Rs ^ Rt; }}); 2576384Sgblack@eecs.umich.edu 0x7: nor({{ Rd = ~(Rs | Rt); }}); 2582495SN/A } 2592101SN/A } 2602043SN/A } 2612025SN/A 2622495SN/A 0x5: decode HINT { 2632495SN/A 0x0: decode FUNCTION_LO { 2642495SN/A format IntOp{ 2656384Sgblack@eecs.umich.edu 0x2: slt({{ Rd.sw = (Rs.sw < Rt.sw) ? 1 : 0 }}); 2666384Sgblack@eecs.umich.edu 0x3: sltu({{ Rd.uw = (Rs.uw < Rt.uw) ? 1 : 0 }}); 2672495SN/A } 2682101SN/A } 2692084SN/A } 2702024SN/A 2712043SN/A 0x6: decode FUNCTION_LO { 2722239SN/A format Trap { 2732239SN/A 0x0: tge({{ cond = (Rs.sw >= Rt.sw); }}); 2742101SN/A 0x1: tgeu({{ cond = (Rs.uw >= Rt.uw); }}); 2752101SN/A 0x2: tlt({{ cond = (Rs.sw < Rt.sw); }}); 2765222Sksewell@umich.edu 0x3: tltu({{ cond = (Rs.uw < Rt.uw); }}); 2772101SN/A 0x4: teq({{ cond = (Rs.sw == Rt.sw); }}); 2782101SN/A 0x6: tne({{ cond = (Rs.sw != Rt.sw); }}); 2792101SN/A } 2802043SN/A } 2812043SN/A } 2822025SN/A 2832043SN/A 0x1: decode REGIMM_HI { 2842043SN/A 0x0: decode REGIMM_LO { 2852101SN/A format Branch { 2862101SN/A 0x0: bltz({{ cond = (Rs.sw < 0); }}); 2872101SN/A 0x1: bgez({{ cond = (Rs.sw >= 0); }}); 2882686Sksewell@umich.edu 0x2: bltzl({{ cond = (Rs.sw < 0); }}, Likely); 2892686Sksewell@umich.edu 0x3: bgezl({{ cond = (Rs.sw >= 0); }}, Likely); 2902101SN/A } 2912043SN/A } 2922025SN/A 2932043SN/A 0x1: decode REGIMM_LO { 2945222Sksewell@umich.edu format TrapImm { 2955222Sksewell@umich.edu 0x0: tgei( {{ cond = (Rs.sw >= (int16_t)INTIMM); }}); 2966384Sgblack@eecs.umich.edu 0x1: tgeiu({{ 2976384Sgblack@eecs.umich.edu cond = (Rs.uw >= (uint32_t)(int32_t)(int16_t)INTIMM); 2986384Sgblack@eecs.umich.edu }}); 2995222Sksewell@umich.edu 0x2: tlti( {{ cond = (Rs.sw < (int16_t)INTIMM); }}); 3006384Sgblack@eecs.umich.edu 0x3: tltiu({{ 3016384Sgblack@eecs.umich.edu cond = (Rs.uw < (uint32_t)(int32_t)(int16_t)INTIMM); 3026384Sgblack@eecs.umich.edu }}); 3036384Sgblack@eecs.umich.edu 0x4: teqi( {{ cond = (Rs.sw == (int16_t)INTIMM); }}); 3046384Sgblack@eecs.umich.edu 0x6: tnei( {{ cond = (Rs.sw != (int16_t)INTIMM); }}); 3052101SN/A } 3062043SN/A } 3072043SN/A 3082043SN/A 0x2: decode REGIMM_LO { 3092101SN/A format Branch { 3102686Sksewell@umich.edu 0x0: bltzal({{ cond = (Rs.sw < 0); }}, Link); 3112686Sksewell@umich.edu 0x1: decode RS { 3122686Sksewell@umich.edu 0x0: bal ({{ cond = 1; }}, IsCall, Link); 3132686Sksewell@umich.edu default: bgezal({{ cond = (Rs.sw >= 0); }}, Link); 3142686Sksewell@umich.edu } 3152686Sksewell@umich.edu 0x2: bltzall({{ cond = (Rs.sw < 0); }}, Link, Likely); 3162686Sksewell@umich.edu 0x3: bgezall({{ cond = (Rs.sw >= 0); }}, Link, Likely); 3172101SN/A } 3182043SN/A } 3192043SN/A 3202043SN/A 0x3: decode REGIMM_LO { 3216384Sgblack@eecs.umich.edu // from Table 5-4 MIPS32 REGIMM Encoding of rt Field 3226384Sgblack@eecs.umich.edu // (DSP ASE MANUAL) 3234661Sksewell@umich.edu 0x4: DspBranch::bposge32({{ cond = (dspctl<5:0> >= 32); }}); 3242101SN/A format WarnUnimpl { 3252101SN/A 0x7: synci(); 3262101SN/A } 3272043SN/A } 3282043SN/A } 3292043SN/A 3302123SN/A format Jump { 3317792Sgblack@eecs.umich.edu 0x2: j({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }}); 3327792Sgblack@eecs.umich.edu 0x3: jal({{ NNPC = (NPC & 0xF0000000) | (JMPTARG << 2); }}, 3337792Sgblack@eecs.umich.edu IsCall, Link); 3342043SN/A } 3352043SN/A 3362100SN/A format Branch { 3372686Sksewell@umich.edu 0x4: decode RS_RT { 3382686Sksewell@umich.edu 0x0: b({{ cond = 1; }}); 3392686Sksewell@umich.edu default: beq({{ cond = (Rs.sw == Rt.sw); }}); 3402686Sksewell@umich.edu } 3412239SN/A 0x5: bne({{ cond = (Rs.sw != Rt.sw); }}); 3422686Sksewell@umich.edu 0x6: blez({{ cond = (Rs.sw <= 0); }}); 3432686Sksewell@umich.edu 0x7: bgtz({{ cond = (Rs.sw > 0); }}); 3442043SN/A } 3452084SN/A } 3462024SN/A 3472101SN/A 0x1: decode OPCODE_LO { 3482686Sksewell@umich.edu format IntImmOp { 3495222Sksewell@umich.edu 0x0: addi({{ 3506384Sgblack@eecs.umich.edu int64_t Src1 = Rs.sw; 3516384Sgblack@eecs.umich.edu int64_t Src2 = imm; 3526384Sgblack@eecs.umich.edu int64_t temp_result; 3535222Sksewell@umich.edu#if FULL_SYSTEM 3546384Sgblack@eecs.umich.edu if (((Src1 >> 31) & 1) == 1) 3556384Sgblack@eecs.umich.edu Src1 |= 0x100000000LL; 3565222Sksewell@umich.edu#endif 3576384Sgblack@eecs.umich.edu temp_result = Src1 + Src2; 3585222Sksewell@umich.edu#if FULL_SYSTEM 3596384Sgblack@eecs.umich.edu if (bits(temp_result, 31) == bits(temp_result, 32)) { 3605222Sksewell@umich.edu#endif 3616384Sgblack@eecs.umich.edu Rt.sw = temp_result; 3625222Sksewell@umich.edu#if FULL_SYSTEM 3636384Sgblack@eecs.umich.edu } else { 3646384Sgblack@eecs.umich.edu fault = new ArithmeticFault(); 3656384Sgblack@eecs.umich.edu } 3665222Sksewell@umich.edu#endif 3676384Sgblack@eecs.umich.edu }}); 3686384Sgblack@eecs.umich.edu 0x1: addiu({{ Rt.sw = Rs.sw + imm; }}); 3696384Sgblack@eecs.umich.edu 0x2: slti({{ Rt.sw = (Rs.sw < imm) ? 1 : 0 }}); 3707952Sksewell@umich.edu 0x3: sltiu({{ Rt.uw = (Rs.uw < (uint32_t)sextImm) ? 1 : 0;}}); 3716384Sgblack@eecs.umich.edu 0x4: andi({{ Rt.sw = Rs.sw & zextImm; }}); 3726384Sgblack@eecs.umich.edu 0x5: ori({{ Rt.sw = Rs.sw | zextImm; }}); 3736384Sgblack@eecs.umich.edu 0x6: xori({{ Rt.sw = Rs.sw ^ zextImm; }}); 3742495SN/A 3752495SN/A 0x7: decode RS { 3766384Sgblack@eecs.umich.edu 0x0: lui({{ Rt = imm << 16; }}); 3772495SN/A } 3782084SN/A } 3792084SN/A } 3802024SN/A 3812101SN/A 0x2: decode OPCODE_LO { 3822101SN/A //Table A-11 MIPS32 COP0 Encoding of rs Field 3832101SN/A 0x0: decode RS_MSB { 3842101SN/A 0x0: decode RS { 3856384Sgblack@eecs.umich.edu format CP0Control { 3866384Sgblack@eecs.umich.edu 0x0: mfc0({{ 3876384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 3886384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 3896384Sgblack@eecs.umich.edu Rt = CP0_RD_SEL; 3906384Sgblack@eecs.umich.edu /* Hack for PageMask */ 3916384Sgblack@eecs.umich.edu if (RD == 5) { 3926384Sgblack@eecs.umich.edu // PageMask 3936384Sgblack@eecs.umich.edu if (config3.sp == 0 || pageGrain.esp == 0) 3946384Sgblack@eecs.umich.edu Rt &= 0xFFFFE7FF; 3956384Sgblack@eecs.umich.edu } 3966384Sgblack@eecs.umich.edu }}); 3976384Sgblack@eecs.umich.edu 0x4: mtc0({{ 3986384Sgblack@eecs.umich.edu CP0_RD_SEL = Rt; 3996384Sgblack@eecs.umich.edu CauseReg cause = Cause; 4006384Sgblack@eecs.umich.edu IntCtlReg intCtl = IntCtl; 4016384Sgblack@eecs.umich.edu if (RD == 11) { 4026384Sgblack@eecs.umich.edu // Compare 4036384Sgblack@eecs.umich.edu if (cause.ti == 1) { 4046384Sgblack@eecs.umich.edu cause.ti = 0; 4056384Sgblack@eecs.umich.edu int offset = 10; // corresponding to cause.ip0 4066384Sgblack@eecs.umich.edu offset += intCtl.ipti - 2; 4076384Sgblack@eecs.umich.edu replaceBits(cause, offset, offset, 0); 4086384Sgblack@eecs.umich.edu } 4096384Sgblack@eecs.umich.edu } 4106384Sgblack@eecs.umich.edu Cause = cause; 4116384Sgblack@eecs.umich.edu }}); 4126384Sgblack@eecs.umich.edu } 4136384Sgblack@eecs.umich.edu format CP0Unimpl { 4146384Sgblack@eecs.umich.edu 0x1: dmfc0(); 4156384Sgblack@eecs.umich.edu 0x5: dmtc0(); 4166384Sgblack@eecs.umich.edu default: unknown(); 4176384Sgblack@eecs.umich.edu } 4186384Sgblack@eecs.umich.edu format MT_MFTR { 4196384Sgblack@eecs.umich.edu // Decode MIPS MT MFTR instruction into sub-instructions 4204661Sksewell@umich.edu 0x8: decode MT_U { 4216376Sgblack@eecs.umich.edu 0x0: mftc0({{ 4226376Sgblack@eecs.umich.edu data = xc->readRegOtherThread((RT << 3 | SEL) + 4236376Sgblack@eecs.umich.edu Ctrl_Base_DepTag); 4246376Sgblack@eecs.umich.edu }}); 4254661Sksewell@umich.edu 0x1: decode SEL { 4266384Sgblack@eecs.umich.edu 0x0: mftgpr({{ 4276384Sgblack@eecs.umich.edu data = xc->readRegOtherThread(RT); 4286384Sgblack@eecs.umich.edu }}); 4294661Sksewell@umich.edu 0x1: decode RT { 4306383Sgblack@eecs.umich.edu 0x0: mftlo_dsp0({{ data = xc->readRegOtherThread(INTREG_DSP_LO0); }}); 4316383Sgblack@eecs.umich.edu 0x1: mfthi_dsp0({{ data = xc->readRegOtherThread(INTREG_DSP_HI0); }}); 4326383Sgblack@eecs.umich.edu 0x2: mftacx_dsp0({{ data = xc->readRegOtherThread(INTREG_DSP_ACX0); }}); 4336383Sgblack@eecs.umich.edu 0x4: mftlo_dsp1({{ data = xc->readRegOtherThread(INTREG_DSP_LO1); }}); 4346383Sgblack@eecs.umich.edu 0x5: mfthi_dsp1({{ data = xc->readRegOtherThread(INTREG_DSP_HI1); }}); 4356383Sgblack@eecs.umich.edu 0x6: mftacx_dsp1({{ data = xc->readRegOtherThread(INTREG_DSP_ACX1); }}); 4366383Sgblack@eecs.umich.edu 0x8: mftlo_dsp2({{ data = xc->readRegOtherThread(INTREG_DSP_LO2); }}); 4376383Sgblack@eecs.umich.edu 0x9: mfthi_dsp2({{ data = xc->readRegOtherThread(INTREG_DSP_HI2); }}); 4386383Sgblack@eecs.umich.edu 0x10: mftacx_dsp2({{ data = xc->readRegOtherThread(INTREG_DSP_ACX2); }}); 4396383Sgblack@eecs.umich.edu 0x12: mftlo_dsp3({{ data = xc->readRegOtherThread(INTREG_DSP_LO3); }}); 4406383Sgblack@eecs.umich.edu 0x13: mfthi_dsp3({{ data = xc->readRegOtherThread(INTREG_DSP_HI3); }}); 4416383Sgblack@eecs.umich.edu 0x14: mftacx_dsp3({{ data = xc->readRegOtherThread(INTREG_DSP_ACX3); }}); 4426383Sgblack@eecs.umich.edu 0x16: mftdsp({{ data = xc->readRegOtherThread(INTREG_DSP_CONTROL); }}); 4436384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 4442686Sksewell@umich.edu } 4454661Sksewell@umich.edu 0x2: decode MT_H { 4464661Sksewell@umich.edu 0x0: mftc1({{ data = xc->readRegOtherThread(RT + 4474661Sksewell@umich.edu FP_Base_DepTag); 4486384Sgblack@eecs.umich.edu }}); 4494661Sksewell@umich.edu 0x1: mfthc1({{ data = xc->readRegOtherThread(RT + 4504661Sksewell@umich.edu FP_Base_DepTag); 4516384Sgblack@eecs.umich.edu }}); 4526384Sgblack@eecs.umich.edu } 4536384Sgblack@eecs.umich.edu 0x3: cftc1({{ 4546384Sgblack@eecs.umich.edu uint32_t fcsr_val = xc->readRegOtherThread(FLOATREG_FCSR + 4554661Sksewell@umich.edu FP_Base_DepTag); 4566384Sgblack@eecs.umich.edu switch (RT) { 4576384Sgblack@eecs.umich.edu case 0: 4586384Sgblack@eecs.umich.edu data = xc->readRegOtherThread(FLOATREG_FIR + 4596384Sgblack@eecs.umich.edu Ctrl_Base_DepTag); 4606384Sgblack@eecs.umich.edu break; 4616384Sgblack@eecs.umich.edu case 25: 4626384Sgblack@eecs.umich.edu data = (fcsr_val & 0xFE000000 >> 24) | 4636384Sgblack@eecs.umich.edu (fcsr_val & 0x00800000 >> 23); 4646384Sgblack@eecs.umich.edu break; 4656384Sgblack@eecs.umich.edu case 26: 4666384Sgblack@eecs.umich.edu data = fcsr_val & 0x0003F07C; 4676384Sgblack@eecs.umich.edu break; 4686384Sgblack@eecs.umich.edu case 28: 4696384Sgblack@eecs.umich.edu data = (fcsr_val & 0x00000F80) | 4706384Sgblack@eecs.umich.edu (fcsr_val & 0x01000000 >> 21) | 4716384Sgblack@eecs.umich.edu (fcsr_val & 0x00000003); 4726384Sgblack@eecs.umich.edu break; 4736384Sgblack@eecs.umich.edu case 31: 4746384Sgblack@eecs.umich.edu data = fcsr_val; 4756384Sgblack@eecs.umich.edu break; 4766384Sgblack@eecs.umich.edu default: 4776384Sgblack@eecs.umich.edu fatal("FP Control Value (%d) Not Valid"); 4786384Sgblack@eecs.umich.edu } 4796384Sgblack@eecs.umich.edu }}); 4806384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 4812101SN/A } 4826384Sgblack@eecs.umich.edu } 4832686Sksewell@umich.edu } 4842027SN/A 4856384Sgblack@eecs.umich.edu format MT_MTTR { 4866384Sgblack@eecs.umich.edu // Decode MIPS MT MTTR instruction into sub-instructions 4874661Sksewell@umich.edu 0xC: decode MT_U { 4884661Sksewell@umich.edu 0x0: mttc0({{ xc->setRegOtherThread((RD << 3 | SEL) + Ctrl_Base_DepTag, 4894661Sksewell@umich.edu Rt); 4904661Sksewell@umich.edu }}); 4914661Sksewell@umich.edu 0x1: decode SEL { 4924661Sksewell@umich.edu 0x0: mttgpr({{ xc->setRegOtherThread(RD, Rt); }}); 4934661Sksewell@umich.edu 0x1: decode RT { 4946383Sgblack@eecs.umich.edu 0x0: mttlo_dsp0({{ xc->setRegOtherThread(INTREG_DSP_LO0, Rt); 4954661Sksewell@umich.edu }}); 4966383Sgblack@eecs.umich.edu 0x1: mtthi_dsp0({{ xc->setRegOtherThread(INTREG_DSP_HI0, 4974661Sksewell@umich.edu Rt); 4984661Sksewell@umich.edu }}); 4996383Sgblack@eecs.umich.edu 0x2: mttacx_dsp0({{ xc->setRegOtherThread(INTREG_DSP_ACX0, 5004661Sksewell@umich.edu Rt); 5014661Sksewell@umich.edu }}); 5026383Sgblack@eecs.umich.edu 0x4: mttlo_dsp1({{ xc->setRegOtherThread(INTREG_DSP_LO1, 5034661Sksewell@umich.edu Rt); 5044661Sksewell@umich.edu }}); 5056383Sgblack@eecs.umich.edu 0x5: mtthi_dsp1({{ xc->setRegOtherThread(INTREG_DSP_HI1, 5064661Sksewell@umich.edu Rt); 5074661Sksewell@umich.edu }}); 5086383Sgblack@eecs.umich.edu 0x6: mttacx_dsp1({{ xc->setRegOtherThread(INTREG_DSP_ACX1, 5094661Sksewell@umich.edu Rt); 5104661Sksewell@umich.edu }}); 5116383Sgblack@eecs.umich.edu 0x8: mttlo_dsp2({{ xc->setRegOtherThread(INTREG_DSP_LO2, 5124661Sksewell@umich.edu Rt); 5134661Sksewell@umich.edu }}); 5146383Sgblack@eecs.umich.edu 0x9: mtthi_dsp2({{ xc->setRegOtherThread(INTREG_DSP_HI2, 5154661Sksewell@umich.edu Rt); 5164661Sksewell@umich.edu }}); 5176383Sgblack@eecs.umich.edu 0x10: mttacx_dsp2({{ xc->setRegOtherThread(INTREG_DSP_ACX2, 5184661Sksewell@umich.edu Rt); 5194661Sksewell@umich.edu }}); 5206383Sgblack@eecs.umich.edu 0x12: mttlo_dsp3({{ xc->setRegOtherThread(INTREG_DSP_LO3, 5214661Sksewell@umich.edu Rt); 5224661Sksewell@umich.edu }}); 5236383Sgblack@eecs.umich.edu 0x13: mtthi_dsp3({{ xc->setRegOtherThread(INTREG_DSP_HI3, 5244661Sksewell@umich.edu Rt); 5254661Sksewell@umich.edu }}); 5266383Sgblack@eecs.umich.edu 0x14: mttacx_dsp3({{ xc->setRegOtherThread(INTREG_DSP_ACX3, Rt); 5274661Sksewell@umich.edu }}); 5286383Sgblack@eecs.umich.edu 0x16: mttdsp({{ xc->setRegOtherThread(INTREG_DSP_CONTROL, Rt); }}); 5296384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 5305222Sksewell@umich.edu 5314661Sksewell@umich.edu } 5326384Sgblack@eecs.umich.edu 0x2: mttc1({{ 5336384Sgblack@eecs.umich.edu uint64_t data = xc->readRegOtherThread(RD + 5346384Sgblack@eecs.umich.edu FP_Base_DepTag); 5356384Sgblack@eecs.umich.edu data = insertBits(data, top_bit, 5366384Sgblack@eecs.umich.edu bottom_bit, Rt); 5376384Sgblack@eecs.umich.edu xc->setRegOtherThread(RD + FP_Base_DepTag, 5386384Sgblack@eecs.umich.edu data); 5396384Sgblack@eecs.umich.edu }}); 5406384Sgblack@eecs.umich.edu 0x3: cttc1({{ 5416384Sgblack@eecs.umich.edu uint32_t data; 5426384Sgblack@eecs.umich.edu switch (RD) { 5436384Sgblack@eecs.umich.edu case 25: 5446384Sgblack@eecs.umich.edu data = (Rt.uw<7:1> << 25) | // move 31-25 5456384Sgblack@eecs.umich.edu (FCSR & 0x01000000) | // bit 24 5466384Sgblack@eecs.umich.edu (FCSR & 0x004FFFFF); // bit 22-0 5476384Sgblack@eecs.umich.edu break; 5486384Sgblack@eecs.umich.edu case 26: 5496384Sgblack@eecs.umich.edu data = (FCSR & 0xFFFC0000) | // move 31-18 5506384Sgblack@eecs.umich.edu Rt.uw<17:12> << 12 | // bit 17-12 5516384Sgblack@eecs.umich.edu (FCSR & 0x00000F80) << 7 | // bit 11-7 5526384Sgblack@eecs.umich.edu Rt.uw<6:2> << 2 | // bit 6-2 5536384Sgblack@eecs.umich.edu (FCSR & 0x00000002); // bit 1...0 5546384Sgblack@eecs.umich.edu break; 5556384Sgblack@eecs.umich.edu case 28: 5566384Sgblack@eecs.umich.edu data = (FCSR & 0xFE000000) | // move 31-25 5576384Sgblack@eecs.umich.edu Rt.uw<2:2> << 24 | // bit 24 5586384Sgblack@eecs.umich.edu (FCSR & 0x00FFF000) << 23 | // bit 23-12 5596384Sgblack@eecs.umich.edu Rt.uw<11:7> << 7 | // bit 24 5606384Sgblack@eecs.umich.edu (FCSR & 0x000007E) | 5616384Sgblack@eecs.umich.edu Rt.uw<1:0>; // bit 22-0 5626384Sgblack@eecs.umich.edu break; 5636384Sgblack@eecs.umich.edu case 31: 5646384Sgblack@eecs.umich.edu data = Rt.uw; 5656384Sgblack@eecs.umich.edu break; 5666384Sgblack@eecs.umich.edu default: 5676384Sgblack@eecs.umich.edu panic("FP Control Value (%d) " 5686384Sgblack@eecs.umich.edu "Not Available. Ignoring " 5696384Sgblack@eecs.umich.edu "Access to Floating Control " 5706384Sgblack@eecs.umich.edu "Status Register", FS); 5716384Sgblack@eecs.umich.edu } 5726384Sgblack@eecs.umich.edu xc->setRegOtherThread(FLOATREG_FCSR + FP_Base_DepTag, data); 5736384Sgblack@eecs.umich.edu }}); 5746384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 5754661Sksewell@umich.edu } 5764661Sksewell@umich.edu } 5772101SN/A } 5784661Sksewell@umich.edu 0xB: decode RD { 5794661Sksewell@umich.edu format MT_Control { 5804661Sksewell@umich.edu 0x0: decode POS { 5814661Sksewell@umich.edu 0x0: decode SEL { 5824661Sksewell@umich.edu 0x1: decode SC { 5836376Sgblack@eecs.umich.edu 0x0: dvpe({{ 5846376Sgblack@eecs.umich.edu MVPControlReg mvpControl = MVPControl; 5856376Sgblack@eecs.umich.edu VPEConf0Reg vpeConf0 = VPEConf0; 5866376Sgblack@eecs.umich.edu Rt = MVPControl; 5876376Sgblack@eecs.umich.edu if (vpeConf0.mvp == 1) 5886376Sgblack@eecs.umich.edu mvpControl.evp = 0; 5896376Sgblack@eecs.umich.edu MVPControl = mvpControl; 5906376Sgblack@eecs.umich.edu }}); 5916376Sgblack@eecs.umich.edu 0x1: evpe({{ 5926376Sgblack@eecs.umich.edu MVPControlReg mvpControl = MVPControl; 5936376Sgblack@eecs.umich.edu VPEConf0Reg vpeConf0 = VPEConf0; 5946376Sgblack@eecs.umich.edu Rt = MVPControl; 5956376Sgblack@eecs.umich.edu if (vpeConf0.mvp == 1) 5966376Sgblack@eecs.umich.edu mvpControl.evp = 1; 5976376Sgblack@eecs.umich.edu MVPControl = mvpControl; 5986376Sgblack@eecs.umich.edu }}); 5995222Sksewell@umich.edu default:CP0Unimpl::unknown(); 6004661Sksewell@umich.edu } 6016384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 6024661Sksewell@umich.edu } 6036384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 6046384Sgblack@eecs.umich.edu } 6054661Sksewell@umich.edu 0x1: decode POS { 6064661Sksewell@umich.edu 0xF: decode SEL { 6074661Sksewell@umich.edu 0x1: decode SC { 6086376Sgblack@eecs.umich.edu 0x0: dmt({{ 6096376Sgblack@eecs.umich.edu VPEControlReg vpeControl = VPEControl; 6106376Sgblack@eecs.umich.edu Rt = vpeControl; 6116376Sgblack@eecs.umich.edu vpeControl.te = 0; 6126376Sgblack@eecs.umich.edu VPEControl = vpeControl; 6136376Sgblack@eecs.umich.edu }}); 6146376Sgblack@eecs.umich.edu 0x1: emt({{ 6156376Sgblack@eecs.umich.edu VPEControlReg vpeControl = VPEControl; 6166376Sgblack@eecs.umich.edu Rt = vpeControl; 6176376Sgblack@eecs.umich.edu vpeControl.te = 1; 6186376Sgblack@eecs.umich.edu VPEControl = vpeControl; 6196376Sgblack@eecs.umich.edu }}); 6205222Sksewell@umich.edu default:CP0Unimpl::unknown(); 6214661Sksewell@umich.edu } 6226384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 6234661Sksewell@umich.edu } 6245222Sksewell@umich.edu default:CP0Unimpl::unknown(); 6254661Sksewell@umich.edu } 6264661Sksewell@umich.edu } 6274661Sksewell@umich.edu 0xC: decode POS { 6286384Sgblack@eecs.umich.edu 0x0: decode SC { 6296384Sgblack@eecs.umich.edu 0x0: CP0Control::di({{ 6306384Sgblack@eecs.umich.edu StatusReg status = Status; 6316384Sgblack@eecs.umich.edu ConfigReg config = Config; 6326384Sgblack@eecs.umich.edu // Rev 2.0 or beyond? 6336384Sgblack@eecs.umich.edu if (config.ar >= 1) { 6346384Sgblack@eecs.umich.edu Rt = status; 6356384Sgblack@eecs.umich.edu status.ie = 0; 6366384Sgblack@eecs.umich.edu } else { 6376384Sgblack@eecs.umich.edu // Enable this else branch once we 6386384Sgblack@eecs.umich.edu // actually set values for Config on init 6396384Sgblack@eecs.umich.edu fault = new ReservedInstructionFault(); 6406384Sgblack@eecs.umich.edu } 6416384Sgblack@eecs.umich.edu Status = status; 6426384Sgblack@eecs.umich.edu }}); 6436384Sgblack@eecs.umich.edu 0x1: CP0Control::ei({{ 6446384Sgblack@eecs.umich.edu StatusReg status = Status; 6456384Sgblack@eecs.umich.edu ConfigReg config = Config; 6466384Sgblack@eecs.umich.edu if (config.ar >= 1) { 6476384Sgblack@eecs.umich.edu Rt = status; 6486384Sgblack@eecs.umich.edu status.ie = 1; 6496384Sgblack@eecs.umich.edu } else { 6506384Sgblack@eecs.umich.edu fault = new ReservedInstructionFault(); 6516384Sgblack@eecs.umich.edu } 6526384Sgblack@eecs.umich.edu }}); 6536384Sgblack@eecs.umich.edu default:CP0Unimpl::unknown(); 6546384Sgblack@eecs.umich.edu } 6554661Sksewell@umich.edu } 6566384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 6574661Sksewell@umich.edu } 6584661Sksewell@umich.edu format CP0Control { 6594661Sksewell@umich.edu 0xA: rdpgpr({{ 6606376Sgblack@eecs.umich.edu ConfigReg config = Config; 6616376Sgblack@eecs.umich.edu if (config.ar >= 1) { 6626376Sgblack@eecs.umich.edu // Rev 2 of the architecture 6636376Sgblack@eecs.umich.edu panic("Shadow Sets Not Fully Implemented.\n"); 6646376Sgblack@eecs.umich.edu } else { 6654661Sksewell@umich.edu fault = new ReservedInstructionFault(); 6664661Sksewell@umich.edu } 6676376Sgblack@eecs.umich.edu }}); 6684661Sksewell@umich.edu 0xE: wrpgpr({{ 6696376Sgblack@eecs.umich.edu ConfigReg config = Config; 6706376Sgblack@eecs.umich.edu if (config.ar >= 1) { 6716376Sgblack@eecs.umich.edu // Rev 2 of the architecture 6726376Sgblack@eecs.umich.edu panic("Shadow Sets Not Fully Implemented.\n"); 6736376Sgblack@eecs.umich.edu } else { 6746376Sgblack@eecs.umich.edu fault = new ReservedInstructionFault(); 6754661Sksewell@umich.edu } 6766376Sgblack@eecs.umich.edu }}); 6774661Sksewell@umich.edu } 6786384Sgblack@eecs.umich.edu } 6792101SN/A 6802101SN/A //Table A-12 MIPS32 COP0 Encoding of Function Field When rs=CO 6812101SN/A 0x1: decode FUNCTION { 6826384Sgblack@eecs.umich.edu format CP0Control { 6836384Sgblack@eecs.umich.edu 0x18: eret({{ 6846384Sgblack@eecs.umich.edu StatusReg status = Status; 6856384Sgblack@eecs.umich.edu ConfigReg config = Config; 6866384Sgblack@eecs.umich.edu SRSCtlReg srsCtl = SRSCtl; 6876384Sgblack@eecs.umich.edu DPRINTF(MipsPRA,"Restoring PC - %x\n",EPC); 6886384Sgblack@eecs.umich.edu if (status.erl == 1) { 6896384Sgblack@eecs.umich.edu status.erl = 0; 6907792Sgblack@eecs.umich.edu NPC = ErrorEPC; 6916384Sgblack@eecs.umich.edu // Need to adjust NNPC, otherwise things break 6927792Sgblack@eecs.umich.edu NNPC = ErrorEPC + sizeof(MachInst); 6936384Sgblack@eecs.umich.edu } else { 6947792Sgblack@eecs.umich.edu NPC = EPC; 6956384Sgblack@eecs.umich.edu // Need to adjust NNPC, otherwise things break 6967792Sgblack@eecs.umich.edu NNPC = EPC + sizeof(MachInst); 6976384Sgblack@eecs.umich.edu status.exl = 0; 6986384Sgblack@eecs.umich.edu if (config.ar >=1 && 6996384Sgblack@eecs.umich.edu srsCtl.hss > 0 && 7006384Sgblack@eecs.umich.edu status.bev == 0) { 7016384Sgblack@eecs.umich.edu srsCtl.css = srsCtl.pss; 7026384Sgblack@eecs.umich.edu //xc->setShadowSet(srsCtl.pss); 7036384Sgblack@eecs.umich.edu } 7046376Sgblack@eecs.umich.edu } 7056384Sgblack@eecs.umich.edu LLFlag = 0; 7066384Sgblack@eecs.umich.edu Status = status; 7076384Sgblack@eecs.umich.edu SRSCtl = srsCtl; 7086384Sgblack@eecs.umich.edu }}, IsReturn, IsSerializing, IsERET); 7095222Sksewell@umich.edu 7106384Sgblack@eecs.umich.edu 0x1F: deret({{ 7116384Sgblack@eecs.umich.edu DebugReg debug = Debug; 7126384Sgblack@eecs.umich.edu if (debug.dm == 1) { 7136384Sgblack@eecs.umich.edu debug.dm = 1; 7146384Sgblack@eecs.umich.edu debug.iexi = 0; 7157792Sgblack@eecs.umich.edu NPC = DEPC; 7166384Sgblack@eecs.umich.edu } else { 7177792Sgblack@eecs.umich.edu NPC = NPC; 7186384Sgblack@eecs.umich.edu // Undefined; 7196384Sgblack@eecs.umich.edu } 7206384Sgblack@eecs.umich.edu Debug = debug; 7216384Sgblack@eecs.umich.edu }}, IsReturn, IsSerializing, IsERET); 7226384Sgblack@eecs.umich.edu } 7236384Sgblack@eecs.umich.edu format CP0TLB { 7246384Sgblack@eecs.umich.edu 0x01: tlbr({{ 7256384Sgblack@eecs.umich.edu MipsISA::PTE *PTEntry = 7266384Sgblack@eecs.umich.edu xc->tcBase()->getITBPtr()-> 7276384Sgblack@eecs.umich.edu getEntry(Index & 0x7FFFFFFF); 7286384Sgblack@eecs.umich.edu if (PTEntry == NULL) { 7296384Sgblack@eecs.umich.edu fatal("Invalid PTE Entry received on " 7306384Sgblack@eecs.umich.edu "a TLBR instruction\n"); 7316384Sgblack@eecs.umich.edu } 7326384Sgblack@eecs.umich.edu /* Setup PageMask */ 7336384Sgblack@eecs.umich.edu // If 1KB pages are not enabled, a read of PageMask 7346384Sgblack@eecs.umich.edu // must return 0b00 in bits 12, 11 7356384Sgblack@eecs.umich.edu PageMask = (PTEntry->Mask << 11); 7366384Sgblack@eecs.umich.edu /* Setup EntryHi */ 7376384Sgblack@eecs.umich.edu EntryHi = ((PTEntry->VPN << 11) | (PTEntry->asid)); 7386384Sgblack@eecs.umich.edu /* Setup Entry Lo0 */ 7396384Sgblack@eecs.umich.edu EntryLo0 = ((PTEntry->PFN0 << 6) | 7406384Sgblack@eecs.umich.edu (PTEntry->C0 << 3) | 7416384Sgblack@eecs.umich.edu (PTEntry->D0 << 2) | 7426384Sgblack@eecs.umich.edu (PTEntry->V0 << 1) | 7436384Sgblack@eecs.umich.edu PTEntry->G); 7446384Sgblack@eecs.umich.edu /* Setup Entry Lo1 */ 7456384Sgblack@eecs.umich.edu EntryLo1 = ((PTEntry->PFN1 << 6) | 7466384Sgblack@eecs.umich.edu (PTEntry->C1 << 3) | 7476384Sgblack@eecs.umich.edu (PTEntry->D1 << 2) | 7486384Sgblack@eecs.umich.edu (PTEntry->V1 << 1) | 7496384Sgblack@eecs.umich.edu PTEntry->G); 7506384Sgblack@eecs.umich.edu }}); // Need to hook up to TLB 7515222Sksewell@umich.edu 7526384Sgblack@eecs.umich.edu 0x02: tlbwi({{ 7536384Sgblack@eecs.umich.edu //Create PTE 7546384Sgblack@eecs.umich.edu MipsISA::PTE newEntry; 7556384Sgblack@eecs.umich.edu //Write PTE 7566384Sgblack@eecs.umich.edu newEntry.Mask = (Addr)(PageMask >> 11); 7576384Sgblack@eecs.umich.edu newEntry.VPN = (Addr)(EntryHi >> 11); 7586384Sgblack@eecs.umich.edu /* PageGrain _ ESP Config3 _ SP */ 7596384Sgblack@eecs.umich.edu if (bits(PageGrain, 28) == 0 || bits(Config3, 4) ==0) { 7606384Sgblack@eecs.umich.edu // If 1KB pages are *NOT* enabled, lowest bits of 7616384Sgblack@eecs.umich.edu // the mask are 0b11 for TLB writes 7626384Sgblack@eecs.umich.edu newEntry.Mask |= 0x3; 7636384Sgblack@eecs.umich.edu // Reset bits 0 and 1 if 1KB pages are not enabled 7646384Sgblack@eecs.umich.edu newEntry.VPN &= 0xFFFFFFFC; 7656384Sgblack@eecs.umich.edu } 7666384Sgblack@eecs.umich.edu newEntry.asid = (uint8_t)(EntryHi & 0xFF); 7675222Sksewell@umich.edu 7686384Sgblack@eecs.umich.edu newEntry.PFN0 = (Addr)(EntryLo0 >> 6); 7696384Sgblack@eecs.umich.edu newEntry.PFN1 = (Addr)(EntryLo1 >> 6); 7706384Sgblack@eecs.umich.edu newEntry.D0 = (bool)((EntryLo0 >> 2) & 1); 7716384Sgblack@eecs.umich.edu newEntry.D1 = (bool)((EntryLo1 >> 2) & 1); 7726384Sgblack@eecs.umich.edu newEntry.V1 = (bool)((EntryLo1 >> 1) & 1); 7736384Sgblack@eecs.umich.edu newEntry.V0 = (bool)((EntryLo0 >> 1) & 1); 7746384Sgblack@eecs.umich.edu newEntry.G = (bool)((EntryLo0 & EntryLo1) & 1); 7756384Sgblack@eecs.umich.edu newEntry.C0 = (uint8_t)((EntryLo0 >> 3) & 0x7); 7766384Sgblack@eecs.umich.edu newEntry.C1 = (uint8_t)((EntryLo1 >> 3) & 0x7); 7776384Sgblack@eecs.umich.edu /* Now, compute the AddrShiftAmount and OffsetMask - 7786384Sgblack@eecs.umich.edu TLB optimizations */ 7796384Sgblack@eecs.umich.edu /* Addr Shift Amount for 1KB or larger pages */ 7806384Sgblack@eecs.umich.edu if ((newEntry.Mask & 0xFFFF) == 3) { 7816384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 12; 7826384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFF) == 0x0000) { 7836384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 10; 7846384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFC) == 0x000C) { 7856384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 14; 7866384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFF0) == 0x0030) { 7876384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 16; 7886384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFC0) == 0x00C0) { 7896384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 18; 7906384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFF00) == 0x0300) { 7916384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 20; 7926384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFC00) == 0x0C00) { 7936384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 22; 7946384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xF000) == 0x3000) { 7956384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 24; 7966384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xC000) == 0xC000) { 7976384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 26; 7986384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0x30000) == 0x30000) { 7996384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 28; 8006384Sgblack@eecs.umich.edu } else { 8016384Sgblack@eecs.umich.edu fatal("Invalid Mask Pattern Detected!\n"); 8026384Sgblack@eecs.umich.edu } 8036384Sgblack@eecs.umich.edu newEntry.OffsetMask = 8046384Sgblack@eecs.umich.edu (1 << newEntry.AddrShiftAmount) - 1; 8055222Sksewell@umich.edu 8066384Sgblack@eecs.umich.edu MipsISA::TLB *Ptr = xc->tcBase()->getITBPtr(); 8076384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 8086384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 8096384Sgblack@eecs.umich.edu int SP = 0; 8106384Sgblack@eecs.umich.edu if (bits(config3, config3.sp) == 1 && 8116384Sgblack@eecs.umich.edu bits(pageGrain, pageGrain.esp) == 1) { 8126384Sgblack@eecs.umich.edu SP = 1; 8136384Sgblack@eecs.umich.edu } 8146384Sgblack@eecs.umich.edu IndexReg index = Index; 8156384Sgblack@eecs.umich.edu Ptr->insertAt(newEntry, Index & 0x7FFFFFFF, SP); 8166384Sgblack@eecs.umich.edu }}); 8176384Sgblack@eecs.umich.edu 0x06: tlbwr({{ 8186384Sgblack@eecs.umich.edu //Create PTE 8196384Sgblack@eecs.umich.edu MipsISA::PTE newEntry; 8206384Sgblack@eecs.umich.edu //Write PTE 8216384Sgblack@eecs.umich.edu newEntry.Mask = (Addr)(PageMask >> 11); 8226384Sgblack@eecs.umich.edu newEntry.VPN = (Addr)(EntryHi >> 11); 8236384Sgblack@eecs.umich.edu /* PageGrain _ ESP Config3 _ SP */ 8246384Sgblack@eecs.umich.edu if (bits(PageGrain, 28) == 0 || 8256384Sgblack@eecs.umich.edu bits(Config3, 4) == 0) { 8266384Sgblack@eecs.umich.edu // If 1KB pages are *NOT* enabled, lowest bits of 8276384Sgblack@eecs.umich.edu // the mask are 0b11 for TLB writes 8286384Sgblack@eecs.umich.edu newEntry.Mask |= 0x3; 8296384Sgblack@eecs.umich.edu // Reset bits 0 and 1 if 1KB pages are not enabled 8306384Sgblack@eecs.umich.edu newEntry.VPN &= 0xFFFFFFFC; 8316384Sgblack@eecs.umich.edu } 8326384Sgblack@eecs.umich.edu newEntry.asid = (uint8_t)(EntryHi & 0xFF); 8335222Sksewell@umich.edu 8346384Sgblack@eecs.umich.edu newEntry.PFN0 = (Addr)(EntryLo0 >> 6); 8356384Sgblack@eecs.umich.edu newEntry.PFN1 = (Addr)(EntryLo1 >> 6); 8366384Sgblack@eecs.umich.edu newEntry.D0 = (bool)((EntryLo0 >> 2) & 1); 8376384Sgblack@eecs.umich.edu newEntry.D1 = (bool)((EntryLo1 >> 2) & 1); 8386384Sgblack@eecs.umich.edu newEntry.V1 = (bool)((EntryLo1 >> 1) & 1); 8396384Sgblack@eecs.umich.edu newEntry.V0 = (bool)((EntryLo0 >> 1) & 1); 8406384Sgblack@eecs.umich.edu newEntry.G = (bool)((EntryLo0 & EntryLo1) & 1); 8416384Sgblack@eecs.umich.edu newEntry.C0 = (uint8_t)((EntryLo0 >> 3) & 0x7); 8426384Sgblack@eecs.umich.edu newEntry.C1 = (uint8_t)((EntryLo1 >> 3) & 0x7); 8436384Sgblack@eecs.umich.edu /* Now, compute the AddrShiftAmount and OffsetMask - 8446384Sgblack@eecs.umich.edu TLB optimizations */ 8456384Sgblack@eecs.umich.edu /* Addr Shift Amount for 1KB or larger pages */ 8466384Sgblack@eecs.umich.edu if ((newEntry.Mask & 0xFFFF) == 3){ 8476384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 12; 8486384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFF) == 0x0000) { 8496384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 10; 8506384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFFC) == 0x000C) { 8516384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 14; 8526384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFF0) == 0x0030) { 8536384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 16; 8546384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFFC0) == 0x00C0) { 8556384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 18; 8566384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFF00) == 0x0300) { 8576384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 20; 8586384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xFC00) == 0x0C00) { 8596384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 22; 8606384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xF000) == 0x3000) { 8616384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 24; 8626384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0xC000) == 0xC000) { 8636384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 26; 8646384Sgblack@eecs.umich.edu } else if ((newEntry.Mask & 0x30000) == 0x30000) { 8656384Sgblack@eecs.umich.edu newEntry.AddrShiftAmount = 28; 8666384Sgblack@eecs.umich.edu } else { 8676384Sgblack@eecs.umich.edu fatal("Invalid Mask Pattern Detected!\n"); 8686384Sgblack@eecs.umich.edu } 8696384Sgblack@eecs.umich.edu newEntry.OffsetMask = 8706384Sgblack@eecs.umich.edu (1 << newEntry.AddrShiftAmount) - 1; 8715222Sksewell@umich.edu 8726384Sgblack@eecs.umich.edu MipsISA::TLB *Ptr = xc->tcBase()->getITBPtr(); 8736384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 8746384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 8756384Sgblack@eecs.umich.edu int SP = 0; 8766384Sgblack@eecs.umich.edu if (bits(config3, config3.sp) == 1 && 8776384Sgblack@eecs.umich.edu bits(pageGrain, pageGrain.esp) == 1) { 8786384Sgblack@eecs.umich.edu SP = 1; 8796384Sgblack@eecs.umich.edu } 8806384Sgblack@eecs.umich.edu IndexReg index = Index; 8816384Sgblack@eecs.umich.edu Ptr->insertAt(newEntry, Random, SP); 8826384Sgblack@eecs.umich.edu }}); 8832101SN/A 8846384Sgblack@eecs.umich.edu 0x08: tlbp({{ 8856384Sgblack@eecs.umich.edu Config3Reg config3 = Config3; 8866384Sgblack@eecs.umich.edu PageGrainReg pageGrain = PageGrain; 8876384Sgblack@eecs.umich.edu EntryHiReg entryHi = EntryHi; 8886384Sgblack@eecs.umich.edu int tlbIndex; 8896384Sgblack@eecs.umich.edu Addr vpn; 8906384Sgblack@eecs.umich.edu if (pageGrain.esp == 1 && config3.sp ==1) { 8916384Sgblack@eecs.umich.edu vpn = EntryHi >> 11; 8926384Sgblack@eecs.umich.edu } else { 8936384Sgblack@eecs.umich.edu // Mask off lower 2 bits 8946384Sgblack@eecs.umich.edu vpn = ((EntryHi >> 11) & 0xFFFFFFFC); 8956384Sgblack@eecs.umich.edu } 8966384Sgblack@eecs.umich.edu tlbIndex = xc->tcBase()->getITBPtr()-> 8976385Sgblack@eecs.umich.edu probeEntry(vpn, entryHi.asid); 8986384Sgblack@eecs.umich.edu // Check TLB for entry matching EntryHi 8996384Sgblack@eecs.umich.edu if (tlbIndex != -1) { 9006384Sgblack@eecs.umich.edu Index = tlbIndex; 9016384Sgblack@eecs.umich.edu } else { 9026384Sgblack@eecs.umich.edu // else, set Index = 1 << 31 9036384Sgblack@eecs.umich.edu Index = (1 << 31); 9046384Sgblack@eecs.umich.edu } 9056384Sgblack@eecs.umich.edu }}); 9066384Sgblack@eecs.umich.edu } 9076384Sgblack@eecs.umich.edu format CP0Unimpl { 9086384Sgblack@eecs.umich.edu 0x20: wait(); 9096384Sgblack@eecs.umich.edu } 9106384Sgblack@eecs.umich.edu default: CP0Unimpl::unknown(); 9112101SN/A } 9122043SN/A } 9132027SN/A 9142101SN/A //Table A-13 MIPS32 COP1 Encoding of rs Field 9152101SN/A 0x1: decode RS_MSB { 9162101SN/A 0x0: decode RS_HI { 9172101SN/A 0x0: decode RS_LO { 9182686Sksewell@umich.edu format CP1Control { 9192742Sksewell@umich.edu 0x0: mfc1 ({{ Rt.uw = Fs.uw; }}); 9202495SN/A 9212495SN/A 0x2: cfc1({{ 9226384Sgblack@eecs.umich.edu switch (FS) { 9232573SN/A case 0: 9242616SN/A Rt = FIR; 9252573SN/A break; 9262573SN/A case 25: 9276384Sgblack@eecs.umich.edu Rt = (FCSR & 0xFE000000) >> 24 | 9286384Sgblack@eecs.umich.edu (FCSR & 0x00800000) >> 23; 9292573SN/A break; 9302573SN/A case 26: 9316384Sgblack@eecs.umich.edu Rt = (FCSR & 0x0003F07C); 9322573SN/A break; 9332573SN/A case 28: 9346384Sgblack@eecs.umich.edu Rt = (FCSR & 0x00000F80) | 9356384Sgblack@eecs.umich.edu (FCSR & 0x01000000) >> 21 | 9366384Sgblack@eecs.umich.edu (FCSR & 0x00000003); 9372573SN/A break; 9382573SN/A case 31: 9392616SN/A Rt = FCSR; 9402573SN/A break; 9412573SN/A default: 9425222Sksewell@umich.edu warn("FP Control Value (%d) Not Valid"); 9432573SN/A } 9442573SN/A }}); 9452573SN/A 9466384Sgblack@eecs.umich.edu 0x3: mfhc1({{ Rt.uw = Fs.ud<63:32>; }}); 9472686Sksewell@umich.edu 9486384Sgblack@eecs.umich.edu 0x4: mtc1({{ Fs.uw = Rt.uw; }}); 9492686Sksewell@umich.edu 9502573SN/A 0x6: ctc1({{ 9516384Sgblack@eecs.umich.edu switch (FS) { 9522573SN/A case 25: 9536384Sgblack@eecs.umich.edu FCSR = (Rt.uw<7:1> << 25) | // move 31-25 9546384Sgblack@eecs.umich.edu (FCSR & 0x01000000) | // bit 24 9556384Sgblack@eecs.umich.edu (FCSR & 0x004FFFFF); // bit 22-0 9562573SN/A break; 9572573SN/A case 26: 9586384Sgblack@eecs.umich.edu FCSR = (FCSR & 0xFFFC0000) | // move 31-18 9596384Sgblack@eecs.umich.edu Rt.uw<17:12> << 12 | // bit 17-12 9606384Sgblack@eecs.umich.edu (FCSR & 0x00000F80) << 7 | // bit 11-7 9616384Sgblack@eecs.umich.edu Rt.uw<6:2> << 2 | // bit 6-2 9626384Sgblack@eecs.umich.edu (FCSR & 0x00000002); // bit 1-0 9632573SN/A break; 9642573SN/A case 28: 9656384Sgblack@eecs.umich.edu FCSR = (FCSR & 0xFE000000) | // move 31-25 9666384Sgblack@eecs.umich.edu Rt.uw<2:2> << 24 | // bit 24 9676384Sgblack@eecs.umich.edu (FCSR & 0x00FFF000) << 23 | // bit 23-12 9686384Sgblack@eecs.umich.edu Rt.uw<11:7> << 7 | // bit 24 9696384Sgblack@eecs.umich.edu (FCSR & 0x000007E) | 9706384Sgblack@eecs.umich.edu Rt.uw<1:0>; // bit 22-0 9712573SN/A break; 9722573SN/A case 31: 9736384Sgblack@eecs.umich.edu FCSR = Rt.uw; 9742573SN/A break; 9752573SN/A 9762573SN/A default: 9776384Sgblack@eecs.umich.edu panic("FP Control Value (%d) " 9786384Sgblack@eecs.umich.edu "Not Available. Ignoring Access " 9796384Sgblack@eecs.umich.edu "to Floating Control Status " 9806384Sgblack@eecs.umich.edu "Register", FS); 9812495SN/A } 9822495SN/A }}); 9832686Sksewell@umich.edu 9842686Sksewell@umich.edu 0x7: mthc1({{ 9852686Sksewell@umich.edu uint64_t fs_hi = Rt.uw; 9862686Sksewell@umich.edu uint64_t fs_lo = Fs.ud & 0x0FFFFFFFF; 9872686Sksewell@umich.edu Fs.ud = (fs_hi << 32) | fs_lo; 9882686Sksewell@umich.edu }}); 9892686Sksewell@umich.edu 9902101SN/A } 9915222Sksewell@umich.edu format CP1Unimpl { 9925222Sksewell@umich.edu 0x1: dmfc1(); 9935222Sksewell@umich.edu 0x5: dmtc1(); 9945222Sksewell@umich.edu } 9956384Sgblack@eecs.umich.edu } 9962025SN/A 9976384Sgblack@eecs.umich.edu 0x1: decode RS_LO { 9986384Sgblack@eecs.umich.edu 0x0: decode ND { 9996384Sgblack@eecs.umich.edu format Branch { 10006384Sgblack@eecs.umich.edu 0x0: decode TF { 10016384Sgblack@eecs.umich.edu 0x0: bc1f({{ 10026384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 0; 10036384Sgblack@eecs.umich.edu }}); 10046384Sgblack@eecs.umich.edu 0x1: bc1t({{ 10056384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 1; 10066384Sgblack@eecs.umich.edu }}); 10076384Sgblack@eecs.umich.edu } 10086384Sgblack@eecs.umich.edu 0x1: decode TF { 10096384Sgblack@eecs.umich.edu 0x0: bc1fl({{ 10106384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 0; 10116384Sgblack@eecs.umich.edu }}, Likely); 10126384Sgblack@eecs.umich.edu 0x1: bc1tl({{ 10136384Sgblack@eecs.umich.edu cond = getCondCode(FCSR, BRANCH_CC) == 1; 10146384Sgblack@eecs.umich.edu }}, Likely); 10156384Sgblack@eecs.umich.edu } 10166384Sgblack@eecs.umich.edu } 10176384Sgblack@eecs.umich.edu } 10186384Sgblack@eecs.umich.edu format CP1Unimpl { 10196384Sgblack@eecs.umich.edu 0x1: bc1any2(); 10206384Sgblack@eecs.umich.edu 0x2: bc1any4(); 10216384Sgblack@eecs.umich.edu default: unknown(); 10226384Sgblack@eecs.umich.edu } 10236384Sgblack@eecs.umich.edu } 10242043SN/A } 10252027SN/A 10262101SN/A 0x1: decode RS_HI { 10272101SN/A 0x2: decode RS_LO { 10286384Sgblack@eecs.umich.edu //Table A-14 MIPS32 COP1 Encoding of Function Field When 10296384Sgblack@eecs.umich.edu //rs=S (( single-precision floating point)) 10302572SN/A 0x0: decode FUNCTION_HI { 10312572SN/A 0x0: decode FUNCTION_LO { 10322101SN/A format FloatOp { 10336384Sgblack@eecs.umich.edu 0x0: add_s({{ Fd.sf = Fs.sf + Ft.sf; }}); 10346384Sgblack@eecs.umich.edu 0x1: sub_s({{ Fd.sf = Fs.sf - Ft.sf; }}); 10356384Sgblack@eecs.umich.edu 0x2: mul_s({{ Fd.sf = Fs.sf * Ft.sf; }}); 10366384Sgblack@eecs.umich.edu 0x3: div_s({{ Fd.sf = Fs.sf / Ft.sf; }}); 10376384Sgblack@eecs.umich.edu 0x4: sqrt_s({{ Fd.sf = sqrt(Fs.sf); }}); 10386384Sgblack@eecs.umich.edu 0x5: abs_s({{ Fd.sf = fabs(Fs.sf); }}); 10396384Sgblack@eecs.umich.edu 0x7: neg_s({{ Fd.sf = -Fs.sf; }}); 10402101SN/A } 10416384Sgblack@eecs.umich.edu 0x6: BasicOp::mov_s({{ Fd.sf = Fs.sf; }}); 10422101SN/A } 10432572SN/A 0x1: decode FUNCTION_LO { 10442686Sksewell@umich.edu format FloatConvertOp { 10456384Sgblack@eecs.umich.edu 0x0: round_l_s({{ val = Fs.sf; }}, 10466384Sgblack@eecs.umich.edu ToLong, Round); 10476384Sgblack@eecs.umich.edu 0x1: trunc_l_s({{ val = Fs.sf; }}, 10486384Sgblack@eecs.umich.edu ToLong, Trunc); 10496384Sgblack@eecs.umich.edu 0x2: ceil_l_s({{ val = Fs.sf;}}, 10506384Sgblack@eecs.umich.edu ToLong, Ceil); 10516384Sgblack@eecs.umich.edu 0x3: floor_l_s({{ val = Fs.sf; }}, 10526384Sgblack@eecs.umich.edu ToLong, Floor); 10536384Sgblack@eecs.umich.edu 0x4: round_w_s({{ val = Fs.sf; }}, 10546384Sgblack@eecs.umich.edu ToWord, Round); 10556384Sgblack@eecs.umich.edu 0x5: trunc_w_s({{ val = Fs.sf; }}, 10566384Sgblack@eecs.umich.edu ToWord, Trunc); 10576384Sgblack@eecs.umich.edu 0x6: ceil_w_s({{ val = Fs.sf; }}, 10586384Sgblack@eecs.umich.edu ToWord, Ceil); 10596384Sgblack@eecs.umich.edu 0x7: floor_w_s({{ val = Fs.sf; }}, 10606384Sgblack@eecs.umich.edu ToWord, Floor); 10612101SN/A } 10622101SN/A } 10632027SN/A 10642572SN/A 0x2: decode FUNCTION_LO { 10652101SN/A 0x1: decode MOVCF { 10662686Sksewell@umich.edu format BasicOp { 10676384Sgblack@eecs.umich.edu 0x0: movf_s({{ 10686384Sgblack@eecs.umich.edu Fd = (getCondCode(FCSR,CC) == 0) ? 10696384Sgblack@eecs.umich.edu Fs : Fd; 10706384Sgblack@eecs.umich.edu }}); 10716384Sgblack@eecs.umich.edu 0x1: movt_s({{ 10726384Sgblack@eecs.umich.edu Fd = (getCondCode(FCSR,CC) == 1) ? 10736384Sgblack@eecs.umich.edu Fs : Fd; 10746384Sgblack@eecs.umich.edu }}); 10752101SN/A } 10762101SN/A } 10772027SN/A 10782686Sksewell@umich.edu format BasicOp { 10792686Sksewell@umich.edu 0x2: movz_s({{ Fd = (Rt == 0) ? Fs : Fd; }}); 10802686Sksewell@umich.edu 0x3: movn_s({{ Fd = (Rt != 0) ? Fs : Fd; }}); 10812686Sksewell@umich.edu } 10822686Sksewell@umich.edu 10832602SN/A format FloatOp { 10842602SN/A 0x5: recip_s({{ Fd = 1 / Fs; }}); 10856384Sgblack@eecs.umich.edu 0x6: rsqrt_s({{ Fd = 1 / sqrt(Fs); }}); 10862101SN/A } 10875222Sksewell@umich.edu format CP1Unimpl { 10886384Sgblack@eecs.umich.edu default: unknown(); 10895222Sksewell@umich.edu } 10902101SN/A } 10915222Sksewell@umich.edu 0x3: CP1Unimpl::unknown(); 10922027SN/A 10932572SN/A 0x4: decode FUNCTION_LO { 10942603SN/A format FloatConvertOp { 10952686Sksewell@umich.edu 0x1: cvt_d_s({{ val = Fs.sf; }}, ToDouble); 10962686Sksewell@umich.edu 0x4: cvt_w_s({{ val = Fs.sf; }}, ToWord); 10972686Sksewell@umich.edu 0x5: cvt_l_s({{ val = Fs.sf; }}, ToLong); 10982101SN/A } 10992055SN/A 11002686Sksewell@umich.edu 0x6: FloatOp::cvt_ps_s({{ 11016384Sgblack@eecs.umich.edu Fd.ud = (uint64_t) Fs.uw << 32 | 11026384Sgblack@eecs.umich.edu (uint64_t) Ft.uw; 11036384Sgblack@eecs.umich.edu }}); 11045222Sksewell@umich.edu format CP1Unimpl { 11056384Sgblack@eecs.umich.edu default: unknown(); 11065222Sksewell@umich.edu } 11072101SN/A } 11085222Sksewell@umich.edu 0x5: CP1Unimpl::unknown(); 11092602SN/A 11102602SN/A 0x6: decode FUNCTION_LO { 11112603SN/A format FloatCompareOp { 11126384Sgblack@eecs.umich.edu 0x0: c_f_s({{ cond = 0; }}, 11136384Sgblack@eecs.umich.edu SinglePrecision, UnorderedFalse); 11146384Sgblack@eecs.umich.edu 0x1: c_un_s({{ cond = 0; }}, 11156384Sgblack@eecs.umich.edu SinglePrecision, UnorderedTrue); 11162686Sksewell@umich.edu 0x2: c_eq_s({{ cond = (Fs.sf == Ft.sf); }}, 11172686Sksewell@umich.edu UnorderedFalse); 11182686Sksewell@umich.edu 0x3: c_ueq_s({{ cond = (Fs.sf == Ft.sf); }}, 11192686Sksewell@umich.edu UnorderedTrue); 11207799Sgblack@eecs.umich.edu 0x4: c_olt_s({{ cond = (Fs.sf < Ft.sf); }}, 11212686Sksewell@umich.edu UnorderedFalse); 11222686Sksewell@umich.edu 0x5: c_ult_s({{ cond = (Fs.sf < Ft.sf); }}, 11232686Sksewell@umich.edu UnorderedTrue); 11242686Sksewell@umich.edu 0x6: c_ole_s({{ cond = (Fs.sf <= Ft.sf); }}, 11252686Sksewell@umich.edu UnorderedFalse); 11262686Sksewell@umich.edu 0x7: c_ule_s({{ cond = (Fs.sf <= Ft.sf); }}, 11272686Sksewell@umich.edu UnorderedTrue); 11282602SN/A } 11292602SN/A } 11302602SN/A 11312602SN/A 0x7: decode FUNCTION_LO { 11322686Sksewell@umich.edu format FloatCompareOp { 11332686Sksewell@umich.edu 0x0: c_sf_s({{ cond = 0; }}, SinglePrecision, 11342686Sksewell@umich.edu UnorderedFalse, QnanException); 11352686Sksewell@umich.edu 0x1: c_ngle_s({{ cond = 0; }}, SinglePrecision, 11362686Sksewell@umich.edu UnorderedTrue, QnanException); 11376384Sgblack@eecs.umich.edu 0x2: c_seq_s({{ cond = (Fs.sf == Ft.sf); }}, 11382686Sksewell@umich.edu UnorderedFalse, QnanException); 11392686Sksewell@umich.edu 0x3: c_ngl_s({{ cond = (Fs.sf == Ft.sf); }}, 11402686Sksewell@umich.edu UnorderedTrue, QnanException); 11412686Sksewell@umich.edu 0x4: c_lt_s({{ cond = (Fs.sf < Ft.sf); }}, 11422686Sksewell@umich.edu UnorderedFalse, QnanException); 11432686Sksewell@umich.edu 0x5: c_nge_s({{ cond = (Fs.sf < Ft.sf); }}, 11442686Sksewell@umich.edu UnorderedTrue, QnanException); 11452686Sksewell@umich.edu 0x6: c_le_s({{ cond = (Fs.sf <= Ft.sf); }}, 11462686Sksewell@umich.edu UnorderedFalse, QnanException); 11472686Sksewell@umich.edu 0x7: c_ngt_s({{ cond = (Fs.sf <= Ft.sf); }}, 11482686Sksewell@umich.edu UnorderedTrue, QnanException); 11492602SN/A } 11502602SN/A } 11512101SN/A } 11522055SN/A 11536384Sgblack@eecs.umich.edu //Table A-15 MIPS32 COP1 Encoding of Function Field When 11546384Sgblack@eecs.umich.edu //rs=D 11552572SN/A 0x1: decode FUNCTION_HI { 11562572SN/A 0x0: decode FUNCTION_LO { 11572101SN/A format FloatOp { 11582686Sksewell@umich.edu 0x0: add_d({{ Fd.df = Fs.df + Ft.df; }}); 11592686Sksewell@umich.edu 0x1: sub_d({{ Fd.df = Fs.df - Ft.df; }}); 11602686Sksewell@umich.edu 0x2: mul_d({{ Fd.df = Fs.df * Ft.df; }}); 11612686Sksewell@umich.edu 0x3: div_d({{ Fd.df = Fs.df / Ft.df; }}); 11626384Sgblack@eecs.umich.edu 0x4: sqrt_d({{ Fd.df = sqrt(Fs.df); }}); 11636384Sgblack@eecs.umich.edu 0x5: abs_d({{ Fd.df = fabs(Fs.df); }}); 11646384Sgblack@eecs.umich.edu 0x7: neg_d({{ Fd.df = -1 * Fs.df; }}); 11652101SN/A } 11666384Sgblack@eecs.umich.edu 0x6: BasicOp::mov_d({{ Fd.df = Fs.df; }}); 11672101SN/A } 11682027SN/A 11692572SN/A 0x1: decode FUNCTION_LO { 11702686Sksewell@umich.edu format FloatConvertOp { 11716384Sgblack@eecs.umich.edu 0x0: round_l_d({{ val = Fs.df; }}, 11726384Sgblack@eecs.umich.edu ToLong, Round); 11736384Sgblack@eecs.umich.edu 0x1: trunc_l_d({{ val = Fs.df; }}, 11746384Sgblack@eecs.umich.edu ToLong, Trunc); 11756384Sgblack@eecs.umich.edu 0x2: ceil_l_d({{ val = Fs.df; }}, 11766384Sgblack@eecs.umich.edu ToLong, Ceil); 11776384Sgblack@eecs.umich.edu 0x3: floor_l_d({{ val = Fs.df; }}, 11786384Sgblack@eecs.umich.edu ToLong, Floor); 11796384Sgblack@eecs.umich.edu 0x4: round_w_d({{ val = Fs.df; }}, 11806384Sgblack@eecs.umich.edu ToWord, Round); 11816384Sgblack@eecs.umich.edu 0x5: trunc_w_d({{ val = Fs.df; }}, 11826384Sgblack@eecs.umich.edu ToWord, Trunc); 11836384Sgblack@eecs.umich.edu 0x6: ceil_w_d({{ val = Fs.df; }}, 11846384Sgblack@eecs.umich.edu ToWord, Ceil); 11856384Sgblack@eecs.umich.edu 0x7: floor_w_d({{ val = Fs.df; }}, 11866384Sgblack@eecs.umich.edu ToWord, Floor); 11872101SN/A } 11882101SN/A } 11892027SN/A 11902572SN/A 0x2: decode FUNCTION_LO { 11912101SN/A 0x1: decode MOVCF { 11922686Sksewell@umich.edu format BasicOp { 11936384Sgblack@eecs.umich.edu 0x0: movf_d({{ 11946384Sgblack@eecs.umich.edu Fd.df = (getCondCode(FCSR,CC) == 0) ? 11952686Sksewell@umich.edu Fs.df : Fd.df; 11966384Sgblack@eecs.umich.edu }}); 11976384Sgblack@eecs.umich.edu 0x1: movt_d({{ 11986384Sgblack@eecs.umich.edu Fd.df = (getCondCode(FCSR,CC) == 1) ? 11992686Sksewell@umich.edu Fs.df : Fd.df; 12006384Sgblack@eecs.umich.edu }}); 12012101SN/A } 12022101SN/A } 12032027SN/A 12042101SN/A format BasicOp { 12056384Sgblack@eecs.umich.edu 0x2: movz_d({{ 12066384Sgblack@eecs.umich.edu Fd.df = (Rt == 0) ? Fs.df : Fd.df; 12076384Sgblack@eecs.umich.edu }}); 12086384Sgblack@eecs.umich.edu 0x3: movn_d({{ 12096384Sgblack@eecs.umich.edu Fd.df = (Rt != 0) ? Fs.df : Fd.df; 12106384Sgblack@eecs.umich.edu }}); 12112101SN/A } 12122027SN/A 12132605SN/A format FloatOp { 12146384Sgblack@eecs.umich.edu 0x5: recip_d({{ Fd.df = 1 / Fs.df; }}); 12156384Sgblack@eecs.umich.edu 0x6: rsqrt_d({{ Fd.df = 1 / sqrt(Fs.df); }}); 12162101SN/A } 12175222Sksewell@umich.edu format CP1Unimpl { 12186384Sgblack@eecs.umich.edu default: unknown(); 12195222Sksewell@umich.edu } 12205222Sksewell@umich.edu 12212101SN/A } 12222572SN/A 0x4: decode FUNCTION_LO { 12232686Sksewell@umich.edu format FloatConvertOp { 12242686Sksewell@umich.edu 0x0: cvt_s_d({{ val = Fs.df; }}, ToSingle); 12252686Sksewell@umich.edu 0x4: cvt_w_d({{ val = Fs.df; }}, ToWord); 12262686Sksewell@umich.edu 0x5: cvt_l_d({{ val = Fs.df; }}, ToLong); 12272101SN/A } 12286384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 12292101SN/A } 12302602SN/A 12312602SN/A 0x6: decode FUNCTION_LO { 12322604SN/A format FloatCompareOp { 12336384Sgblack@eecs.umich.edu 0x0: c_f_d({{ cond = 0; }}, 12346384Sgblack@eecs.umich.edu DoublePrecision, UnorderedFalse); 12356384Sgblack@eecs.umich.edu 0x1: c_un_d({{ cond = 0; }}, 12366384Sgblack@eecs.umich.edu DoublePrecision, UnorderedTrue); 12372686Sksewell@umich.edu 0x2: c_eq_d({{ cond = (Fs.df == Ft.df); }}, 12382686Sksewell@umich.edu UnorderedFalse); 12392686Sksewell@umich.edu 0x3: c_ueq_d({{ cond = (Fs.df == Ft.df); }}, 12402686Sksewell@umich.edu UnorderedTrue); 12417799Sgblack@eecs.umich.edu 0x4: c_olt_d({{ cond = (Fs.df < Ft.df); }}, 12422686Sksewell@umich.edu UnorderedFalse); 12432686Sksewell@umich.edu 0x5: c_ult_d({{ cond = (Fs.df < Ft.df); }}, 12442686Sksewell@umich.edu UnorderedTrue); 12452686Sksewell@umich.edu 0x6: c_ole_d({{ cond = (Fs.df <= Ft.df); }}, 12462686Sksewell@umich.edu UnorderedFalse); 12472686Sksewell@umich.edu 0x7: c_ule_d({{ cond = (Fs.df <= Ft.df); }}, 12482686Sksewell@umich.edu UnorderedTrue); 12492602SN/A } 12502602SN/A } 12512602SN/A 12522602SN/A 0x7: decode FUNCTION_LO { 12532686Sksewell@umich.edu format FloatCompareOp { 12542686Sksewell@umich.edu 0x0: c_sf_d({{ cond = 0; }}, DoublePrecision, 12552686Sksewell@umich.edu UnorderedFalse, QnanException); 12562686Sksewell@umich.edu 0x1: c_ngle_d({{ cond = 0; }}, DoublePrecision, 12572686Sksewell@umich.edu UnorderedTrue, QnanException); 12582686Sksewell@umich.edu 0x2: c_seq_d({{ cond = (Fs.df == Ft.df); }}, 12592686Sksewell@umich.edu UnorderedFalse, QnanException); 12602686Sksewell@umich.edu 0x3: c_ngl_d({{ cond = (Fs.df == Ft.df); }}, 12612686Sksewell@umich.edu UnorderedTrue, QnanException); 12622686Sksewell@umich.edu 0x4: c_lt_d({{ cond = (Fs.df < Ft.df); }}, 12632686Sksewell@umich.edu UnorderedFalse, QnanException); 12642686Sksewell@umich.edu 0x5: c_nge_d({{ cond = (Fs.df < Ft.df); }}, 12652686Sksewell@umich.edu UnorderedTrue, QnanException); 12662686Sksewell@umich.edu 0x6: c_le_d({{ cond = (Fs.df <= Ft.df); }}, 12672686Sksewell@umich.edu UnorderedFalse, QnanException); 12682686Sksewell@umich.edu 0x7: c_ngt_d({{ cond = (Fs.df <= Ft.df); }}, 12692686Sksewell@umich.edu UnorderedTrue, QnanException); 12702602SN/A } 12712602SN/A } 12726384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 12732101SN/A } 12745222Sksewell@umich.edu 0x2: CP1Unimpl::unknown(); 12755222Sksewell@umich.edu 0x3: CP1Unimpl::unknown(); 12765222Sksewell@umich.edu 0x7: CP1Unimpl::unknown(); 12772027SN/A 12786384Sgblack@eecs.umich.edu //Table A-16 MIPS32 COP1 Encoding of Function 12796384Sgblack@eecs.umich.edu //Field When rs=W 12802101SN/A 0x4: decode FUNCTION { 12812605SN/A format FloatConvertOp { 12822686Sksewell@umich.edu 0x20: cvt_s_w({{ val = Fs.uw; }}, ToSingle); 12832686Sksewell@umich.edu 0x21: cvt_d_w({{ val = Fs.uw; }}, ToDouble); 12845222Sksewell@umich.edu 0x26: CP1Unimpl::cvt_ps_w(); 12852101SN/A } 12866384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 12872101SN/A } 12882027SN/A 12896384Sgblack@eecs.umich.edu //Table A-16 MIPS32 COP1 Encoding of Function Field 12906384Sgblack@eecs.umich.edu //When rs=L1 12916384Sgblack@eecs.umich.edu //Note: "1. Format type L is legal only if 64-bit 12926384Sgblack@eecs.umich.edu //floating point operations are enabled." 12932101SN/A 0x5: decode FUNCTION_HI { 12942686Sksewell@umich.edu format FloatConvertOp { 12952686Sksewell@umich.edu 0x20: cvt_s_l({{ val = Fs.ud; }}, ToSingle); 12962686Sksewell@umich.edu 0x21: cvt_d_l({{ val = Fs.ud; }}, ToDouble); 12975222Sksewell@umich.edu 0x26: CP1Unimpl::cvt_ps_l(); 12982101SN/A } 12996384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 13002101SN/A } 13012101SN/A 13026384Sgblack@eecs.umich.edu //Table A-17 MIPS64 COP1 Encoding of Function Field 13036384Sgblack@eecs.umich.edu //When rs=PS1 13046384Sgblack@eecs.umich.edu //Note: "1. Format type PS is legal only if 64-bit 13056384Sgblack@eecs.umich.edu //floating point operations are enabled. " 13062572SN/A 0x6: decode FUNCTION_HI { 13072572SN/A 0x0: decode FUNCTION_LO { 13082101SN/A format Float64Op { 13092605SN/A 0x0: add_ps({{ 13102607SN/A Fd1.sf = Fs1.sf + Ft2.sf; 13112607SN/A Fd2.sf = Fs2.sf + Ft2.sf; 13122101SN/A }}); 13132605SN/A 0x1: sub_ps({{ 13142607SN/A Fd1.sf = Fs1.sf - Ft2.sf; 13152607SN/A Fd2.sf = Fs2.sf - Ft2.sf; 13162101SN/A }}); 13172605SN/A 0x2: mul_ps({{ 13182607SN/A Fd1.sf = Fs1.sf * Ft2.sf; 13192607SN/A Fd2.sf = Fs2.sf * Ft2.sf; 13202101SN/A }}); 13212605SN/A 0x5: abs_ps({{ 13222607SN/A Fd1.sf = fabs(Fs1.sf); 13232607SN/A Fd2.sf = fabs(Fs2.sf); 13242101SN/A }}); 13252605SN/A 0x6: mov_ps({{ 13262607SN/A Fd1.sf = Fs1.sf; 13272607SN/A Fd2.sf = Fs2.sf; 13282101SN/A }}); 13292605SN/A 0x7: neg_ps({{ 13302686Sksewell@umich.edu Fd1.sf = -(Fs1.sf); 13312686Sksewell@umich.edu Fd2.sf = -(Fs2.sf); 13322101SN/A }}); 13336384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 13342101SN/A } 13352101SN/A } 13365222Sksewell@umich.edu 0x1: CP1Unimpl::unknown(); 13372572SN/A 0x2: decode FUNCTION_LO { 13382101SN/A 0x1: decode MOVCF { 13392101SN/A format Float64Op { 13402607SN/A 0x0: movf_ps({{ 13412686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 0) ? 13422686Sksewell@umich.edu Fs1 : Fd1; 13432686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC+1) == 0) ? 13442686Sksewell@umich.edu Fs2 : Fd2; 13452607SN/A }}); 13462607SN/A 0x1: movt_ps({{ 13472686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 1) ? 13482686Sksewell@umich.edu Fs1 : Fd1; 13492686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC+1) == 1) ? 13502686Sksewell@umich.edu Fs2 : Fd2; 13512607SN/A }}); 13522101SN/A } 13532101SN/A } 13542101SN/A 13552605SN/A format Float64Op { 13562607SN/A 0x2: movz_ps({{ 13572686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 0) ? 13582686Sksewell@umich.edu Fs1 : Fd1; 13592686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 0) ? 13602686Sksewell@umich.edu Fs2 : Fd2; 13612607SN/A }}); 13622607SN/A 0x3: movn_ps({{ 13632686Sksewell@umich.edu Fd1 = (getCondCode(FCSR, CC) == 1) ? 13642686Sksewell@umich.edu Fs1 : Fd1; 13652686Sksewell@umich.edu Fd2 = (getCondCode(FCSR, CC) == 1) ? 13662686Sksewell@umich.edu Fs2 : Fd2; 13672607SN/A }}); 13682135SN/A } 13696384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 13702101SN/A } 13715222Sksewell@umich.edu 0x3: CP1Unimpl::unknown(); 13722572SN/A 0x4: decode FUNCTION_LO { 13732686Sksewell@umich.edu 0x0: FloatOp::cvt_s_pu({{ Fd.sf = Fs2.sf; }}); 13745222Sksewell@umich.edu default: CP1Unimpl::unknown(); 13752101SN/A } 13762101SN/A 13772572SN/A 0x5: decode FUNCTION_LO { 13782686Sksewell@umich.edu 0x0: FloatOp::cvt_s_pl({{ Fd.sf = Fs1.sf; }}); 13792101SN/A format Float64Op { 13806384Sgblack@eecs.umich.edu 0x4: pll({{ 13816384Sgblack@eecs.umich.edu Fd.ud = (uint64_t)Fs1.uw << 32 | Ft1.uw; 13826384Sgblack@eecs.umich.edu }}); 13836384Sgblack@eecs.umich.edu 0x5: plu({{ 13846384Sgblack@eecs.umich.edu Fd.ud = (uint64_t)Fs1.uw << 32 | Ft2.uw; 13856384Sgblack@eecs.umich.edu }}); 13866384Sgblack@eecs.umich.edu 0x6: pul({{ 13876384Sgblack@eecs.umich.edu Fd.ud = (uint64_t)Fs2.uw << 32 | Ft1.uw; 13886384Sgblack@eecs.umich.edu }}); 13896384Sgblack@eecs.umich.edu 0x7: puu({{ 13906384Sgblack@eecs.umich.edu Fd.ud = (uint64_t)Fs2.uw << 32 | Ft2.uw; 13916384Sgblack@eecs.umich.edu }}); 13922101SN/A } 13935222Sksewell@umich.edu default: CP1Unimpl::unknown(); 13942101SN/A } 13952602SN/A 13962602SN/A 0x6: decode FUNCTION_LO { 13972608SN/A format FloatPSCompareOp { 13982686Sksewell@umich.edu 0x0: c_f_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 13992686Sksewell@umich.edu UnorderedFalse); 14002686Sksewell@umich.edu 0x1: c_un_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 14012686Sksewell@umich.edu UnorderedTrue); 14022686Sksewell@umich.edu 0x2: c_eq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 14032686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 14042686Sksewell@umich.edu UnorderedFalse); 14052686Sksewell@umich.edu 0x3: c_ueq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 14062686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 14072686Sksewell@umich.edu UnorderedTrue); 14082686Sksewell@umich.edu 0x4: c_olt_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 14092686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 14102686Sksewell@umich.edu UnorderedFalse); 14112686Sksewell@umich.edu 0x5: c_ult_ps({{ cond1 = (Fs.sf < Ft.sf); }}, 14122686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 14132686Sksewell@umich.edu UnorderedTrue); 14142686Sksewell@umich.edu 0x6: c_ole_ps({{ cond1 = (Fs.sf <= Ft.sf); }}, 14152686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 14162686Sksewell@umich.edu UnorderedFalse); 14172686Sksewell@umich.edu 0x7: c_ule_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 14182686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 14192686Sksewell@umich.edu UnorderedTrue); 14202602SN/A } 14212602SN/A } 14222602SN/A 14232602SN/A 0x7: decode FUNCTION_LO { 14242686Sksewell@umich.edu format FloatPSCompareOp { 14252686Sksewell@umich.edu 0x0: c_sf_ps({{ cond1 = 0; }}, {{ cond2 = 0; }}, 14262686Sksewell@umich.edu UnorderedFalse, QnanException); 14272686Sksewell@umich.edu 0x1: c_ngle_ps({{ cond1 = 0; }}, 14282686Sksewell@umich.edu {{ cond2 = 0; }}, 14292686Sksewell@umich.edu UnorderedTrue, QnanException); 14302686Sksewell@umich.edu 0x2: c_seq_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 14312686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 14322686Sksewell@umich.edu UnorderedFalse, QnanException); 14332686Sksewell@umich.edu 0x3: c_ngl_ps({{ cond1 = (Fs1.sf == Ft1.sf); }}, 14342686Sksewell@umich.edu {{ cond2 = (Fs2.sf == Ft2.sf); }}, 14352686Sksewell@umich.edu UnorderedTrue, QnanException); 14362686Sksewell@umich.edu 0x4: c_lt_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 14372686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 14382686Sksewell@umich.edu UnorderedFalse, QnanException); 14392686Sksewell@umich.edu 0x5: c_nge_ps({{ cond1 = (Fs1.sf < Ft1.sf); }}, 14402686Sksewell@umich.edu {{ cond2 = (Fs2.sf < Ft2.sf); }}, 14412686Sksewell@umich.edu UnorderedTrue, QnanException); 14422686Sksewell@umich.edu 0x6: c_le_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 14432686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 14442686Sksewell@umich.edu UnorderedFalse, QnanException); 14452686Sksewell@umich.edu 0x7: c_ngt_ps({{ cond1 = (Fs1.sf <= Ft1.sf); }}, 14462686Sksewell@umich.edu {{ cond2 = (Fs2.sf <= Ft2.sf); }}, 14472686Sksewell@umich.edu UnorderedTrue, QnanException); 14482602SN/A } 14492602SN/A } 14502101SN/A } 14512101SN/A } 14526384Sgblack@eecs.umich.edu default: CP1Unimpl::unknown(); 14532101SN/A } 14542101SN/A } 14552101SN/A 14562101SN/A //Table A-19 MIPS32 COP2 Encoding of rs Field 14572101SN/A 0x2: decode RS_MSB { 14585222Sksewell@umich.edu format CP2Unimpl { 14592686Sksewell@umich.edu 0x0: decode RS_HI { 14602686Sksewell@umich.edu 0x0: decode RS_LO { 14612101SN/A 0x0: mfc2(); 14622101SN/A 0x2: cfc2(); 14632101SN/A 0x3: mfhc2(); 14642101SN/A 0x4: mtc2(); 14652101SN/A 0x6: ctc2(); 14662101SN/A 0x7: mftc2(); 14676384Sgblack@eecs.umich.edu default: unknown(); 14682101SN/A } 14692101SN/A 14702686Sksewell@umich.edu 0x1: decode ND { 14712686Sksewell@umich.edu 0x0: decode TF { 14722101SN/A 0x0: bc2f(); 14732101SN/A 0x1: bc2t(); 14746384Sgblack@eecs.umich.edu default: unknown(); 14752101SN/A } 14762101SN/A 14772686Sksewell@umich.edu 0x1: decode TF { 14782101SN/A 0x0: bc2fl(); 14792101SN/A 0x1: bc2tl(); 14806384Sgblack@eecs.umich.edu default: unknown(); 14812101SN/A } 14826384Sgblack@eecs.umich.edu default: unknown(); 14835222Sksewell@umich.edu 14846384Sgblack@eecs.umich.edu } 14856384Sgblack@eecs.umich.edu default: unknown(); 14866384Sgblack@eecs.umich.edu } 14876384Sgblack@eecs.umich.edu default: unknown(); 14882101SN/A } 14892101SN/A } 14902101SN/A 14912101SN/A //Table A-20 MIPS64 COP1X Encoding of Function Field 1 14922101SN/A //Note: "COP1X instructions are legal only if 64-bit floating point 14932101SN/A //operations are enabled." 14942101SN/A 0x3: decode FUNCTION_HI { 14952101SN/A 0x0: decode FUNCTION_LO { 14962686Sksewell@umich.edu format LoadIndexedMemory { 14976384Sgblack@eecs.umich.edu 0x0: lwxc1({{ Fd.uw = Mem.uw; }}); 14986384Sgblack@eecs.umich.edu 0x1: ldxc1({{ Fd.ud = Mem.ud; }}); 14996384Sgblack@eecs.umich.edu 0x5: luxc1({{ Fd.ud = Mem.ud; }}, 15002742Sksewell@umich.edu {{ EA = (Rs + Rt) & ~7; }}); 15012101SN/A } 15022043SN/A } 15032027SN/A 15042101SN/A 0x1: decode FUNCTION_LO { 15052686Sksewell@umich.edu format StoreIndexedMemory { 15066384Sgblack@eecs.umich.edu 0x0: swxc1({{ Mem.uw = Fs.uw; }}); 15076384Sgblack@eecs.umich.edu 0x1: sdxc1({{ Mem.ud = Fs.ud; }}); 15086384Sgblack@eecs.umich.edu 0x5: suxc1({{ Mem.ud = Fs.ud; }}, 15092742Sksewell@umich.edu {{ EA = (Rs + Rt) & ~7; }}); 15102046SN/A } 15112686Sksewell@umich.edu 0x7: Prefetch::prefx({{ EA = Rs + Rt; }}); 15122101SN/A } 15132027SN/A 15142686Sksewell@umich.edu 0x3: decode FUNCTION_LO { 15156384Sgblack@eecs.umich.edu 0x6: Float64Op::alnv_ps({{ 15166384Sgblack@eecs.umich.edu if (Rs<2:0> == 0) { 15176384Sgblack@eecs.umich.edu Fd.ud = Fs.ud; 15186384Sgblack@eecs.umich.edu } else if (Rs<2:0> == 4) { 15196384Sgblack@eecs.umich.edu#if BYTE_ORDER == BIG_ENDIAN 15206384Sgblack@eecs.umich.edu Fd.ud = Fs.ud<31:0> << 32 | Ft.ud<63:32>; 15216384Sgblack@eecs.umich.edu#elif BYTE_ORDER == LITTLE_ENDIAN 15226384Sgblack@eecs.umich.edu Fd.ud = Ft.ud<31:0> << 32 | Fs.ud<63:32>; 15236384Sgblack@eecs.umich.edu#endif 15246384Sgblack@eecs.umich.edu } else { 15256384Sgblack@eecs.umich.edu Fd.ud = Fd.ud; 15266384Sgblack@eecs.umich.edu } 15276384Sgblack@eecs.umich.edu }}); 15282686Sksewell@umich.edu } 15292027SN/A 15302686Sksewell@umich.edu format FloatAccOp { 15312686Sksewell@umich.edu 0x4: decode FUNCTION_LO { 15322686Sksewell@umich.edu 0x0: madd_s({{ Fd.sf = (Fs.sf * Ft.sf) + Fr.sf; }}); 15332686Sksewell@umich.edu 0x1: madd_d({{ Fd.df = (Fs.df * Ft.df) + Fr.df; }}); 15342686Sksewell@umich.edu 0x6: madd_ps({{ 15352686Sksewell@umich.edu Fd1.sf = (Fs1.df * Ft1.df) + Fr1.df; 15362686Sksewell@umich.edu Fd2.sf = (Fs2.df * Ft2.df) + Fr2.df; 15372686Sksewell@umich.edu }}); 15382686Sksewell@umich.edu } 15392027SN/A 15402686Sksewell@umich.edu 0x5: decode FUNCTION_LO { 15412686Sksewell@umich.edu 0x0: msub_s({{ Fd.sf = (Fs.sf * Ft.sf) - Fr.sf; }}); 15422686Sksewell@umich.edu 0x1: msub_d({{ Fd.df = (Fs.df * Ft.df) - Fr.df; }}); 15432686Sksewell@umich.edu 0x6: msub_ps({{ 15442686Sksewell@umich.edu Fd1.sf = (Fs1.df * Ft1.df) - Fr1.df; 15452686Sksewell@umich.edu Fd2.sf = (Fs2.df * Ft2.df) - Fr2.df; 15462686Sksewell@umich.edu }}); 15472686Sksewell@umich.edu } 15482027SN/A 15492686Sksewell@umich.edu 0x6: decode FUNCTION_LO { 15502686Sksewell@umich.edu 0x0: nmadd_s({{ Fd.sf = (-1 * Fs.sf * Ft.sf) - Fr.sf; }}); 15512686Sksewell@umich.edu 0x1: nmadd_d({{ Fd.df = (-1 * Fs.df * Ft.df) + Fr.df; }}); 15522686Sksewell@umich.edu 0x6: nmadd_ps({{ 15532686Sksewell@umich.edu Fd1.sf = -((Fs1.df * Ft1.df) + Fr1.df); 15542686Sksewell@umich.edu Fd2.sf = -((Fs2.df * Ft2.df) + Fr2.df); 15552686Sksewell@umich.edu }}); 15562686Sksewell@umich.edu } 15572027SN/A 15582686Sksewell@umich.edu 0x7: decode FUNCTION_LO { 15592686Sksewell@umich.edu 0x0: nmsub_s({{ Fd.sf = (-1 * Fs.sf * Ft.sf) - Fr.sf; }}); 15602686Sksewell@umich.edu 0x1: nmsub_d({{ Fd.df = (-1 * Fs.df * Ft.df) - Fr.df; }}); 15612686Sksewell@umich.edu 0x6: nmsub_ps({{ 15622686Sksewell@umich.edu Fd1.sf = -((Fs1.df * Ft1.df) - Fr1.df); 15632686Sksewell@umich.edu Fd2.sf = -((Fs2.df * Ft2.df) - Fr2.df); 15642686Sksewell@umich.edu }}); 15652046SN/A } 15662101SN/A } 15672043SN/A } 15682025SN/A 15692686Sksewell@umich.edu format Branch { 15702686Sksewell@umich.edu 0x4: beql({{ cond = (Rs.sw == Rt.sw); }}, Likely); 15712686Sksewell@umich.edu 0x5: bnel({{ cond = (Rs.sw != Rt.sw); }}, Likely); 15722686Sksewell@umich.edu 0x6: blezl({{ cond = (Rs.sw <= 0); }}, Likely); 15732686Sksewell@umich.edu 0x7: bgtzl({{ cond = (Rs.sw > 0); }}, Likely); 15742046SN/A } 15752084SN/A } 15762024SN/A 15772686Sksewell@umich.edu 0x3: decode OPCODE_LO { 15782043SN/A //Table A-5 MIPS32 SPECIAL2 Encoding of Function Field 15792043SN/A 0x4: decode FUNCTION_HI { 15802686Sksewell@umich.edu 0x0: decode FUNCTION_LO { 15816384Sgblack@eecs.umich.edu 0x2: IntOp::mul({{ 15826384Sgblack@eecs.umich.edu int64_t temp1 = Rs.sd * Rt.sd; 15836384Sgblack@eecs.umich.edu Rd.sw = temp1<31:0>; 15846384Sgblack@eecs.umich.edu }}, IntMultOp); 15852027SN/A 15864661Sksewell@umich.edu format HiLoRdSelValOp { 15876384Sgblack@eecs.umich.edu 0x0: madd({{ 15886384Sgblack@eecs.umich.edu val = ((int64_t)HI_RD_SEL << 32 | LO_RD_SEL) + 15896384Sgblack@eecs.umich.edu (Rs.sd * Rt.sd); 15906384Sgblack@eecs.umich.edu }}, IntMultOp); 15916384Sgblack@eecs.umich.edu 0x1: maddu({{ 15926384Sgblack@eecs.umich.edu val = ((uint64_t)HI_RD_SEL << 32 | LO_RD_SEL) + 15936384Sgblack@eecs.umich.edu (Rs.ud * Rt.ud); 15946384Sgblack@eecs.umich.edu }}, IntMultOp); 15956384Sgblack@eecs.umich.edu 0x4: msub({{ 15966384Sgblack@eecs.umich.edu val = ((int64_t)HI_RD_SEL << 32 | LO_RD_SEL) - 15976384Sgblack@eecs.umich.edu (Rs.sd * Rt.sd); 15986384Sgblack@eecs.umich.edu }}, IntMultOp); 15996384Sgblack@eecs.umich.edu 0x5: msubu({{ 16006384Sgblack@eecs.umich.edu val = ((uint64_t)HI_RD_SEL << 32 | LO_RD_SEL) - 16016384Sgblack@eecs.umich.edu (Rs.ud * Rt.ud); 16026384Sgblack@eecs.umich.edu }}, IntMultOp); 16032043SN/A } 16042043SN/A } 16052027SN/A 16062043SN/A 0x4: decode FUNCTION_LO { 16072101SN/A format BasicOp { 16086384Sgblack@eecs.umich.edu 0x0: clz({{ 16096384Sgblack@eecs.umich.edu int cnt = 32; 16106384Sgblack@eecs.umich.edu for (int idx = 31; idx >= 0; idx--) { 16116384Sgblack@eecs.umich.edu if (Rs<idx:idx> == 1) { 16126384Sgblack@eecs.umich.edu cnt = 31 - idx; 16136384Sgblack@eecs.umich.edu break; 16146384Sgblack@eecs.umich.edu } 16156384Sgblack@eecs.umich.edu } 16166384Sgblack@eecs.umich.edu Rd.uw = cnt; 16176384Sgblack@eecs.umich.edu }}); 16186384Sgblack@eecs.umich.edu 0x1: clo({{ 16196384Sgblack@eecs.umich.edu int cnt = 32; 16206384Sgblack@eecs.umich.edu for (int idx = 31; idx >= 0; idx--) { 16216384Sgblack@eecs.umich.edu if (Rs<idx:idx> == 0) { 16226384Sgblack@eecs.umich.edu cnt = 31 - idx; 16236384Sgblack@eecs.umich.edu break; 16246384Sgblack@eecs.umich.edu } 16256384Sgblack@eecs.umich.edu } 16266384Sgblack@eecs.umich.edu Rd.uw = cnt; 16276384Sgblack@eecs.umich.edu }}); 16282101SN/A } 16292043SN/A } 16302027SN/A 16312043SN/A 0x7: decode FUNCTION_LO { 16322686Sksewell@umich.edu 0x7: FailUnimpl::sdbbp(); 16332043SN/A } 16342043SN/A } 16352024SN/A 16362686Sksewell@umich.edu //Table A-6 MIPS32 SPECIAL3 Encoding of Function Field for Release 2 16372686Sksewell@umich.edu //of the Architecture 16382043SN/A 0x7: decode FUNCTION_HI { 16392101SN/A 0x0: decode FUNCTION_LO { 16402686Sksewell@umich.edu format BasicOp { 16412742Sksewell@umich.edu 0x0: ext({{ Rt.uw = bits(Rs.uw, MSB+LSB, LSB); }}); 16426384Sgblack@eecs.umich.edu 0x4: ins({{ 16436384Sgblack@eecs.umich.edu Rt.uw = bits(Rt.uw, 31, MSB+1) << (MSB+1) | 16446384Sgblack@eecs.umich.edu bits(Rs.uw, MSB-LSB, 0) << LSB | 16456384Sgblack@eecs.umich.edu bits(Rt.uw, LSB-1, 0); 16466384Sgblack@eecs.umich.edu }}); 16472046SN/A } 16482101SN/A } 16492026SN/A 16502101SN/A 0x1: decode FUNCTION_LO { 16514661Sksewell@umich.edu format MT_Control { 16526384Sgblack@eecs.umich.edu 0x0: fork({{ 16536384Sgblack@eecs.umich.edu forkThread(xc->tcBase(), fault, RD, Rs, Rt); 16546384Sgblack@eecs.umich.edu }}, UserMode); 16556384Sgblack@eecs.umich.edu 0x1: yield({{ 16566384Sgblack@eecs.umich.edu Rd.sw = yieldThread(xc->tcBase(), fault, Rs.sw, 16576384Sgblack@eecs.umich.edu YQMask); 16586384Sgblack@eecs.umich.edu }}, UserMode); 16594661Sksewell@umich.edu } 16604661Sksewell@umich.edu 16614661Sksewell@umich.edu //Table 5-9 MIPS32 LX Encoding of the op Field (DSP ASE MANUAL) 16624661Sksewell@umich.edu 0x2: decode OP_HI { 16634661Sksewell@umich.edu 0x0: decode OP_LO { 16644661Sksewell@umich.edu format LoadIndexedMemory { 16654661Sksewell@umich.edu 0x0: lwx({{ Rd.sw = Mem.sw; }}); 16664661Sksewell@umich.edu 0x4: lhx({{ Rd.sw = Mem.sh; }}); 16674661Sksewell@umich.edu 0x6: lbux({{ Rd.uw = Mem.ub; }}); 16684661Sksewell@umich.edu } 16694661Sksewell@umich.edu } 16704661Sksewell@umich.edu } 16716384Sgblack@eecs.umich.edu 0x4: DspIntOp::insv({{ 16726384Sgblack@eecs.umich.edu int pos = dspctl<5:0>; 16736384Sgblack@eecs.umich.edu int size = dspctl<12:7> - 1; 16746384Sgblack@eecs.umich.edu Rt.uw = insertBits(Rt.uw, pos+size, 16756384Sgblack@eecs.umich.edu pos, Rs.uw<size:0>); 16766384Sgblack@eecs.umich.edu }}); 16774661Sksewell@umich.edu } 16784661Sksewell@umich.edu 16794661Sksewell@umich.edu 0x2: decode FUNCTION_LO { 16804661Sksewell@umich.edu 16816384Sgblack@eecs.umich.edu //Table 5-5 MIPS32 ADDU.QB Encoding of the op Field 16826384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 16834661Sksewell@umich.edu 0x0: decode OP_HI { 16844661Sksewell@umich.edu 0x0: decode OP_LO { 16854661Sksewell@umich.edu format DspIntOp { 16866384Sgblack@eecs.umich.edu 0x0: addu_qb({{ 16876384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_QB, 16886384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 16896384Sgblack@eecs.umich.edu }}); 16906384Sgblack@eecs.umich.edu 0x1: subu_qb({{ 16916384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_QB, 16926384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 16936384Sgblack@eecs.umich.edu }}); 16946384Sgblack@eecs.umich.edu 0x4: addu_s_qb({{ 16956384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_QB, 16966384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 16976384Sgblack@eecs.umich.edu }}); 16986384Sgblack@eecs.umich.edu 0x5: subu_s_qb({{ 16996384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_QB, 17006384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 17016384Sgblack@eecs.umich.edu }}); 17026384Sgblack@eecs.umich.edu 0x6: muleu_s_ph_qbl({{ 17036384Sgblack@eecs.umich.edu Rd.uw = dspMuleu(Rs.uw, Rt.uw, 17046384Sgblack@eecs.umich.edu MODE_L, &dspctl); 17056384Sgblack@eecs.umich.edu }}, IntMultOp); 17066384Sgblack@eecs.umich.edu 0x7: muleu_s_ph_qbr({{ 17076384Sgblack@eecs.umich.edu Rd.uw = dspMuleu(Rs.uw, Rt.uw, 17086384Sgblack@eecs.umich.edu MODE_R, &dspctl); 17096384Sgblack@eecs.umich.edu }}, IntMultOp); 17104661Sksewell@umich.edu } 17114661Sksewell@umich.edu } 17124661Sksewell@umich.edu 0x1: decode OP_LO { 17134661Sksewell@umich.edu format DspIntOp { 17146384Sgblack@eecs.umich.edu 0x0: addu_ph({{ 17156384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 17166384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 17176384Sgblack@eecs.umich.edu }}); 17186384Sgblack@eecs.umich.edu 0x1: subu_ph({{ 17196384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 17206384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 17216384Sgblack@eecs.umich.edu }}); 17226384Sgblack@eecs.umich.edu 0x2: addq_ph({{ 17236384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 17246384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 17256384Sgblack@eecs.umich.edu }}); 17266384Sgblack@eecs.umich.edu 0x3: subq_ph({{ 17276384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 17286384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 17296384Sgblack@eecs.umich.edu }}); 17306384Sgblack@eecs.umich.edu 0x4: addu_s_ph({{ 17316384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 17326384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 17336384Sgblack@eecs.umich.edu }}); 17346384Sgblack@eecs.umich.edu 0x5: subu_s_ph({{ 17356384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 17366384Sgblack@eecs.umich.edu SATURATE, UNSIGNED, &dspctl); 17376384Sgblack@eecs.umich.edu }}); 17386384Sgblack@eecs.umich.edu 0x6: addq_s_ph({{ 17396384Sgblack@eecs.umich.edu Rd.uw = dspAdd(Rs.uw, Rt.uw, SIMD_FMT_PH, 17406384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17416384Sgblack@eecs.umich.edu }}); 17426384Sgblack@eecs.umich.edu 0x7: subq_s_ph({{ 17436384Sgblack@eecs.umich.edu Rd.uw = dspSub(Rs.uw, Rt.uw, SIMD_FMT_PH, 17446384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17456384Sgblack@eecs.umich.edu }}); 17464661Sksewell@umich.edu } 17474661Sksewell@umich.edu } 17484661Sksewell@umich.edu 0x2: decode OP_LO { 17494661Sksewell@umich.edu format DspIntOp { 17506384Sgblack@eecs.umich.edu 0x0: addsc({{ 17516384Sgblack@eecs.umich.edu int64_t dresult; 17526384Sgblack@eecs.umich.edu dresult = Rs.ud + Rt.ud; 17536384Sgblack@eecs.umich.edu Rd.sw = dresult<31:0>; 17546384Sgblack@eecs.umich.edu dspctl = insertBits(dspctl, 13, 13, 17556384Sgblack@eecs.umich.edu dresult<32:32>); 17566384Sgblack@eecs.umich.edu }}); 17576384Sgblack@eecs.umich.edu 0x1: addwc({{ 17586384Sgblack@eecs.umich.edu int64_t dresult; 17596384Sgblack@eecs.umich.edu dresult = Rs.sd + Rt.sd + dspctl<13:13>; 17606384Sgblack@eecs.umich.edu Rd.sw = dresult<31:0>; 17616384Sgblack@eecs.umich.edu if (dresult<32:32> != dresult<31:31>) 17626384Sgblack@eecs.umich.edu dspctl = insertBits(dspctl, 20, 20, 1); 17636384Sgblack@eecs.umich.edu }}); 17646384Sgblack@eecs.umich.edu 0x2: modsub({{ 17656384Sgblack@eecs.umich.edu Rd.sw = (Rs.sw == 0) ? Rt.sw<23:8> : 17666384Sgblack@eecs.umich.edu Rs.sw - Rt.sw<7:0>; 17676384Sgblack@eecs.umich.edu }}); 17686384Sgblack@eecs.umich.edu 0x4: raddu_w_qb({{ 17696384Sgblack@eecs.umich.edu Rd.uw = Rs.uw<31:24> + Rs.uw<23:16> + 17706384Sgblack@eecs.umich.edu Rs.uw<15:8> + Rs.uw<7:0>; 17716384Sgblack@eecs.umich.edu }}); 17726384Sgblack@eecs.umich.edu 0x6: addq_s_w({{ 17736384Sgblack@eecs.umich.edu Rd.sw = dspAdd(Rs.sw, Rt.sw, SIMD_FMT_W, 17746384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17756384Sgblack@eecs.umich.edu }}); 17766384Sgblack@eecs.umich.edu 0x7: subq_s_w({{ 17776384Sgblack@eecs.umich.edu Rd.sw = dspSub(Rs.sw, Rt.sw, SIMD_FMT_W, 17786384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 17796384Sgblack@eecs.umich.edu }}); 17804661Sksewell@umich.edu } 17814661Sksewell@umich.edu } 17824661Sksewell@umich.edu 0x3: decode OP_LO { 17834661Sksewell@umich.edu format DspIntOp { 17846384Sgblack@eecs.umich.edu 0x4: muleq_s_w_phl({{ 17856384Sgblack@eecs.umich.edu Rd.sw = dspMuleq(Rs.sw, Rt.sw, 17866384Sgblack@eecs.umich.edu MODE_L, &dspctl); 17876384Sgblack@eecs.umich.edu }}, IntMultOp); 17886384Sgblack@eecs.umich.edu 0x5: muleq_s_w_phr({{ 17896384Sgblack@eecs.umich.edu Rd.sw = dspMuleq(Rs.sw, Rt.sw, 17906384Sgblack@eecs.umich.edu MODE_R, &dspctl); 17916384Sgblack@eecs.umich.edu }}, IntMultOp); 17926384Sgblack@eecs.umich.edu 0x6: mulq_s_ph({{ 17936384Sgblack@eecs.umich.edu Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_PH, 17946384Sgblack@eecs.umich.edu SATURATE, NOROUND, &dspctl); 17956384Sgblack@eecs.umich.edu }}, IntMultOp); 17966384Sgblack@eecs.umich.edu 0x7: mulq_rs_ph({{ 17976384Sgblack@eecs.umich.edu Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_PH, 17986384Sgblack@eecs.umich.edu SATURATE, ROUND, &dspctl); 17996384Sgblack@eecs.umich.edu }}, IntMultOp); 18004661Sksewell@umich.edu } 18014661Sksewell@umich.edu } 18024661Sksewell@umich.edu } 18034661Sksewell@umich.edu 18046384Sgblack@eecs.umich.edu //Table 5-6 MIPS32 CMPU_EQ_QB Encoding of the op Field 18056384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 18064661Sksewell@umich.edu 0x1: decode OP_HI { 18074661Sksewell@umich.edu 0x0: decode OP_LO { 18084661Sksewell@umich.edu format DspIntOp { 18096384Sgblack@eecs.umich.edu 0x0: cmpu_eq_qb({{ 18106384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_QB, 18116384Sgblack@eecs.umich.edu UNSIGNED, CMP_EQ, &dspctl); 18126384Sgblack@eecs.umich.edu }}); 18136384Sgblack@eecs.umich.edu 0x1: cmpu_lt_qb({{ 18146384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_QB, 18156384Sgblack@eecs.umich.edu UNSIGNED, CMP_LT, &dspctl); 18166384Sgblack@eecs.umich.edu }}); 18176384Sgblack@eecs.umich.edu 0x2: cmpu_le_qb({{ 18186384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_QB, 18196384Sgblack@eecs.umich.edu UNSIGNED, CMP_LE, &dspctl); 18206384Sgblack@eecs.umich.edu }}); 18216384Sgblack@eecs.umich.edu 0x3: pick_qb({{ 18226384Sgblack@eecs.umich.edu Rd.uw = dspPick(Rs.uw, Rt.uw, 18236384Sgblack@eecs.umich.edu SIMD_FMT_QB, &dspctl); 18246384Sgblack@eecs.umich.edu }}); 18256384Sgblack@eecs.umich.edu 0x4: cmpgu_eq_qb({{ 18266384Sgblack@eecs.umich.edu Rd.uw = dspCmpg(Rs.uw, Rt.uw, SIMD_FMT_QB, 18276384Sgblack@eecs.umich.edu UNSIGNED, CMP_EQ ); 18286384Sgblack@eecs.umich.edu }}); 18296384Sgblack@eecs.umich.edu 0x5: cmpgu_lt_qb({{ 18306384Sgblack@eecs.umich.edu Rd.uw = dspCmpg(Rs.uw, Rt.uw, SIMD_FMT_QB, 18316384Sgblack@eecs.umich.edu UNSIGNED, CMP_LT); 18326384Sgblack@eecs.umich.edu }}); 18336384Sgblack@eecs.umich.edu 0x6: cmpgu_le_qb({{ 18346384Sgblack@eecs.umich.edu Rd.uw = dspCmpg(Rs.uw, Rt.uw, SIMD_FMT_QB, 18356384Sgblack@eecs.umich.edu UNSIGNED, CMP_LE); 18366384Sgblack@eecs.umich.edu }}); 18374661Sksewell@umich.edu } 18384661Sksewell@umich.edu } 18394661Sksewell@umich.edu 0x1: decode OP_LO { 18404661Sksewell@umich.edu format DspIntOp { 18416384Sgblack@eecs.umich.edu 0x0: cmp_eq_ph({{ 18426384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_PH, 18436384Sgblack@eecs.umich.edu SIGNED, CMP_EQ, &dspctl); 18446384Sgblack@eecs.umich.edu }}); 18456384Sgblack@eecs.umich.edu 0x1: cmp_lt_ph({{ 18466384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_PH, 18476384Sgblack@eecs.umich.edu SIGNED, CMP_LT, &dspctl); 18486384Sgblack@eecs.umich.edu }}); 18496384Sgblack@eecs.umich.edu 0x2: cmp_le_ph({{ 18506384Sgblack@eecs.umich.edu dspCmp(Rs.uw, Rt.uw, SIMD_FMT_PH, 18516384Sgblack@eecs.umich.edu SIGNED, CMP_LE, &dspctl); 18526384Sgblack@eecs.umich.edu }}); 18536384Sgblack@eecs.umich.edu 0x3: pick_ph({{ 18546384Sgblack@eecs.umich.edu Rd.uw = dspPick(Rs.uw, Rt.uw, 18556384Sgblack@eecs.umich.edu SIMD_FMT_PH, &dspctl); 18566384Sgblack@eecs.umich.edu }}); 18576384Sgblack@eecs.umich.edu 0x4: precrq_qb_ph({{ 18586384Sgblack@eecs.umich.edu Rd.uw = Rs.uw<31:24> << 24 | 18596384Sgblack@eecs.umich.edu Rs.uw<15:8> << 16 | 18606384Sgblack@eecs.umich.edu Rt.uw<31:24> << 8 | 18616384Sgblack@eecs.umich.edu Rt.uw<15:8>; 18626384Sgblack@eecs.umich.edu }}); 18636384Sgblack@eecs.umich.edu 0x5: precr_qb_ph({{ 18646384Sgblack@eecs.umich.edu Rd.uw = Rs.uw<23:16> << 24 | 18656384Sgblack@eecs.umich.edu Rs.uw<7:0> << 16 | 18666384Sgblack@eecs.umich.edu Rt.uw<23:16> << 8 | 18676384Sgblack@eecs.umich.edu Rt.uw<7:0>; 18686384Sgblack@eecs.umich.edu }}); 18696384Sgblack@eecs.umich.edu 0x6: packrl_ph({{ 18706384Sgblack@eecs.umich.edu Rd.uw = dspPack(Rs.uw, Rt.uw, SIMD_FMT_PH); 18716384Sgblack@eecs.umich.edu }}); 18726384Sgblack@eecs.umich.edu 0x7: precrqu_s_qb_ph({{ 18736384Sgblack@eecs.umich.edu Rd.uw = dspPrecrqu(Rs.uw, Rt.uw, &dspctl); 18746384Sgblack@eecs.umich.edu }}); 18754661Sksewell@umich.edu } 18764661Sksewell@umich.edu } 18774661Sksewell@umich.edu 0x2: decode OP_LO { 18784661Sksewell@umich.edu format DspIntOp { 18796384Sgblack@eecs.umich.edu 0x4: precrq_ph_w({{ 18806384Sgblack@eecs.umich.edu Rd.uw = Rs.uw<31:16> << 16 | Rt.uw<31:16>; 18816384Sgblack@eecs.umich.edu }}); 18826384Sgblack@eecs.umich.edu 0x5: precrq_rs_ph_w({{ 18836384Sgblack@eecs.umich.edu Rd.uw = dspPrecrq(Rs.uw, Rt.uw, 18846384Sgblack@eecs.umich.edu SIMD_FMT_W, &dspctl); 18856384Sgblack@eecs.umich.edu }}); 18864661Sksewell@umich.edu } 18874661Sksewell@umich.edu } 18884661Sksewell@umich.edu 0x3: decode OP_LO { 18894661Sksewell@umich.edu format DspIntOp { 18906384Sgblack@eecs.umich.edu 0x0: cmpgdu_eq_qb({{ 18916384Sgblack@eecs.umich.edu Rd.uw = dspCmpgd(Rs.uw, Rt.uw, SIMD_FMT_QB, 18926384Sgblack@eecs.umich.edu UNSIGNED, CMP_EQ, &dspctl); 18936384Sgblack@eecs.umich.edu }}); 18946384Sgblack@eecs.umich.edu 0x1: cmpgdu_lt_qb({{ 18956384Sgblack@eecs.umich.edu Rd.uw = dspCmpgd(Rs.uw, Rt.uw, SIMD_FMT_QB, 18966384Sgblack@eecs.umich.edu UNSIGNED, CMP_LT, &dspctl); 18976384Sgblack@eecs.umich.edu }}); 18986384Sgblack@eecs.umich.edu 0x2: cmpgdu_le_qb({{ 18996384Sgblack@eecs.umich.edu Rd.uw = dspCmpgd(Rs.uw, Rt.uw, SIMD_FMT_QB, 19006384Sgblack@eecs.umich.edu UNSIGNED, CMP_LE, &dspctl); 19016384Sgblack@eecs.umich.edu }}); 19026384Sgblack@eecs.umich.edu 0x6: precr_sra_ph_w({{ 19036384Sgblack@eecs.umich.edu Rt.uw = dspPrecrSra(Rt.uw, Rs.uw, RD, 19046384Sgblack@eecs.umich.edu SIMD_FMT_W, NOROUND); 19056384Sgblack@eecs.umich.edu }}); 19066384Sgblack@eecs.umich.edu 0x7: precr_sra_r_ph_w({{ 19076384Sgblack@eecs.umich.edu Rt.uw = dspPrecrSra(Rt.uw, Rs.uw, RD, 19086384Sgblack@eecs.umich.edu SIMD_FMT_W, ROUND); 19096384Sgblack@eecs.umich.edu }}); 19104661Sksewell@umich.edu } 19114661Sksewell@umich.edu } 19124661Sksewell@umich.edu } 19134661Sksewell@umich.edu 19146384Sgblack@eecs.umich.edu //Table 5-7 MIPS32 ABSQ_S.PH Encoding of the op Field 19156384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 19164661Sksewell@umich.edu 0x2: decode OP_HI { 19174661Sksewell@umich.edu 0x0: decode OP_LO { 19184661Sksewell@umich.edu format DspIntOp { 19196384Sgblack@eecs.umich.edu 0x1: absq_s_qb({{ 19206384Sgblack@eecs.umich.edu Rd.sw = dspAbs(Rt.sw, SIMD_FMT_QB, &dspctl); 19216384Sgblack@eecs.umich.edu }}); 19226384Sgblack@eecs.umich.edu 0x2: repl_qb({{ 19236384Sgblack@eecs.umich.edu Rd.uw = RS_RT<7:0> << 24 | 19246384Sgblack@eecs.umich.edu RS_RT<7:0> << 16 | 19256384Sgblack@eecs.umich.edu RS_RT<7:0> << 8 | 19266384Sgblack@eecs.umich.edu RS_RT<7:0>; 19276384Sgblack@eecs.umich.edu }}); 19286384Sgblack@eecs.umich.edu 0x3: replv_qb({{ 19296384Sgblack@eecs.umich.edu Rd.sw = Rt.uw<7:0> << 24 | 19306384Sgblack@eecs.umich.edu Rt.uw<7:0> << 16 | 19316384Sgblack@eecs.umich.edu Rt.uw<7:0> << 8 | 19326384Sgblack@eecs.umich.edu Rt.uw<7:0>; 19336384Sgblack@eecs.umich.edu }}); 19346384Sgblack@eecs.umich.edu 0x4: precequ_ph_qbl({{ 19356384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 19366384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_L); 19376384Sgblack@eecs.umich.edu }}); 19386384Sgblack@eecs.umich.edu 0x5: precequ_ph_qbr({{ 19396384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 19406384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_R); 19416384Sgblack@eecs.umich.edu }}); 19426384Sgblack@eecs.umich.edu 0x6: precequ_ph_qbla({{ 19436384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 19446384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_LA); 19456384Sgblack@eecs.umich.edu }}); 19466384Sgblack@eecs.umich.edu 0x7: precequ_ph_qbra({{ 19476384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, UNSIGNED, 19486384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_RA); 19496384Sgblack@eecs.umich.edu }}); 19504661Sksewell@umich.edu } 19514661Sksewell@umich.edu } 19524661Sksewell@umich.edu 0x1: decode OP_LO { 19534661Sksewell@umich.edu format DspIntOp { 19546384Sgblack@eecs.umich.edu 0x1: absq_s_ph({{ 19556384Sgblack@eecs.umich.edu Rd.sw = dspAbs(Rt.sw, SIMD_FMT_PH, &dspctl); 19566384Sgblack@eecs.umich.edu }}); 19576384Sgblack@eecs.umich.edu 0x2: repl_ph({{ 19586384Sgblack@eecs.umich.edu Rd.uw = (sext<10>(RS_RT))<15:0> << 16 | 19596384Sgblack@eecs.umich.edu (sext<10>(RS_RT))<15:0>; 19606384Sgblack@eecs.umich.edu }}); 19616384Sgblack@eecs.umich.edu 0x3: replv_ph({{ 19626384Sgblack@eecs.umich.edu Rd.uw = Rt.uw<15:0> << 16 | 19636384Sgblack@eecs.umich.edu Rt.uw<15:0>; 19646384Sgblack@eecs.umich.edu }}); 19656384Sgblack@eecs.umich.edu 0x4: preceq_w_phl({{ 19666384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_PH, SIGNED, 19676384Sgblack@eecs.umich.edu SIMD_FMT_W, SIGNED, MODE_L); 19686384Sgblack@eecs.umich.edu }}); 19696384Sgblack@eecs.umich.edu 0x5: preceq_w_phr({{ 19706384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_PH, SIGNED, 19716384Sgblack@eecs.umich.edu SIMD_FMT_W, SIGNED, MODE_R); 19726384Sgblack@eecs.umich.edu }}); 19734661Sksewell@umich.edu } 19744661Sksewell@umich.edu } 19754661Sksewell@umich.edu 0x2: decode OP_LO { 19764661Sksewell@umich.edu format DspIntOp { 19776384Sgblack@eecs.umich.edu 0x1: absq_s_w({{ 19786384Sgblack@eecs.umich.edu Rd.sw = dspAbs(Rt.sw, SIMD_FMT_W, &dspctl); 19796384Sgblack@eecs.umich.edu }}); 19804661Sksewell@umich.edu } 19814661Sksewell@umich.edu } 19824661Sksewell@umich.edu 0x3: decode OP_LO { 19836384Sgblack@eecs.umich.edu 0x3: IntOp::bitrev({{ 19846384Sgblack@eecs.umich.edu Rd.uw = bitrev( Rt.uw<15:0> ); 19856384Sgblack@eecs.umich.edu }}); 19864661Sksewell@umich.edu format DspIntOp { 19876384Sgblack@eecs.umich.edu 0x4: preceu_ph_qbl({{ 19886384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 19896384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 19906384Sgblack@eecs.umich.edu UNSIGNED, MODE_L); 19916384Sgblack@eecs.umich.edu }}); 19926384Sgblack@eecs.umich.edu 0x5: preceu_ph_qbr({{ 19936384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 19946384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 19956384Sgblack@eecs.umich.edu UNSIGNED, MODE_R ); 19966384Sgblack@eecs.umich.edu }}); 19976384Sgblack@eecs.umich.edu 0x6: preceu_ph_qbla({{ 19986384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 19996384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 20006384Sgblack@eecs.umich.edu UNSIGNED, MODE_LA ); 20016384Sgblack@eecs.umich.edu }}); 20026384Sgblack@eecs.umich.edu 0x7: preceu_ph_qbra({{ 20036384Sgblack@eecs.umich.edu Rd.uw = dspPrece(Rt.uw, SIMD_FMT_QB, 20046384Sgblack@eecs.umich.edu UNSIGNED, SIMD_FMT_PH, 20056384Sgblack@eecs.umich.edu UNSIGNED, MODE_RA); 20066384Sgblack@eecs.umich.edu }}); 20074661Sksewell@umich.edu } 20084661Sksewell@umich.edu } 20094661Sksewell@umich.edu } 20104661Sksewell@umich.edu 20116384Sgblack@eecs.umich.edu //Table 5-8 MIPS32 SHLL.QB Encoding of the op Field 20126384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 20134661Sksewell@umich.edu 0x3: decode OP_HI { 20144661Sksewell@umich.edu 0x0: decode OP_LO { 20154661Sksewell@umich.edu format DspIntOp { 20166384Sgblack@eecs.umich.edu 0x0: shll_qb({{ 20176384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, RS, SIMD_FMT_QB, 20186384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 20196384Sgblack@eecs.umich.edu }}); 20206384Sgblack@eecs.umich.edu 0x1: shrl_qb({{ 20216384Sgblack@eecs.umich.edu Rd.sw = dspShrl(Rt.sw, RS, SIMD_FMT_QB, 20226384Sgblack@eecs.umich.edu UNSIGNED); 20236384Sgblack@eecs.umich.edu }}); 20246384Sgblack@eecs.umich.edu 0x2: shllv_qb({{ 20256384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_QB, 20266384Sgblack@eecs.umich.edu NOSATURATE, UNSIGNED, &dspctl); 20276384Sgblack@eecs.umich.edu }}); 20286384Sgblack@eecs.umich.edu 0x3: shrlv_qb({{ 20296384Sgblack@eecs.umich.edu Rd.sw = dspShrl(Rt.sw, Rs.sw, SIMD_FMT_QB, 20306384Sgblack@eecs.umich.edu UNSIGNED); 20316384Sgblack@eecs.umich.edu }}); 20326384Sgblack@eecs.umich.edu 0x4: shra_qb({{ 20336384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_QB, 20346384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 20356384Sgblack@eecs.umich.edu }}); 20366384Sgblack@eecs.umich.edu 0x5: shra_r_qb({{ 20376384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_QB, 20386384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20396384Sgblack@eecs.umich.edu }}); 20406384Sgblack@eecs.umich.edu 0x6: shrav_qb({{ 20416384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_QB, 20426384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 20436384Sgblack@eecs.umich.edu }}); 20446384Sgblack@eecs.umich.edu 0x7: shrav_r_qb({{ 20456384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_QB, 20466384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20476384Sgblack@eecs.umich.edu }}); 20484661Sksewell@umich.edu } 20494661Sksewell@umich.edu } 20504661Sksewell@umich.edu 0x1: decode OP_LO { 20514661Sksewell@umich.edu format DspIntOp { 20526384Sgblack@eecs.umich.edu 0x0: shll_ph({{ 20536384Sgblack@eecs.umich.edu Rd.uw = dspShll(Rt.uw, RS, SIMD_FMT_PH, 20546384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 20556384Sgblack@eecs.umich.edu }}); 20566384Sgblack@eecs.umich.edu 0x1: shra_ph({{ 20576384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_PH, 20586384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 20596384Sgblack@eecs.umich.edu }}); 20606384Sgblack@eecs.umich.edu 0x2: shllv_ph({{ 20616384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_PH, 20626384Sgblack@eecs.umich.edu NOSATURATE, SIGNED, &dspctl); 20636384Sgblack@eecs.umich.edu }}); 20646384Sgblack@eecs.umich.edu 0x3: shrav_ph({{ 20656384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_PH, 20666384Sgblack@eecs.umich.edu NOROUND, SIGNED, &dspctl); 20676384Sgblack@eecs.umich.edu }}); 20686384Sgblack@eecs.umich.edu 0x4: shll_s_ph({{ 20696384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, RS, SIMD_FMT_PH, 20706384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 20716384Sgblack@eecs.umich.edu }}); 20726384Sgblack@eecs.umich.edu 0x5: shra_r_ph({{ 20736384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_PH, 20746384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20756384Sgblack@eecs.umich.edu }}); 20766384Sgblack@eecs.umich.edu 0x6: shllv_s_ph({{ 20776384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_PH, 20786384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 20796384Sgblack@eecs.umich.edu }}); 20806384Sgblack@eecs.umich.edu 0x7: shrav_r_ph({{ 20816384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_PH, 20826384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20836384Sgblack@eecs.umich.edu }}); 20844661Sksewell@umich.edu } 20854661Sksewell@umich.edu } 20864661Sksewell@umich.edu 0x2: decode OP_LO { 20874661Sksewell@umich.edu format DspIntOp { 20886384Sgblack@eecs.umich.edu 0x4: shll_s_w({{ 20896384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, RS, SIMD_FMT_W, 20906384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 20916384Sgblack@eecs.umich.edu }}); 20926384Sgblack@eecs.umich.edu 0x5: shra_r_w({{ 20936384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, RS, SIMD_FMT_W, 20946384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 20956384Sgblack@eecs.umich.edu }}); 20966384Sgblack@eecs.umich.edu 0x6: shllv_s_w({{ 20976384Sgblack@eecs.umich.edu Rd.sw = dspShll(Rt.sw, Rs.sw, SIMD_FMT_W, 20986384Sgblack@eecs.umich.edu SATURATE, SIGNED, &dspctl); 20996384Sgblack@eecs.umich.edu }}); 21006384Sgblack@eecs.umich.edu 0x7: shrav_r_w({{ 21016384Sgblack@eecs.umich.edu Rd.sw = dspShra(Rt.sw, Rs.sw, SIMD_FMT_W, 21026384Sgblack@eecs.umich.edu ROUND, SIGNED, &dspctl); 21036384Sgblack@eecs.umich.edu }}); 21044661Sksewell@umich.edu } 21054661Sksewell@umich.edu } 21064661Sksewell@umich.edu 0x3: decode OP_LO { 21074661Sksewell@umich.edu format DspIntOp { 21086384Sgblack@eecs.umich.edu 0x1: shrl_ph({{ 21096384Sgblack@eecs.umich.edu Rd.sw = dspShrl(Rt.sw, RS, SIMD_FMT_PH, 21106384Sgblack@eecs.umich.edu UNSIGNED); 21116384Sgblack@eecs.umich.edu }}); 21126384Sgblack@eecs.umich.edu 0x3: shrlv_ph({{ 21136384Sgblack@eecs.umich.edu Rd.sw = dspShrl(Rt.sw, Rs.sw, SIMD_FMT_PH, 21146384Sgblack@eecs.umich.edu UNSIGNED); 21156384Sgblack@eecs.umich.edu }}); 21164661Sksewell@umich.edu } 21174661Sksewell@umich.edu } 21184661Sksewell@umich.edu } 21194661Sksewell@umich.edu } 21204661Sksewell@umich.edu 21214661Sksewell@umich.edu 0x3: decode FUNCTION_LO { 21224661Sksewell@umich.edu 21236384Sgblack@eecs.umich.edu //Table 3.12 MIPS32 ADDUH.QB Encoding of the op Field 21246384Sgblack@eecs.umich.edu //(DSP ASE Rev2 Manual) 21254661Sksewell@umich.edu 0x0: decode OP_HI { 21264661Sksewell@umich.edu 0x0: decode OP_LO { 21274661Sksewell@umich.edu format DspIntOp { 21286384Sgblack@eecs.umich.edu 0x0: adduh_qb({{ 21296384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_QB, 21306384Sgblack@eecs.umich.edu NOROUND, UNSIGNED); 21316384Sgblack@eecs.umich.edu }}); 21326384Sgblack@eecs.umich.edu 0x1: subuh_qb({{ 21336384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_QB, 21346384Sgblack@eecs.umich.edu NOROUND, UNSIGNED); 21356384Sgblack@eecs.umich.edu }}); 21366384Sgblack@eecs.umich.edu 0x2: adduh_r_qb({{ 21376384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_QB, 21386384Sgblack@eecs.umich.edu ROUND, UNSIGNED); 21396384Sgblack@eecs.umich.edu }}); 21406384Sgblack@eecs.umich.edu 0x3: subuh_r_qb({{ 21416384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_QB, 21426384Sgblack@eecs.umich.edu ROUND, UNSIGNED); 21436384Sgblack@eecs.umich.edu }}); 21444661Sksewell@umich.edu } 21454661Sksewell@umich.edu } 21464661Sksewell@umich.edu 0x1: decode OP_LO { 21474661Sksewell@umich.edu format DspIntOp { 21486384Sgblack@eecs.umich.edu 0x0: addqh_ph({{ 21496384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_PH, 21506384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21516384Sgblack@eecs.umich.edu }}); 21526384Sgblack@eecs.umich.edu 0x1: subqh_ph({{ 21536384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_PH, 21546384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21556384Sgblack@eecs.umich.edu }}); 21566384Sgblack@eecs.umich.edu 0x2: addqh_r_ph({{ 21576384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_PH, 21586384Sgblack@eecs.umich.edu ROUND, SIGNED); 21596384Sgblack@eecs.umich.edu }}); 21606384Sgblack@eecs.umich.edu 0x3: subqh_r_ph({{ 21616384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_PH, 21626384Sgblack@eecs.umich.edu ROUND, SIGNED); 21636384Sgblack@eecs.umich.edu }}); 21646384Sgblack@eecs.umich.edu 0x4: mul_ph({{ 21656384Sgblack@eecs.umich.edu Rd.sw = dspMul(Rs.sw, Rt.sw, SIMD_FMT_PH, 21666384Sgblack@eecs.umich.edu NOSATURATE, &dspctl); 21676384Sgblack@eecs.umich.edu }}, IntMultOp); 21686384Sgblack@eecs.umich.edu 0x6: mul_s_ph({{ 21696384Sgblack@eecs.umich.edu Rd.sw = dspMul(Rs.sw, Rt.sw, SIMD_FMT_PH, 21706384Sgblack@eecs.umich.edu SATURATE, &dspctl); 21716384Sgblack@eecs.umich.edu }}, IntMultOp); 21724661Sksewell@umich.edu } 21734661Sksewell@umich.edu } 21744661Sksewell@umich.edu 0x2: decode OP_LO { 21754661Sksewell@umich.edu format DspIntOp { 21766384Sgblack@eecs.umich.edu 0x0: addqh_w({{ 21776384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_W, 21786384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21796384Sgblack@eecs.umich.edu }}); 21806384Sgblack@eecs.umich.edu 0x1: subqh_w({{ 21816384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_W, 21826384Sgblack@eecs.umich.edu NOROUND, SIGNED); 21836384Sgblack@eecs.umich.edu }}); 21846384Sgblack@eecs.umich.edu 0x2: addqh_r_w({{ 21856384Sgblack@eecs.umich.edu Rd.uw = dspAddh(Rs.sw, Rt.sw, SIMD_FMT_W, 21866384Sgblack@eecs.umich.edu ROUND, SIGNED); 21876384Sgblack@eecs.umich.edu }}); 21886384Sgblack@eecs.umich.edu 0x3: subqh_r_w({{ 21896384Sgblack@eecs.umich.edu Rd.uw = dspSubh(Rs.sw, Rt.sw, SIMD_FMT_W, 21906384Sgblack@eecs.umich.edu ROUND, SIGNED); 21916384Sgblack@eecs.umich.edu }}); 21926384Sgblack@eecs.umich.edu 0x6: mulq_s_w({{ 21936384Sgblack@eecs.umich.edu Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_W, 21946384Sgblack@eecs.umich.edu SATURATE, NOROUND, &dspctl); 21956384Sgblack@eecs.umich.edu }}, IntMultOp); 21966384Sgblack@eecs.umich.edu 0x7: mulq_rs_w({{ 21976384Sgblack@eecs.umich.edu Rd.sw = dspMulq(Rs.sw, Rt.sw, SIMD_FMT_W, 21986384Sgblack@eecs.umich.edu SATURATE, ROUND, &dspctl); 21996384Sgblack@eecs.umich.edu }}, IntMultOp); 22004661Sksewell@umich.edu } 22014661Sksewell@umich.edu } 22022061SN/A } 22032101SN/A } 22042061SN/A 22052101SN/A //Table A-10 MIPS32 BSHFL Encoding of sa Field 22062101SN/A 0x4: decode SA { 22072046SN/A format BasicOp { 22086384Sgblack@eecs.umich.edu 0x02: wsbh({{ 22096384Sgblack@eecs.umich.edu Rd.uw = Rt.uw<23:16> << 24 | 22106384Sgblack@eecs.umich.edu Rt.uw<31:24> << 16 | 22116384Sgblack@eecs.umich.edu Rt.uw<7:0> << 8 | 22126384Sgblack@eecs.umich.edu Rt.uw<15:8>; 22132686Sksewell@umich.edu }}); 22142742Sksewell@umich.edu 0x10: seb({{ Rd.sw = Rt.sb; }}); 22152742Sksewell@umich.edu 0x18: seh({{ Rd.sw = Rt.sh; }}); 22162046SN/A } 22172101SN/A } 22182043SN/A 22192101SN/A 0x6: decode FUNCTION_LO { 22204661Sksewell@umich.edu 22216384Sgblack@eecs.umich.edu //Table 5-10 MIPS32 DPAQ.W.PH Encoding of the op Field 22226384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 22234661Sksewell@umich.edu 0x0: decode OP_HI { 22244661Sksewell@umich.edu 0x0: decode OP_LO { 22254661Sksewell@umich.edu format DspHiLoOp { 22266384Sgblack@eecs.umich.edu 0x0: dpa_w_ph({{ 22276384Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 22286384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_L); 22296384Sgblack@eecs.umich.edu }}, IntMultOp); 22306384Sgblack@eecs.umich.edu 0x1: dps_w_ph({{ 22316384Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 22326384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_L); 22336384Sgblack@eecs.umich.edu }}, IntMultOp); 22346384Sgblack@eecs.umich.edu 0x2: mulsa_w_ph({{ 22356384Sgblack@eecs.umich.edu dspac = dspMulsa(dspac, Rs.sw, Rt.sw, 22366384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH ); 22376384Sgblack@eecs.umich.edu }}, IntMultOp); 22386384Sgblack@eecs.umich.edu 0x3: dpau_h_qbl({{ 22396384Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 22406384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_L); 22416384Sgblack@eecs.umich.edu }}, IntMultOp); 22426384Sgblack@eecs.umich.edu 0x4: dpaq_s_w_ph({{ 22436384Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 22446384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22456384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 22466384Sgblack@eecs.umich.edu MODE_L, &dspctl); 22476384Sgblack@eecs.umich.edu }}, IntMultOp); 22486384Sgblack@eecs.umich.edu 0x5: dpsq_s_w_ph({{ 22496384Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 22506384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22516384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 22526384Sgblack@eecs.umich.edu MODE_L, &dspctl); 22536384Sgblack@eecs.umich.edu }}, IntMultOp); 22546384Sgblack@eecs.umich.edu 0x6: mulsaq_s_w_ph({{ 22556384Sgblack@eecs.umich.edu dspac = dspMulsaq(dspac, Rs.sw, Rt.sw, 22566384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 22576384Sgblack@eecs.umich.edu &dspctl); 22586384Sgblack@eecs.umich.edu }}, IntMultOp); 22596384Sgblack@eecs.umich.edu 0x7: dpau_h_qbr({{ 22606384Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 22616384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_R); 22626384Sgblack@eecs.umich.edu }}, IntMultOp); 22634661Sksewell@umich.edu } 22644661Sksewell@umich.edu } 22654661Sksewell@umich.edu 0x1: decode OP_LO { 22664661Sksewell@umich.edu format DspHiLoOp { 22676384Sgblack@eecs.umich.edu 0x0: dpax_w_ph({{ 22686384Sgblack@eecs.umich.edu dspac = dspDpa(dspac, Rs.sw, Rt.sw, ACDST, 22696384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_X); 22706384Sgblack@eecs.umich.edu }}, IntMultOp); 22716384Sgblack@eecs.umich.edu 0x1: dpsx_w_ph({{ 22726384Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 22736384Sgblack@eecs.umich.edu SIMD_FMT_PH, SIGNED, MODE_X); 22746384Sgblack@eecs.umich.edu }}, IntMultOp); 22756384Sgblack@eecs.umich.edu 0x3: dpsu_h_qbl({{ 22766384Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 22776384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_L); 22786384Sgblack@eecs.umich.edu }}, IntMultOp); 22796384Sgblack@eecs.umich.edu 0x4: dpaq_sa_l_w({{ 22806384Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 22816384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_W, 22826384Sgblack@eecs.umich.edu SIMD_FMT_L, SATURATE, 22836384Sgblack@eecs.umich.edu MODE_L, &dspctl); 22846384Sgblack@eecs.umich.edu }}, IntMultOp); 22856384Sgblack@eecs.umich.edu 0x5: dpsq_sa_l_w({{ 22866384Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 22876384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_W, 22886384Sgblack@eecs.umich.edu SIMD_FMT_L, SATURATE, 22896384Sgblack@eecs.umich.edu MODE_L, &dspctl); 22906384Sgblack@eecs.umich.edu }}, IntMultOp); 22916384Sgblack@eecs.umich.edu 0x7: dpsu_h_qbr({{ 22926384Sgblack@eecs.umich.edu dspac = dspDps(dspac, Rs.sw, Rt.sw, ACDST, 22936384Sgblack@eecs.umich.edu SIMD_FMT_QB, UNSIGNED, MODE_R); 22946384Sgblack@eecs.umich.edu }}, IntMultOp); 22954661Sksewell@umich.edu } 22964661Sksewell@umich.edu } 22974661Sksewell@umich.edu 0x2: decode OP_LO { 22984661Sksewell@umich.edu format DspHiLoOp { 22996384Sgblack@eecs.umich.edu 0x0: maq_sa_w_phl({{ 23006384Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs.uw, Rt.uw, 23016384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23026384Sgblack@eecs.umich.edu MODE_L, SATURATE, &dspctl); 23036384Sgblack@eecs.umich.edu }}, IntMultOp); 23046384Sgblack@eecs.umich.edu 0x2: maq_sa_w_phr({{ 23056384Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs.uw, Rt.uw, 23066384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23076384Sgblack@eecs.umich.edu MODE_R, SATURATE, &dspctl); 23086384Sgblack@eecs.umich.edu }}, IntMultOp); 23096384Sgblack@eecs.umich.edu 0x4: maq_s_w_phl({{ 23106384Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs.uw, Rt.uw, 23116384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23126384Sgblack@eecs.umich.edu MODE_L, NOSATURATE, &dspctl); 23136384Sgblack@eecs.umich.edu }}, IntMultOp); 23146384Sgblack@eecs.umich.edu 0x6: maq_s_w_phr({{ 23156384Sgblack@eecs.umich.edu dspac = dspMaq(dspac, Rs.uw, Rt.uw, 23166384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23176384Sgblack@eecs.umich.edu MODE_R, NOSATURATE, &dspctl); 23186384Sgblack@eecs.umich.edu }}, IntMultOp); 23194661Sksewell@umich.edu } 23204661Sksewell@umich.edu } 23214661Sksewell@umich.edu 0x3: decode OP_LO { 23224661Sksewell@umich.edu format DspHiLoOp { 23236384Sgblack@eecs.umich.edu 0x0: dpaqx_s_w_ph({{ 23246384Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 23256384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23266384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 23276384Sgblack@eecs.umich.edu MODE_X, &dspctl); 23286384Sgblack@eecs.umich.edu }}, IntMultOp); 23296384Sgblack@eecs.umich.edu 0x1: dpsqx_s_w_ph({{ 23306384Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 23316384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23326384Sgblack@eecs.umich.edu SIMD_FMT_W, NOSATURATE, 23336384Sgblack@eecs.umich.edu MODE_X, &dspctl); 23346384Sgblack@eecs.umich.edu }}, IntMultOp); 23356384Sgblack@eecs.umich.edu 0x2: dpaqx_sa_w_ph({{ 23366384Sgblack@eecs.umich.edu dspac = dspDpaq(dspac, Rs.sw, Rt.sw, 23376384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23386384Sgblack@eecs.umich.edu SIMD_FMT_W, SATURATE, 23396384Sgblack@eecs.umich.edu MODE_X, &dspctl); 23406384Sgblack@eecs.umich.edu }}, IntMultOp); 23416384Sgblack@eecs.umich.edu 0x3: dpsqx_sa_w_ph({{ 23426384Sgblack@eecs.umich.edu dspac = dspDpsq(dspac, Rs.sw, Rt.sw, 23436384Sgblack@eecs.umich.edu ACDST, SIMD_FMT_PH, 23446384Sgblack@eecs.umich.edu SIMD_FMT_W, SATURATE, 23456384Sgblack@eecs.umich.edu MODE_X, &dspctl); 23466384Sgblack@eecs.umich.edu }}, IntMultOp); 23474661Sksewell@umich.edu } 23484661Sksewell@umich.edu } 23494661Sksewell@umich.edu } 23504661Sksewell@umich.edu 23514661Sksewell@umich.edu //Table 3.3 MIPS32 APPEND Encoding of the op Field 23524661Sksewell@umich.edu 0x1: decode OP_HI { 23534661Sksewell@umich.edu 0x0: decode OP_LO { 23544661Sksewell@umich.edu format IntOp { 23556384Sgblack@eecs.umich.edu 0x0: append({{ 23566384Sgblack@eecs.umich.edu Rt.uw = (Rt.uw << RD) | bits(Rs.uw, RD - 1, 0); 23576384Sgblack@eecs.umich.edu }}); 23586384Sgblack@eecs.umich.edu 0x1: prepend({{ 23596384Sgblack@eecs.umich.edu Rt.uw = (Rt.uw >> RD) | 23606384Sgblack@eecs.umich.edu (bits(Rs.uw, RD - 1, 0) << (32 - RD)); 23616384Sgblack@eecs.umich.edu }}); 23624661Sksewell@umich.edu } 23634661Sksewell@umich.edu } 23644661Sksewell@umich.edu 0x2: decode OP_LO { 23654661Sksewell@umich.edu format IntOp { 23666384Sgblack@eecs.umich.edu 0x0: balign({{ 23676384Sgblack@eecs.umich.edu Rt.uw = (Rt.uw << (8 * BP)) | 23686384Sgblack@eecs.umich.edu (Rs.uw >> (8 * (4 - BP))); 23696384Sgblack@eecs.umich.edu }}); 23704661Sksewell@umich.edu } 23714661Sksewell@umich.edu } 23724661Sksewell@umich.edu } 23734661Sksewell@umich.edu 23742101SN/A } 23754661Sksewell@umich.edu 0x7: decode FUNCTION_LO { 23764661Sksewell@umich.edu 23776384Sgblack@eecs.umich.edu //Table 5-11 MIPS32 EXTR.W Encoding of the op Field 23786384Sgblack@eecs.umich.edu //(DSP ASE MANUAL) 23794661Sksewell@umich.edu 0x0: decode OP_HI { 23804661Sksewell@umich.edu 0x0: decode OP_LO { 23814661Sksewell@umich.edu format DspHiLoOp { 23826384Sgblack@eecs.umich.edu 0x0: extr_w({{ 23836384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, RS, 23846384Sgblack@eecs.umich.edu NOROUND, NOSATURATE, &dspctl); 23856384Sgblack@eecs.umich.edu }}); 23866384Sgblack@eecs.umich.edu 0x1: extrv_w({{ 23876384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, Rs.uw, 23886384Sgblack@eecs.umich.edu NOROUND, NOSATURATE, &dspctl); 23896384Sgblack@eecs.umich.edu }}); 23906384Sgblack@eecs.umich.edu 0x2: extp({{ 23916384Sgblack@eecs.umich.edu Rt.uw = dspExtp(dspac, RS, &dspctl); 23926384Sgblack@eecs.umich.edu }}); 23936384Sgblack@eecs.umich.edu 0x3: extpv({{ 23946384Sgblack@eecs.umich.edu Rt.uw = dspExtp(dspac, Rs.uw, &dspctl); 23956384Sgblack@eecs.umich.edu }}); 23966384Sgblack@eecs.umich.edu 0x4: extr_r_w({{ 23976384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, RS, 23986384Sgblack@eecs.umich.edu ROUND, NOSATURATE, &dspctl); 23996384Sgblack@eecs.umich.edu }}); 24006384Sgblack@eecs.umich.edu 0x5: extrv_r_w({{ 24016384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, Rs.uw, 24026384Sgblack@eecs.umich.edu ROUND, NOSATURATE, &dspctl); 24036384Sgblack@eecs.umich.edu }}); 24046384Sgblack@eecs.umich.edu 0x6: extr_rs_w({{ 24056384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, RS, 24066384Sgblack@eecs.umich.edu ROUND, SATURATE, &dspctl); 24076384Sgblack@eecs.umich.edu }}); 24086384Sgblack@eecs.umich.edu 0x7: extrv_rs_w({{ 24096384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_W, Rs.uw, 24106384Sgblack@eecs.umich.edu ROUND, SATURATE, &dspctl); 24116384Sgblack@eecs.umich.edu }}); 24124661Sksewell@umich.edu } 24134661Sksewell@umich.edu } 24144661Sksewell@umich.edu 0x1: decode OP_LO { 24154661Sksewell@umich.edu format DspHiLoOp { 24166384Sgblack@eecs.umich.edu 0x2: extpdp({{ 24176384Sgblack@eecs.umich.edu Rt.uw = dspExtpd(dspac, RS, &dspctl); 24186384Sgblack@eecs.umich.edu }}); 24196384Sgblack@eecs.umich.edu 0x3: extpdpv({{ 24206384Sgblack@eecs.umich.edu Rt.uw = dspExtpd(dspac, Rs.uw, &dspctl); 24216384Sgblack@eecs.umich.edu }}); 24226384Sgblack@eecs.umich.edu 0x6: extr_s_h({{ 24236384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_PH, RS, 24246384Sgblack@eecs.umich.edu NOROUND, SATURATE, &dspctl); 24256384Sgblack@eecs.umich.edu }}); 24266384Sgblack@eecs.umich.edu 0x7: extrv_s_h({{ 24276384Sgblack@eecs.umich.edu Rt.uw = dspExtr(dspac, SIMD_FMT_PH, Rs.uw, 24286384Sgblack@eecs.umich.edu NOROUND, SATURATE, &dspctl); 24296384Sgblack@eecs.umich.edu }}); 24304661Sksewell@umich.edu } 24314661Sksewell@umich.edu } 24324661Sksewell@umich.edu 0x2: decode OP_LO { 24334661Sksewell@umich.edu format DspIntOp { 24346384Sgblack@eecs.umich.edu 0x2: rddsp({{ 24356384Sgblack@eecs.umich.edu Rd.uw = readDSPControl(&dspctl, RDDSPMASK); 24366384Sgblack@eecs.umich.edu }}); 24376384Sgblack@eecs.umich.edu 0x3: wrdsp({{ 24386384Sgblack@eecs.umich.edu writeDSPControl(&dspctl, Rs.uw, WRDSPMASK); 24396384Sgblack@eecs.umich.edu }}); 24404661Sksewell@umich.edu } 24414661Sksewell@umich.edu } 24424661Sksewell@umich.edu 0x3: decode OP_LO { 24434661Sksewell@umich.edu format DspHiLoOp { 24446384Sgblack@eecs.umich.edu 0x2: shilo({{ 24456384Sgblack@eecs.umich.edu if (sext<6>(HILOSA) < 0) { 24466384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac << 24476384Sgblack@eecs.umich.edu -sext<6>(HILOSA); 24486384Sgblack@eecs.umich.edu } else { 24496384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac >> 24506384Sgblack@eecs.umich.edu sext<6>(HILOSA); 24516384Sgblack@eecs.umich.edu } 24526384Sgblack@eecs.umich.edu }}); 24536384Sgblack@eecs.umich.edu 0x3: shilov({{ 24546384Sgblack@eecs.umich.edu if (sext<6>(Rs.sw<5:0>) < 0) { 24556384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac << 24566384Sgblack@eecs.umich.edu -sext<6>(Rs.sw<5:0>); 24576384Sgblack@eecs.umich.edu } else { 24586384Sgblack@eecs.umich.edu dspac = (uint64_t)dspac >> 24596384Sgblack@eecs.umich.edu sext<6>(Rs.sw<5:0>); 24606384Sgblack@eecs.umich.edu } 24616384Sgblack@eecs.umich.edu }}); 24626384Sgblack@eecs.umich.edu 0x7: mthlip({{ 24636384Sgblack@eecs.umich.edu dspac = dspac << 32; 24646384Sgblack@eecs.umich.edu dspac |= Rs.uw; 24656384Sgblack@eecs.umich.edu dspctl = insertBits(dspctl, 5, 0, 24666384Sgblack@eecs.umich.edu dspctl<5:0> + 32); 24676384Sgblack@eecs.umich.edu }}); 24684661Sksewell@umich.edu } 24694661Sksewell@umich.edu } 24704661Sksewell@umich.edu } 24716809Sgblack@eecs.umich.edu 0x3: decode OP { 24726810Sgblack@eecs.umich.edu#if FULL_SYSTEM 24736809Sgblack@eecs.umich.edu 0x0: FailUnimpl::rdhwr(); 24746810Sgblack@eecs.umich.edu#else 24756810Sgblack@eecs.umich.edu 0x0: decode RD { 24766810Sgblack@eecs.umich.edu 29: BasicOp::rdhwr({{ Rt = TpValue; }}); 24776810Sgblack@eecs.umich.edu } 24786810Sgblack@eecs.umich.edu#endif 24795222Sksewell@umich.edu } 24804661Sksewell@umich.edu } 24812043SN/A } 24822084SN/A } 24832024SN/A 24842686Sksewell@umich.edu 0x4: decode OPCODE_LO { 24852124SN/A format LoadMemory { 24867708Sgblack@eecs.umich.edu 0x0: lb({{ Rt.sw = Mem.sb; }}); 24877708Sgblack@eecs.umich.edu 0x1: lh({{ Rt.sw = Mem.sh; }}); 24882479SN/A 0x3: lw({{ Rt.sw = Mem.sw; }}); 24897708Sgblack@eecs.umich.edu 0x4: lbu({{ Rt.uw = Mem.ub;}}); 24907708Sgblack@eecs.umich.edu 0x5: lhu({{ Rt.uw = Mem.uh; }}); 24912686Sksewell@umich.edu } 24922495SN/A 24932686Sksewell@umich.edu format LoadUnalignedMemory { 24946384Sgblack@eecs.umich.edu 0x2: lwl({{ 24956384Sgblack@eecs.umich.edu uint32_t mem_shift = 24 - (8 * byte_offset); 24966384Sgblack@eecs.umich.edu Rt.uw = mem_word << mem_shift | (Rt.uw & mask(mem_shift)); 24976384Sgblack@eecs.umich.edu }}); 24986384Sgblack@eecs.umich.edu 0x6: lwr({{ 24996384Sgblack@eecs.umich.edu uint32_t mem_shift = 8 * byte_offset; 25006384Sgblack@eecs.umich.edu Rt.uw = (Rt.uw & (mask(mem_shift) << (32 - mem_shift))) | 25016384Sgblack@eecs.umich.edu (mem_word >> mem_shift); 25026384Sgblack@eecs.umich.edu }}); 25036384Sgblack@eecs.umich.edu } 25042084SN/A } 25052024SN/A 25062686Sksewell@umich.edu 0x5: decode OPCODE_LO { 25072124SN/A format StoreMemory { 25087708Sgblack@eecs.umich.edu 0x0: sb({{ Mem.ub = Rt<7:0>; }}); 25097708Sgblack@eecs.umich.edu 0x1: sh({{ Mem.uh = Rt<15:0>; }}); 25102479SN/A 0x3: sw({{ Mem.uw = Rt<31:0>; }}); 25112084SN/A } 25122024SN/A 25132686Sksewell@umich.edu format StoreUnalignedMemory { 25146384Sgblack@eecs.umich.edu 0x2: swl({{ 25156384Sgblack@eecs.umich.edu uint32_t reg_shift = 24 - (8 * byte_offset); 25166384Sgblack@eecs.umich.edu uint32_t mem_shift = 32 - reg_shift; 25176384Sgblack@eecs.umich.edu mem_word = (mem_word & (mask(reg_shift) << mem_shift)) | 25186384Sgblack@eecs.umich.edu (Rt.uw >> reg_shift); 25196384Sgblack@eecs.umich.edu }}); 25206384Sgblack@eecs.umich.edu 0x6: swr({{ 25216384Sgblack@eecs.umich.edu uint32_t reg_shift = 8 * byte_offset; 25226384Sgblack@eecs.umich.edu mem_word = Rt.uw << reg_shift | 25236384Sgblack@eecs.umich.edu (mem_word & (mask(reg_shift))); 25246384Sgblack@eecs.umich.edu }}); 25252084SN/A } 25265222Sksewell@umich.edu format CP0Control { 25275222Sksewell@umich.edu 0x7: cache({{ 25285254Sksewell@umich.edu //Addr CacheEA = Rs.uw + OFFSET; 25296384Sgblack@eecs.umich.edu //fault = xc->CacheOp((uint8_t)CACHE_OP,(Addr) CacheEA); 25306384Sgblack@eecs.umich.edu }}); 25315222Sksewell@umich.edu } 25322084SN/A } 25332024SN/A 25342686Sksewell@umich.edu 0x6: decode OPCODE_LO { 25352686Sksewell@umich.edu format LoadMemory { 25366076Sgblack@eecs.umich.edu 0x0: ll({{ Rt.uw = Mem.uw; }}, mem_flags=LLSC); 25372686Sksewell@umich.edu 0x1: lwc1({{ Ft.uw = Mem.uw; }}); 25382573SN/A 0x5: ldc1({{ Ft.ud = Mem.ud; }}); 25392084SN/A } 25405222Sksewell@umich.edu 0x2: CP2Unimpl::lwc2(); 25415222Sksewell@umich.edu 0x6: CP2Unimpl::ldc2(); 25422686Sksewell@umich.edu 0x3: Prefetch::pref(); 25432084SN/A } 25442024SN/A 25452239SN/A 25462686Sksewell@umich.edu 0x7: decode OPCODE_LO { 25476384Sgblack@eecs.umich.edu 0x0: StoreCond::sc({{ Mem.uw = Rt.uw; }}, 25482686Sksewell@umich.edu {{ uint64_t tmp = write_result; 25492686Sksewell@umich.edu Rt.uw = (tmp == 0 || tmp == 1) ? tmp : Rt.uw; 25506384Sgblack@eecs.umich.edu }}, mem_flags=LLSC, 25516384Sgblack@eecs.umich.edu inst_flags = IsStoreConditional); 25522686Sksewell@umich.edu format StoreMemory { 25536384Sgblack@eecs.umich.edu 0x1: swc1({{ Mem.uw = Ft.uw; }}); 25546384Sgblack@eecs.umich.edu 0x5: sdc1({{ Mem.ud = Ft.ud; }}); 25552084SN/A } 25565222Sksewell@umich.edu 0x2: CP2Unimpl::swc2(); 25575222Sksewell@umich.edu 0x6: CP2Unimpl::sdc2(); 25582027SN/A } 25592024SN/A} 25602022SN/A 25612027SN/A 2562