decoder.isa revision 2041 
1////////////////////////////////////////////////////////////////////
2//
3// The actual MIPS32 ISA decoder 
4// -----------------------------
5// The following instructions are specified in the MIPS32 ISA
6// Specification. Decoding closely follows the style specified 
7// in the MIPS32 ISAthe specification document starting with Table
8// A-2 (document available @ www.mips.com)
9//
10//@todo: Distinguish "unknown/future" use insts from "reserved"
11// ones
12decode OPCODE_HI default FailUnimpl::unknown() {
13    
14    // Derived From ... Table A-2 MIPS32 ISA Manual
15    0x0: decode OPCODE_LO default FailUnimpl::reserved(){
16	
17	0x0: decode FUNCTION_HI {
18	    0x0: decode FUNCTION_LO {
19	      0x1: decode MOVCI {
20		format Move {
21		  0: movf({{ if( FPConditionCode(CC) == 0) Rd = Rs}});
22		  1: movt({{ if( FPConditionCode(CC) == 1) Rd = Rs}});
23		}  
24	      }
25
26	      format BasicOp {
27
28		//Table A-3 Note: "1. Specific encodings of the rt, rd, and sa fields 
29		//are used to distinguish among the SLL, NOP, SSNOP and EHB functions."
30
31		0x0: sll({{ Rd = Rt.uw << SA; }});
32		
33		0x2: decode SRL {
34		   0: srl({{ Rd = Rt.uw >> SA; }});
35
36		   //Hardcoded assuming 32-bit ISA, probably need parameter here
37		   1: rotr({{ Rd = (Rt.uw << (32 - SA)) | (Rt.uw >> SA);}});
38		 }	
39	
40		 0x3: sra({{ Rd = Rt.sw >> SA; }});
41		
42		 0x4: sllv({{ Rd = Rt.uw << Rs<4:0>; }});
43
44		 0x6: decode SRLV {
45		   0: srlv({{ Rd = Rt.uw >> Rs<4:0>; }});
46
47		   //Hardcoded assuming 32-bit ISA, probably need parameter here
48		   1: rotrv({{ Rd = (Rt.uw << (32 - Rs<4:0>)) | (Rt.uw >> Rs<4:0>);}});
49		 }
50
51		 0x7: srav({{ Rd = Rt.sw >> Rs<4:0>; }});
52	      }
53	    }
54
55	    0x1: decode FUNCTION_LO {
56	     
57	      //Table A-3 Note: "Specific encodings of the hint field are used 
58	      //to distinguish JR from JR.HB and JALR from JALR.HB"
59	      format Jump {
60		0x0: jr(IsReturn);
61		0x1: jalr(IsCall,IsReturn);
62	      }
63
64	      format Move {
65		0x2: movz({{ if (Rt == 0) Rd = Rs; }});
66		0x3: movn({{ if (Rt != 0) Rd = Rs; }});
67	      }
68
69	      format Trap {
70	      	0x4: Syscall::syscall({{ xc->syscall()}},IsNonSpeculative);
71	      	0x5: Break::break({{ }});
72	      	0x7: Synchronize::sync({{ }});
73	      }
74	    }
75
76	    0x2: decode FUNCTION_LO {
77	      format IntOp {
78		0x0: mfhi({{ }});
79		0x1: mthi({{ }});
80		0x2: mflo({{ }});
81		0x3: mtlo({{ }});
82	      }
83	    };
84
85	    0x3: decode FUNCTION_LO {
86	      format IntOp {
87		0x0: mult({{ Rd.sw = Rs.sw * Rt.sw; }});
88		0x1: multu({{ Rd.sw = Rs.uw * Rt.uw;}});
89		0x2: div({{ Rd.sw = Rs.sw / Rt.sw;}});
90		0x3: divu({{ Rd.sw = Rs.sw / Rt.uw;}});
91	      }
92	    };
93
94	    0x4: decode FUNCTION_LO {
95	      format IntOp {
96		0x0: add({{  Rd.sw = Rs.sw + Rt.sw;}});
97		0x1: addu({{ Rd.uw = Rs.uw + Rt.uw;}});
98		0x2: sub({{ Rd.sw = Rs.sw - Rt.sw;}});
99		0x3: subu({{ Rd.uw = Rs.uw - Rt.uw;}});	      
100		0x4: and({{ Rd.sw = Rs.uw & Rt.uw;}});
101		0x5: or({{ Rd.sw = Rs.uw | Rt.uw;}});
102		0x6: xor({{ Rd.sw = Rs.uw ^ Rt.uw;}});
103		0x7: nor({{ Rd.sw = ~(Rs.uw | Rt.uw);}});
104	      }
105	    }
106
107	    0x5: decode FUNCTION_LO {
108	      format IntOp{
109		0x2: slt({{  Rd.sw = ( Rs.sw < Rt.sw ) ? 1 : 0}});
110		0x3: sltu({{ Rd.uw = ( Rs.uw < Rt.uw ) ? 1 : 0}});
111	      }
112	    };
113
114	    0x6: decode FUNCTION_LO {
115	      format Trap {
116		 0x0: tge({{ }});
117		 0x1: tgeu({{ }});
118		 0x2: tlt({{ }});
119		 0x3: tltu({{ }});
120		 0x4: teq({{ }});
121		 0x6: tne({{ }});
122	      }
123	    }
124	}
125
126	0x1: decode REGIMM_HI {
127	    0x0: decode REGIMM_LO {
128	      format Branch {
129		0x0: bltz({{ }});
130		0x1: bgez({{ }});
131
132		//MIPS obsolete instructions
133		0x2: bltzl({{ }});
134		0x3: bgezl({{ }});
135	      }
136	    }
137
138	    0x1: decode REGIMM_LO {
139	      format Trap {
140		 0x0: tgei({{ }});
141		 0x1: tgeiu({{ }});
142		 0x2: tlti({{ }});
143		 0x3: tltiu({{ }});
144		 0x4: teqi({{ }});
145		 0x6: tnei({{ }});
146	      }
147	    }
148
149	    0x2: decode REGIMM_LO {
150	      format Branch {
151		0x0: bltzal({{ }});
152		0x1: bgezal({{ }});
153
154		//MIPS obsolete instructions
155		0x2: bltzall({{ }});
156		0x3: bgezall({{ }});
157	      }
158	    }
159
160	    0x3: decode REGIMM_LO {
161	      format Trap {
162	      	0x7: synci({{ }});
163	      }
164	    }      
165	}
166
167	format Jump {
168	    0x2: j();
169	    0x3: jal(IsCall);
170	}
171
172	format Branch {
173	    0x4: beq({{ }});
174	    0x5: bne({{ }});
175	    0x6: blez({{ }});
176	    0x7: bgtz({{ }});
177	}
178    };
179
180    0x1: decode OPCODE_LO default FailUnimpl::reserved(){
181	format IntOp {
182	    0x0: addi({{ Rt.sw = Rs.sw + INTIMM; }});
183	    0x1: addiu({{ Rt.uw = Rs.uw + INTIMM;}});
184	    0x2: slti({{ Rt.sw = ( Rs.sw < INTIMM ) ? 1 : 0 }});
185	    0x3: sltiu({{ Rt.uw = ( Rs.uw < INTIMM ) ? 1 : 0 }});
186	    0x4: andi({{ Rt.sw = Rs.sw & INTIMM;}});
187	    0x5: ori({{ Rt.sw = Rs.sw | INTIMM;}});
188	    0x6: xori({{ Rt.sw = Rs.sw ^ INTIMM;}});
189	};
190
191	format Memory {
192	    0x7: lui({{ }});
193	};
194    };
195
196    0x2: decode OPCODE_LO default FailUnimpl::reserved(){
197
198      //Table A-11 MIPS32 COP0 Encoding of rs Field
199      0x0: decode RS_MSB {
200	0x0: decode RS {
201	  0x0: mfc0({{ }});
202	  0xC: mtc0({{ }});
203	  0xA: rdpgpr({{ }});
204
205  	  0xB: decode SC {
206	    format BasicOp {
207		0x0: di({{ }});
208		0x1: ei({{ }}); 	      
209	    }
210	  }
211
212  	  0xE: wrpgpr({{ }});
213	}
214
215	//Table A-12 MIPS32 COP0 Encoding of Function Field When rs=CO
216	0x1: decode FUNCTION {
217	  format Trap {
218	        0x01: tlbr({{ }});
219	        0x02: tlbwi({{ }});
220	        0x06: tlbwr({{ }});
221	        0x08: tlbp({{ }});
222	  }
223
224	  format BasicOp {
225	        0x18: eret({{ }});
226	        0x1F: deret({{ }});
227	        0x20: wait({{ }});
228          }
229	}
230      }
231
232      //Table A-13 MIPS32 COP1 Encoding of rs Field
233      0x1: decode RS_MSB {
234
235	0x0: decode RS_HI {
236	  0x0: decode RS_LO {
237	    0x0: mfc1({{ }});
238	    0x2: cfc1({{ }});
239	    0x3: mfhc1({{ }});
240	    0x4: mtc1({{ }});
241	    0x6: ctc1({{ }});
242	    0x7: mftc1({{ }});
243	  }
244
245	  0x1: decode ND {
246	    0x0: decode TF {
247	      format Branch {
248	      	0x0: bc1f({{ }});
249	      	0x1: bc1t({{ }});
250	      }
251	    }
252
253	    0x1: decode TF {
254	      format Branch {
255		0x0: bc1fl({{ }});
256	      	0x1: bc1tl({{ }});
257	      }
258	    }
259	  }
260	}
261
262	0x1: decode RS_HI {
263	  0x2: decode RS_LO {
264
265	    //Table A-14 MIPS32 COP1 Encoding of Function Field When rs=S
266	    //(( single-word ))
267	    0x0: decode RS_HI {
268	      0x0: decode RS_LO {
269		0x0: add_fmt({{ }});
270		0x1: sub_fmt({{ }});
271		0x2: mul_fmt({{ }});
272		0x3: div_fmt({{ }});
273		0x4: sqrt_fmt({{ }});
274		0x5: abs_fmt({{ }});
275		0x6: mov_fmt({{ }});
276		0x7: neg_fmt({{ }});
277	      }
278
279	      0x1: decode RS_LO {
280		//only legal for 64 bit
281		format mode64 {
282		  0x0: round_l({{ }});
283		  0x1: trunc_l({{ }});
284		  0x2: ceil_l({{ }});
285		  0x3: floor_l({{ }});
286		}
287
288		0x4: round_w({{ }});
289		0x5: trunc_w({{ }});
290		0x6: ceil_w({{ }});
291		0x7: floor_w({{ }});
292	      }
293
294	      0x2: decode RS_LO {
295		0x1: decode MOVCF {
296		  0x0: movf_fmt({{ }});
297		  0x1: movt_fmt({{ }});
298		}
299
300		format Move {
301		  0x2: movz({{ if (Rt == 0) Rd = Rs; }});
302         	  0x3: movn({{ if (Rt != 0) Rd = Rs; }});
303	      	}
304
305		format mode64 {
306		  0x2: recip({{ }});
307		  0x3: rsqrt{{ }});
308		}
309	      }
310
311	      0x4: decode RS_LO {
312		0x1: cvt_d({{ }});
313		0x4: cvt_w({{ }});
314
315		//only legal for 64 bit
316		format mode64 {
317		  0x5: cvt_l({{ }});
318		  0x6: cvt_ps({{ }});
319		}
320	      }
321	    }
322
323	    //Table A-15 MIPS32 COP1 Encoding of Function Field When rs=D
324	    0x1: decode RS_HI {
325	      0x0: decode RS_LO {
326		0x0: add_fmt({{ }});
327		0x1: sub_fmt({{ }});
328		0x2: mul_fmt({{ }});
329		0x3: div_fmt({{ }});
330		0x4: sqrt_fmt({{ }});
331		0x5: abs_fmt({{ }});
332		0x6: mov_fmt({{ }});
333		0x7: neg_fmt({{ }});
334	      }
335
336	      0x1: decode RS_LO {
337		//only legal for 64 bit
338		format mode64 {
339		  0x0: round_l({{ }});
340		  0x1: trunc_l({{ }});
341		  0x2: ceil_l({{ }});
342		  0x3: floor_l({{ }});
343		}
344
345		0x4: round_w({{ }});
346		0x5: trunc_w({{ }});
347		0x6: ceil_w({{ }});
348		0x7: floor_w({{ }});
349	      }
350
351	      0x2: decode RS_LO {
352		0x1: decode MOVCF {
353		  0x0: movf_fmt({{ }});
354		  0x1: movt_fmt({{ }});
355		}
356
357		format Move {
358		  0x2: movz({{ if (Rt == 0) Rd = Rs; }});
359         	  0x3: movn({{ if (Rt != 0) Rd = Rs; }});
360	      	}
361
362		format mode64 {
363		  0x5: recip({{ }});
364		  0x6: rsqrt{{ }});
365		}
366	      }
367
368	      0x4: decode RS_LO {
369		0x0: cvt_s({{ }});
370		0x4: cvt_w({{ }});
371
372		//only legal for 64 bit
373		format mode64 {
374		  0x5: cvt_l({{ }});
375		}
376	      }
377	    }
378
379	    //Table A-16 MIPS32 COP1 Encoding of Function Field When rs=W
380	    0x4: decode FUNCTION {
381	      0x10: cvt_s({{ }});
382	      0x10: cvt_d({{ }});
383	    }
384
385	    //Table A-16 MIPS32 COP1 Encoding of Function Field When rs=L1
386	    //Note: "1. Format type L is legal only if 64-bit floating point operations 
387	    //are enabled."
388	    0x5: decode FUNCTION_HI {
389	      0x10: cvt_s({{ }});
390	      0x11: cvt_d({{ }});
391	    }
392
393	    //Table A-17 MIPS64 COP1 Encoding of Function Field When rs=PS1
394	    //Note: "1. Format type PS is legal only if 64-bit floating point operations 
395	    //are enabled. "
396	    0x6: decode RS_HI {
397	      0x0: decode RS_LO {
398		0x0: add_fmt({{ }});
399		0x1: sub_fmt({{ }});
400		0x2: mul_fmt({{ }});
401		0x5: abs_fmt({{ }});
402		0x6: mov_fmt({{ }});
403		0x7: neg_fmt({{ }});
404	      }
405
406	      0x2: decode RS_LO {
407		0x1: decode MOVCF {
408		  0x0: movf_fmt({{ }});
409		  0x1: movt_fmt({{ }});
410		}
411
412	      }
413
414	      0x4: decode RS_LO {
415		0x0: cvt_s_pu({{ }});
416	      }
417
418	      0x5: decode RS_LO {
419		0x0: cvt_s_pl({{ }});
420		0x4: pll_s_pl({{ }});
421		0x5: plu_s_pl({{ }});
422		0x6: pul_s_pl({{ }});
423		0x7: puu_s_pl({{ }});
424	      }
425	    }
426      }
427
428      //Table A-19 MIPS32 COP2 Encoding of rs Field 
429      0x2: decode RS_MSB {
430	0x0: decode RS_HI {
431	  0x0: decode RS_LO {
432	    0x0: mfc2({{ }});
433	    0x2: cfc2({{ }});
434	    0x3: mfhc2({{ }});
435	    0x4: mtc2({{ }});
436	    0x6: ctc2({{ }});
437	    0x7: mftc2({{ }});
438	  }
439
440	  0x1: decode ND {
441	    0x0: decode TF {
442	      format Branch { 
443	        0x0: bc2f({{ }});
444	        0x1: bc2t({{ }});
445	      }
446	    }
447
448	    0x1: decode TF {
449	      format Branch {
450	      	0x0: bc2fl({{ }});
451	      	0x1: bc2tl({{ }});
452	      }
453	    }
454	  }
455	}
456      }
457
458      //Table A-20 MIPS64 COP1X Encoding of Function Field 1
459      //Note: "COP1X instructions are legal only if 64-bit floating point 
460      //operations are enabled."
461      0x3: decode FUNCTION_HI {
462	0x0: decode FUNCTION_LO {
463	  0x0: lwxc1({{ }});
464	  0x1: ldxc1({{ }});
465	  0x5: luxc1({{ }});
466	}
467
468	0x1: decode FUNCTION_LO {
469	  0x0: swxc1({{ }});
470	  0x1: sdxc1({{ }});
471	  0x5: suxc1({{ }});
472	  0x7: prefx({{ }});
473	}
474
475	0x3: alnv_ps({{ }});
476
477	0x4: decode FUNCTION_LO {
478	  0x0: madd_s({{ }});
479	  0x1: madd_d({{ }});
480	  0x6: madd_ps({{ }});
481	}
482
483	0x5: decode FUNCTION_LO {
484	  0x0: msub_s({{ }});
485	  0x1: msub_d({{ }});
486	  0x6: msub_ps({{ }});	
487	}
488
489	0x6: decode FUNCTION_LO {
490	  0x0: nmadd_s({{ }});
491	  0x1: nmadd_d({{ }});
492	  0x6: nmadd_ps({{ }});	
493	}
494
495	0x7: decode FUNCTION_LO {
496	  0x0: nmsub_s({{ }});
497	  0x1: nmsub_d({{ }});
498	  0x6: nmsub_ps({{ }});
499	}
500      } 
501
502      //MIPS obsolete instructions 
503      0x4: beql({{ }});
504      0x5: bnel({{ }});
505      0x6: blezl({{ }});
506      0x7: bgtzl({{ }});
507    };
508
509    0x3: decode OPCODE_LO default FailUnimpl::reserved() {
510
511	//Table A-5 MIPS32 SPECIAL2 Encoding of Function Field
512	0x4: decode FUNCTION_HI {
513
514	    0x0: decode FUNCTION_LO {
515	      0x0: madd({{ }});
516	      0x1: maddu({{ }});
517	      0x2: mult({{ }});
518	      0x4: msub({{ }});
519	      0x5: msubu({{ }});
520	    }
521
522	    0x4: decode FUNCTION_LO {
523	      0x0: clz({{ }});
524	      0x1: clo({{ }});
525	    }
526
527	    0x7: decode FUNCTION_LO {
528	      0x7: sdbbp({{ }});
529	    }	      
530	}
531
532	//Table A-6 MIPS32 SPECIAL3 Encoding of Function Field for Release 2 of the Architecture
533	0x7: decode FUNCTION_HI {
534	  
535	  0x0: decode FUNCTION_LO {
536	    0x1: ext({{ }});
537	    0x4: ins({{ }});
538	  }
539
540	  //Table A-10 MIPS32 BSHFL Encoding of sa Field
541	  0x4: decode SA {
542	    0x02: wsbh({{ }});
543	    0x10: seb({{ }});
544	    0x18: seh({{ }});
545	  }
546
547	  0x6: decode FUNCTION_LO {
548	    0x7: rdhwr({{ }});
549	  }
550	}
551    };
552
553    0x4: decode OPCODE_LO default FailUnimpl::reserved() {
554	format Memory {
555	    0x0: lb({{ }});
556	    0x1: lh({{ }});
557	    0x2: lwl({{ }});
558	    0x3: lw({{ }});
559	    0x4: lbu({{ }});
560	    0x5: lhu({{ }});
561	    0x6: lhu({{ }});
562	};
563
564	0x7: FailUnimpl::reserved({{ }});
565    };
566
567    0x5: decode OPCODE_LO default FailUnimpl::reserved() {
568	format Memory {
569	    0x0: sb({{ }});
570	    0x1: sh({{ }});
571	    0x2: swl({{ }});
572	    0x3: sw({{ }});
573	    0x6: swr({{ }});
574	};
575
576	format FailUnimpl {
577	    0x4: reserved({{ }});
578	    0x5: reserved({{ }});
579	    0x7: cache({{ }});
580	};
581
582    };
583
584    0x6: decode OPCODE_LO default FailUnimpl::reserved() {
585	format Memory {
586	    0x0: ll({{ }});
587	    0x1: lwc1({{ }});
588	    0x5: ldc1({{ }});
589	};
590    };
591
592    0x7: decode OPCODE_LO default FailUnimpl::reserved() {
593	format Memory {
594	    0x0: sc({{ }});
595	    0x1: swc1({{ }});
596	    0x5: sdc1({{ }});
597	};
598
599    }
600}
601
602
603